Commit Graph

1073498 Commits

Author SHA1 Message Date
Finley Xiao
4aa12ffbf8 arm64: dts: rockchip: Add RK3562 iotest board devicetree
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Signed-off-by: Jake Wu <jake.wu@rock-chips.com>
Change-Id: I1de47c3fc46e1e95c9ad77efa2b697edffdd5c6d
2023-02-02 19:02:07 +08:00
Finley Xiao
2df94e8259 arm64: dts: rockchip: Add RK3562 evaluation board devicetree
evb1: LPDDR4/LPDDR4X + RK817 + ECM MIC
evb2: DDR4 + RK809 + RTC IC with external BAT + SPI Flash + MEMS MIC

The rk3562-evb1 and rk3562-evb2 force the maximum-speed of
usb dwc3 controller to high-speed, it needs the following
two properties to fix usb compatibility issues.

1. Set "snps,dis_u2_susphy_quirk" to disable dwc3 controller
   suspend phy automatically. And the usb phy driver can
   manage phy suspend/normal mode by itself.

2. Set "snps,usb2-lpm-disable" to disable usb2 lpm for dwc3
   xhci controller. It can fix some usb disks with lpm broken
   issue.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Li Huang <putin.li@rock-chips.com>
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Signed-off-by: Jake Wu <jake.wu@rock-chips.com>
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Signed-off-by: Alex Zhao <zzc@rock-chips.com>
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Felix Zeng <felix.zeng@rock-chips.com>
Signed-off-by: Wangqiang Guo <kay.guo@rock-chips.com>
Change-Id: I066b6daa6d0f36ff0b28564f07f4d371c2796fd6
2023-02-02 19:02:07 +08:00
Finley Xiao
8d580cfd19 arm64: dts: rockchip: add core dtsi for RK3562 Soc
RK3562 is a Soc from Rockchip, which embedded with quad
ARM Cortex-A53.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Li Huang <putin.li@rock-chips.com>
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Signed-off-by: Shaohan Yao <shaohan.yao@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Signed-off-by: Felix Zeng <felix.zeng@rock-chips.com>
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Signed-off-by: Jake Wu <jake.wu@rock-chips.com>
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Liang Chen <cl@rock-chips.com>
Change-Id: I0d8d52eee06b7e962434510fbfb214c01d25ef36
2023-02-02 18:54:49 +08:00
Finley Xiao
402eeba39b soc: rockchip: power-domain: add power domain support for rk3562
This driver is modified to support RK3562 SoC.
Add support to ungate clk.
Add support to shut down memory for rk3562.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ideeaf378b0548a9a32e05345f56a6d6bfb037a20
2023-02-02 18:54:49 +08:00
Finley Xiao
13dc7de2e4 dt-bindings: add power-domain header for RK3562 SoC
According to a description from TRM, add all the power domains.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ia188dad23c884521775f9e608203d1281b093a39
2023-02-02 18:54:49 +08:00
Finley Xiao
a621b1189c clk: rockchip: Add clock controller for the RK3562
Add the clock tree definition for the new RK3562 SoC.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ia96ad61555537333a8ac54158360e1d23d971135
2023-02-02 18:54:49 +08:00
Finley Xiao
14d8aa4a04 clk: rockchip: add dt-binding header for rk3562
Add the dt-bindings header for the rk3562, that gets shared between
the clock controller and the clock references in the dts.
Add softreset ID for rk3562.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Liang Chen <cl@rock-chips.com>
Change-Id: I25c4b2b8276f7d371ae861fdd24bd98fcf7c1629
2023-02-02 18:54:49 +08:00
Steven Liu
1d9713df4e pinctrl: rockchip: add rk3562 support
Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Change-Id: Ifaa8c80bf109ed6b710e4d1ccb3e2bf379bc0299
2023-02-02 18:54:49 +08:00
Finley Xiao
bacbf200df arm64: configs: rockchip_defconfig: enable CPU_RK3562
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I374fb618f898c3bbe6ab9baadc1248fa10f371a1
2023-02-02 18:54:49 +08:00
Finley Xiao
19566d9146 soc: rockchip: Adds CPU_RK3562 config
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I6b2911bb567c794be5c1b77fbd4632006b08de7a
2023-02-02 18:54:49 +08:00
Shawn Lin
9fbb9ccaf7 mmc: sdhci-of-dwcmshc: Sync code with upstream as possible
To make backport and upstream work easier. After this patch,
we just need to focus some rk specific additional code.

Sync to upstream commit a0753ef66c ("mmc: sdhci-of-dwcmshc: Re-enable support for the BlueField-3 SoC").

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Ie3b76ea2848ac3570bb9bc0be09c6f6a67685658
2023-02-02 16:54:00 +08:00
Shawn Lin
8e4a5fef5b arm64: dts: rockchip: rk3568: Rename sdhci compatible property
Since we modify the sdhci driver to match upstream, so the compatible
property should be adjust to match it.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Ia768d530047db95c29d5740ed5b039e7d92428cc
2023-02-02 16:20:23 +08:00
Huang zhibao
a3e576bb9d arm64: dts: rockchip: rk3528-evb: remove firmware node
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: Ie5542723077158e1c17f019bd6a8d46eafe3c1bf
2023-02-02 16:19:33 +08:00
Jianqun Xu
979b9e6c84 media: rockchip: subdev-itf: remove empty runtime suspend/resume
drivers/media/platform/rockchip/cif/subdev-itf.c:1172:12: warning: 'sditf_runtime_resume' defined but not used [-Wunused-function]
error, forbidden warning:subdev-itf.c:1172
 1172 | static int sditf_runtime_resume(struct device *dev)
      |            ^~~~~~~~~~~~~~~~~~~~
drivers/media/platform/rockchip/cif/subdev-itf.c:1167:12: warning: 'sditf_runtime_suspend' defined but not used [-Wunused-function]
error, forbidden warning:subdev-itf.c:1167
 1167 | static int sditf_runtime_suspend(struct device *dev)
      |            ^~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I537818f182741704e55f0bb59c623e1118bf5838
2023-02-02 14:17:45 +08:00
Tao Huang
1d40129dd7 crypto: rockchip: Use fallthrough pseudo-keyword
Replace /* fall through */ comment with pseudo-keyword macro fallthrough[1]

[1] https://www.kernel.org/doc/html/latest/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I717c6a69079e0fa502a9fd11665bb47e51893ff3
2023-02-02 10:10:37 +08:00
William Wu
f658eb3ee6 Revert "usb: gadget: add transfer_type in struct usb_ep for rockchip"
This reverts commit bcf7606d61.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Ic493a5f24217b728925ec71a5e47b0a3534de764
2023-02-02 10:06:36 +08:00
William Wu
da52789497 Revert "usb: gadget: transfer_type depends on CONFIG_NO_GKI"
This reverts commit 866525fd9f.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Iba893b9036a01bcdc981311a9846b2375e167c02
2023-02-02 10:06:36 +08:00
William Wu
023c6f447c usb: gadget: f_uac1: Fix ep addr matching when handle sample rate
The f_uac1 driver uses the fixed address matching for EP-IN
and EP-OUT (0x82 for EP-IN and 0x01 for EP-OUT) when set/get
sample rate. It has limitation that can only support uac1 func
with EP2-IN and EP1-OUT to set/get sample rate. This patch use
the in_ep->address and out_ep->address instead of the fixed
addresses.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I85f4da663535b4e832e52b42bc1a7d57b85270ee
2023-02-02 10:03:12 +08:00
Jianqun Xu
f573762ff5 soc: rockchip: rk_fiq_debugger fix the 'cpu' to unsigned long
Change-Id: I5f432f86226f30df8a565407544ee46e7129e045
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2023-02-02 09:52:12 +08:00
Wang Panzhenzhuan
486a9a69ed media: i2c: cn3927v: fix suspend cause i2c error issue
1. fix suspend cause i2c error issue.
2. use v4l2_dbg replace dev_dbg for dynamic print debug info.

Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I6445fbc6602d5b1ca3f7d8ef24764c468c63256f
2023-02-01 18:11:03 +08:00
William Wu
7a4ae778bd usb: gadget: uvc: fix uvc state for bulk transfer
Set uvc state to UVC_STATE_STREAMING when stream on uvc
for both isoc and bulk transfer, then it can schedule
video pump work in uvc_v4l2_qbuf.

Fixes: c15a7cecb8 ("usb: gadget: uvc: support streaming bulk transfer")
Change-Id: Ie6fab6529cd83d59b34c6dd0028d6ad5b5eed010
Signed-off-by: William Wu <william.wu@rock-chips.com>
2023-02-01 18:10:06 +08:00
Sugar Zhang
6c4dd79500 ASoC: rockchip: vad: Use snd_soc_find_dai_with_mutex
Ref: commit 20d9fdee72 ("ASoC: soc-core: add snd_soc_find_dai_with_mutex()")

This patch fix potential WARNING when config enable CONFIG_LOCKDEP

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I5f830cfcd68a7c819f6613786b78bc6d1519fc9e
2023-02-01 18:05:09 +08:00
Sugar Zhang
b8bbd0d907 ASoC: rockchip: multi-dais: Use snd_soc_find_dai_with_mutex
Ref: commit 20d9fdee72 ("ASoC: soc-core: add snd_soc_find_dai_with_mutex()")

This patch fix WARNING when config enable CONFIG_LOCKDEP:

WARNING: CPU: 2 PID: 1 at sound/soc/soc-core.c:816 snd_soc_find_dai+0x120/0x128
Modules linked in:
CPU: 2 PID: 1 Comm: swapper/0 Not tainted 5.10.66 #121
pstate: 60c00009 (nZCv daif +PAN +UAO -TCO BTYPE=--)
pc : snd_soc_find_dai+0x120/0x128
lr : snd_soc_find_dai+0x40/0x128
sp : ffffffc0130eb910
x29: ffffffc0130eb910 x28: 0000000000000000
x27: ffffff80eefdeda0 x26: 0000000000000002
x25: 0000000000000002 x24: ffffff800c20a590
x23: ffffff80ef06a6e8 x22: ffffff800c20a480
x21: ffffff800c1ab680 x20: ffffff80048f8800
x19: ffffffc0130eb970 x18: ffffffc0130e5098
x17: 0000000000000001 x16: ffffff8003d18000
x15: ffffffc012f86000 x14: ffffffc0125e6ce8
x13: 00000000ffffffff x12: ffffffc0129b8d68
x11: 0000000100000003 x10: 00000000ffffffff
x9 : 0000000000000000 x8 : ffffffc0dcdb3000
x7 : ffffffc010640fc0 x6 : ffffff8003d18990
x5 : 0000000000000000 x4 : 0000000000000001
x3 : e358acf3a5519911 x2 : 0000000000000001
x1 : ffffffc01246bf58 x0 : 0000000000000000
Call trace:
 snd_soc_find_dai+0x120/0x128
 rockchip_mdais_probe+0x1cc/0x730
 platform_drv_probe+0x9c/0xc4
 really_probe+0x20c/0x51c
 driver_probe_device+0x80/0xc0
 device_driver_attach+0x7c/0xc0
 __driver_attach+0xcc/0x158
 bus_for_each_dev+0x80/0xd0
 driver_attach+0x28/0x38
 bus_add_driver+0x108/0x1e8
 driver_register+0x7c/0x118
 __platform_driver_register+0x48/0x58
 rockchip_mdais_driver_init+0x20/0x30
 do_one_initcall+0x9c/0x190
 do_initcall_level+0xa4/0xc8
 do_initcalls+0x58/0x9c
 do_basic_setup+0x28/0x38
 kernel_init_freeable+0x9c/0xf8
 kernel_init+0x18/0x190
 ret_from_fork+0x10/0x30

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I16b9642fc1022389e099de0fb98b31201eafe0a1
2023-02-01 18:04:49 +08:00
Wu Liangqing
ffbaf9faee arm64: dts: rockchip: remove androidboot bootargs for px30/rk3399 boards
Change-Id: I7a04b215fba6d6967bb241f1d07f0199612ccc9c
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2023-02-01 17:18:39 +08:00
Damon Ding
cc49e88e80 drm/bridge: sii902x: add FIELD2_OFST config
The reg FIELD2_OFST should be half the number of pixel/line
in interlace mode.

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I3b0de9199768d965a945bf5db5a0902f2103e30e
2023-02-01 16:38:06 +08:00
shengfei Xu
83274139e2 arm64: dts: rockchip: rk3588-rk806-dual: fix nldo1/nldo2/nldo3 supply
The input supply is always-on, so this mistake doesn't affect
whether the supply is actually enabled correctly.

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: Ie6411c6fdcf4865290ba725d8203334f1bf8ad35
2023-02-01 16:12:24 +08:00
Wyon Bi
c4cc8de208 drm/rockchip: dw-dp: Fix a typo
Fixes: 7d048d6dac ("drm/rockchip: dw-dp: Add HDCP function support")
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I5882ae3d54340c7e25cf25b491ed3e6006f01c6c
2023-02-01 07:46:15 +00:00
Jianqun Xu
c36c85bec0 video: rockchip: dvbm: fix a compile warning
drivers/video/rockchip/dvbm/rockchip_dvbm.c: In function 'rk_dvbm_setup_iobuf':
./include/linux/kern_levels.h:5:18: warning: format '%x' expects argument of type 'unsigned int', but argument 2 has type 'dma_addr_t' {aka 'long long unsigned int'} [-Wformat=]

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Ia18c7da7ea47e168741f76365eedc6b9e630e527
2023-02-01 15:17:05 +08:00
Jon Lin
25f0206a15 spi: rockchip: Add print information in case of spi exception
Change-Id: I3c512486ae69b2d155a1f67bdb3ce34996796d90
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2023-02-01 15:03:53 +08:00
Jon Lin
b5c957981c dt-bindings: spi: spi-rockchip: Add description for rockchip,poll-only property
Change-Id: Ie007e5ec889398f662ac32ab36a668cadda23c61
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2023-02-01 15:03:53 +08:00
Jon Lin
a35843d230 spi: rockchip: Support cpu polling to complete transmission
The default is DMA and IRQ transmission mode. You can change the
transmission mode to only support cpu polling transmission by adding
"rockchip,poll-only" to the device-tree node.

Change-Id: Icee3f4e899533ee51caab68fb85ec45f64b89d91
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2023-02-01 15:03:53 +08:00
Jianqun Xu
a3c84f2024 rtc: rockchip: get match data with device_get_match_data
This patch fixes a compile warning as following:

drivers/rtc/rtc-rockchip.c: In function 'rockchip_rtc_probe':
drivers/rtc/rtc-rockchip.c:669:14: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
  669 |  rtc->mode = (unsigned int)of_device_get_match_data(&pdev->dev);
      |              ^

Fixes: 7344989b7e ("rtc: support rockchip rtc")
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I53128355e34c6560ccd652631e67c8fc267928f5
2023-02-01 14:42:56 +08:00
Yu Qiaowei
dd3f143de6 video: rockchip: rga3: support tile8*8 mode
Update driver version to 1.2.24

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I821f4f41da8b446c437027360356b903c8f3000b
2023-02-01 14:27:41 +08:00
Yu Qiaowei
1aa8db89f7 video: rockchip: rga3: support win0 scaling in ABC mode
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I832bf19e899cf5bbe37c061a991fc29ce5aa947c
2023-02-01 14:27:41 +08:00
Finley Xiao
118acb18ba arm64: dts: rockchip: rk1808-evb: Fix supply for pd npu
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I5fbafe045699cf3f4c81234c6588bc2ffde0bab9
2023-01-31 14:46:44 +08:00
Damon Ding
31e2803cc9 FROMLIST: pwm: gpio: Add a generic gpio based PWM driver
This patch adds a bit-banging gpio PWM driver. It makes
use of hrtimers, to allow nano-second resolution, though
it obviously strongly depends on the switching speed of
the gpio pins, hrtimer and system load.

Each pwm node can have 1 or more "pwm-gpio" entries,
which will be treated as pwm's as part of a pwm chip.

Link: https://patchwork.ozlabs.org/project/linux-pwm/patch/1445895161-2317-8-git-send-email-o.schinagl@ultimaker.com/
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: Ibdb28eca3239a3a8503c947667117a9b0e9427b9
2023-01-30 14:34:59 +08:00
Huang zhibao
b5dccad7be arm64: dts: rockchip: add RK3588 pcie ep demo board devicetree
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: I84e58fb29df580c13467690d3c40addfcd2200a7
2023-01-29 15:28:04 +08:00
ZhiZhan Chen
71e2b90c40 ARM: dts: rockchip: rk3126c-evb-ddr3-v10-linux: disable ldo6 regulator when gt1x suspended
Change-Id: Icd439abe8b4420adf86c94e61c455ff19b006297
Signed-off-by: ZhiZhan Chen <zhizhan.chen@rock-chips.com>
2023-01-16 17:55:32 +08:00
ZhiZhan Chen
0e4da668ca input: touchscreen: gt1x: add support for without rst-gpio and power invert
Change-Id: I6015c19272c34f5dec76ce8172d951f85ea7a24c
Signed-off-by: ZhiZhan Chen <zhizhan.chen@rock-chips.com>
2023-01-16 15:17:22 +08:00
Chandler Chen
f33837ba44 video: rockchip: mpp: iep2: fix irq return err cause by work_mode check
work_mode reg is used for iep+vdpp combo IP to check running task,
which is meaningless and not writable in iep alone IP.
so if work_mode == 0, consider as iep alone IP, otherwise check the
value to determine current work mode.

Fixes: 767709ab16 ("video: rockchip: mpp: iep2: Add work mode setting")
Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: I4c063e352976170b3c68652e65b0421ef7a82f8f
2023-01-16 11:34:53 +08:00
Zefa Chen
824a24f406 media: rockchip: vicap use tasklet to done buf
when buffer needs to refresh the cache, which takes a lot of time and
is not suitable for execution in an interrupt

Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I6b6e54cef62711787430b1b336db3476e3f93e69
2023-01-16 11:32:06 +08:00
Zefa Chen
c69ef7e2ae media: rockchip: vicap creates dummy buffer with the max sensor resolution
fixeds:
rkcif-mipi-lvds2: not active buffer, use dummy buffer, mipi/lvds stream[0]
rk_iommu fdce0800.iommu: Page fault at 0x00000000fc538000 of type write
rk_iommu fdce0800.iommu: iova = 0x00000000fc538000: dte_index: 0x3f1 pte_index: 0x138 page_offset: 0x0
rk_iommu fdce0800.iommu: mmu_dte_addr: 0x0000000000354000 dte@0x0000000000354fc4: 0x318d001 valid: 1 pte@0x000000000318d4e0: 0x000000 valid: 0 page@0x0000000000000000 flags: 0x0
rkcif-mipi-lvds2: ERROR: csi fifo overflow, intstat:0x10000, lastline:4785733!!

Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Ie66d805d91367eb9ac695788511c6c6cb648d799
2023-01-15 17:42:29 +08:00
Johnson Ding
d3f424655c arm64: dts: rockchip: rk3588: disable auto freq for IEP2, JPEGE and VPU
IP cores whose clock is under aclk_vdpu_low_pre should not be changed
after power on. If one reduce frequence of clock, others will be
affected and will take longer time to finished work.

Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
Change-Id: I631dd9a3f47c5811d6ae27f558a25a98d6022f49
2023-01-15 17:37:39 +08:00
Jon Lin
02af10c45f PCI: rockchip: dw: Support get_dma_status for polling DMA status
1.Support get_dma_status for polling DMA status
2.Remove the struct of dw_pcie from dmatest

Change-Id: Ifef2b9172234e597354d9ae410d3f39be55cc6a8
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2023-01-15 17:31:34 +08:00
Yandong Lin
a3332199c9 video: rockchip: mpp: fix crash issue causing by mpp->queue is null
Rootcause:

Those devices that do not have multicores but share one mpp_taskqueue,
due to the core_id is default value 0, will fail to attach workqueue.

Thus making mpp->queue = NULL and will crash when use mpp->queue.

Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I805aeadce1ec47ba18f2410864b83dca947655db
2023-01-15 17:29:08 +08:00
Wangqiang Guo
6ad4e59284 input: touchscreen: gsl3673_800x1280: change input io(sda/int) voltage 1.8v.
Change-Id: Ie39dc83ab67bfbccaf01bb2ebc5c0fe27a32d09c
Signed-off-by: Wangqiang Guo <kay.guo@rock-chips.com>
2023-01-15 16:40:57 +08:00
Shawn Lin
8b40685086 PCI: rockchip: dw: Always record ASPM settings when suspend
At the beginning, we skip walking the PCIe bus if the root port is
in L0 to save the suspend time. However, when enabling L1ss, the
threshold from L0 to L1ss is quite longer than from L0 to L0s or L1.
So we may in the middle stage that PCIe link hasn't wait long enough
to do transition from L0 to L1ss, at that moment we may still in L0.
rk_pcie_downstream_dev_to_d0 won't be called in this situation and
we miss all the ASPM settings. Ideally, we should walk the bus and
decide if anyone of them was marked as ASPM enabled in advanced, then
record ASPM settings. But in this way, there is no difference by fixing
it just as leting remove link state judgement.

Fixes: 0a082fd9da ("PCI: rockchip: dw: Save&Restore L1SS in PM")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Ic0cdf74271241dc78cfd5d23c6c027e82f35bde2
2023-01-15 16:37:55 +08:00
Yandong Lin
3c7779edf6 video: rockchip: mpp: fix task not proc in time in some abnormal case
If current task finish with soft timeout, the next
task in pending list will not get processing.

So, need to trigger again in mpp_task_timeout_work to
ensure that next task in pending task gets processed in time.

Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Iefa57c883eda81553c1b4c17be4f18c4dc83c946
2023-01-15 16:13:19 +08:00
Guochun Huang
6ae2a3fab2 drm/bridge: dw-mipi-dsi: support cmd packet send in lp/hs mode
Change-Id: Ib47c417ad1124e621e033781eb64b093bf987594
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
2023-01-15 15:28:38 +08:00
XiaoDong Huang
5edc8e8d02 soc: rockchip: rk_fiq_debugger: support use dynamic fiq_sdei_event
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: If49800be5e8fb2f44ec14e4d82634e3f7e421156
2023-01-15 15:11:52 +08:00