Commit Graph

592906 Commits

Author SHA1 Message Date
Roger Chen
5734fa3da5 net: stmmac: dwmac-rk: support RK3399 GMAC driver
Change-Id: Ib584d3526929fa37ae1e701c01971a61188d213b
Signed-off-by: Roger Chen <roger.chen@rock-chips.com>
2016-03-18 16:03:04 +08:00
Huang Jiachai
4f0fe5f65f video: rockchip: lcdc: 3366: 480i and 576i need sel dclk div2
Change-Id: Ibc27be643ae33a81d181d9398b362af0ce0c6f03
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2016-03-18 15:07:12 +08:00
Huang Jiachai
28e664e868 video: rockchip: vop lite: fix lut config error
Change-Id: I201e3bb8a60650259e2de4f3973173039188fe34
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2016-03-18 15:07:11 +08:00
Huang Jiachai
0c4987999c video: rockchip: vop lite: recover interlace config
Change-Id: I03171fd1546ead16f477cb255f2b1bbc1d20adf8
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2016-03-18 15:07:11 +08:00
Huang Jiachai
9e55fbe480 video: rockchip: fb: rename time line name for vop0 and vop1
Change-Id: Ifae7d4fc88dd41ecb659c886237a6d65026fded6
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2016-03-18 15:06:49 +08:00
Jianqun Xu
f0756a16a4 ARM64: dts: rockchip: add clk_ignore_unused for rk3399
Change-Id: I2f6faf3807d5c3b347d8b6930cc8f29c56746b2a
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2016-03-18 14:21:13 +08:00
Huang Jiachai
6a7a5e6ebf video: rockchip: vop: 3366: writeback function test ok
Change-Id: I560a714a86dad83f277d380c3650d4ed7827d80b
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2016-03-18 14:14:52 +08:00
Huang Jiachai
dea00e3236 video: rockchip: vop lite: add deal with BGR data format
Change-Id: I5cac5cfd6385c5a0aa4152c927053ecd55290031
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2016-03-18 14:12:12 +08:00
Huang Jiachai
a581b38e7d video: rockchip: fb: add BGR data format support
Change-Id: Ia97a20b5ed1e3ab92e31136e0cb60a785b570a65
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2016-03-18 14:11:34 +08:00
David Wu
6ef9cab2af i2c: rk3x: add i2c support for rk3399 soc
- new method to caculate i2c timings for rk3399:
  There was an timing issue about "repeated start" time at the I2C
  controller of version0, controller appears to drop SDA at .875x (7/8)
  programmed clk high. On version 1 of the controller, the rule(.875x)
  isn't enough to meet tSU;STA
  requirements on 100k's Standard-mode. To resolve this issue,
  sda_update_config, start_setup_config and stop_setup_config for I2C
  timing information are added, new rules are designed to calculate
  the timing information at new v1.
- pclk and function clk are separated at rk3399.
- support i2c highspeed mode: 1.7MHz for rk3399

Change-Id: I413455cf94fe7486c40694059e2f0931433992bb
Signed-off-by: David Wu <david.wu@rock-chips.com>
2016-03-18 11:07:01 +08:00
David Wu
e24b2fae61 i2c: rk3x: switch to i2c generic dt parsing
Switch to the new generic functions: i2c_parse_fw_timings().

Change-Id: I14c3bea8e696d0ba5467effba1a157cd86e376d6
Signed-off-by: David Wu <david.wu@rock-chips.com>
2016-03-18 11:06:04 +08:00
Xing Zheng
eaa2063c47 ARM64: dts: rk3399: add support clock assignment for PMUCRU/CRU
Change-Id: I8dc31880a232c1753c0fbfbeb4e3df0d09d7cdb3
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2016-03-18 10:47:02 +08:00
Xing Zheng
89f93129bd clk: rockchip: add clock controller for the RK3399
Add the clock tree definition for the new RK3399 SoC.

Change-Id: I1d8755eb7c89bdc56b79644a96a7d3fd8e7fbc4b
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2016-03-18 10:46:37 +08:00
Chris Zhong
945ed51212 UPSTREAM: ARM: dts: rockchip: add rk3288 mipi_dsi nodes
Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.

Change-Id: I0181ec03b0c944a18391737ea6bb65c5b642a6ea
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit cab6f070ab)
2016-03-18 10:45:39 +08:00
Chris Zhong
4d52f2dbce UPSTREAM: Documentation: dt-bindings: Add bindings for rk3288 DW MIPI DSI driver
add device tree bindings for rk3288 specific Synopsys DW MIPI DSI driver

Change-Id: Ie6774d527475889a6eab587e66eda607d1ea2c8b
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
(cherry picked from commit a20d86e7f9)
2016-03-18 10:45:03 +08:00
Chris Zhong
5aea23974e UPSTREAM: drm/panel: simple: Add support for BOE TV080WUM-NL0
The BOE TV080WUM-NL0 is an 8.0", 1200x1920 (WUXGA) TFT-LCD panel
connected using four DSI lanes. It can be supported by the simple-panel
driver.

Change-Id: I4fe03fc830332e60997e98b24550801827692501
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
(cherry picked from commit c8521969de)
2016-03-18 10:44:32 +08:00
Chris Zhong
874e997419 UPSTREAM: dt-bindings: Add BOE TV080WUM-NL0 panel binding
The BOE TV080WUM-NL0 is an 8.0", 1200x1920 (WUXGA) TFT-LCD panel
connected using four DSI lanes.

Change-Id: I963cf860315f86ca64249c8f2064acbba62276b5
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
(cherry picked from commit 86b81f3e17)
2016-03-18 10:43:58 +08:00
Chris Zhong
945b3c0a09 UPSTREAM: of: Add vendor prefix for BOE Technology Group
BOE Technology Group Co., Ltd. is a supplier of semiconductor display
technologies, products and services.

Change-Id: Id9a81512f6174770fc1d1282579da902fcdc89b0
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
[treding@nvidia.com: add commit message, fixup subject]
Signed-off-by: Thierry Reding <treding@nvidia.com>
(cherry picked from commit 27d23b30a5)
2016-03-18 10:43:32 +08:00
Chris Zhong
627e6431eb UPSTREAM: clk: rockchip: add mipidsi clock on rk3288
sclk_mipidsi_24m is the gating of mipi dsi phy.

Change-Id: I15b3e7a17b06397eb825eb2faca37d77732c9a97
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit a2f4c560f1)
2016-03-18 10:43:07 +08:00
Chris Zhong
e965c04156 UPSTREAM: clk: rockchip: add id for mipidsi sclk on rk3288
Adds a new id for the sclk supplying the mipidsi on rk3288 socs.

Change-Id: Ifc3b97e4feed01098b483162d6320240d4b44cb3
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit c6d49fbcfc)
2016-03-18 10:42:39 +08:00
Zain Wang
8bc172170c UPSTREAM: clk: rockchip: add an id for rk3288 crypto clk
Add an id for crypto clk to the binding header, so that it can be called
in other part.

Change-Id: I541f4373cb2753aa74e2183cae82215e31faae44
Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 94d5d6a0fb)
2016-03-18 10:41:31 +08:00
xiaoyao
16ba0187db ARM64: dts: add eMMC/sdio/sd nodes for rk3399 sdk
Change-Id: Ia8bcfcb8938927cae7c970e2be02466c95ff7021
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
2016-03-18 10:29:49 +08:00
David Wu
d4d9489f5e ARM64: dts: rk3399: add pinctrl for uart
Change-Id: I8c48826d789bb48f234aa82014754dd519888d07
Signed-off-by: David Wu <david.wu@rock-chips.com>
2016-03-18 10:26:03 +08:00
David Wu
774211f3fe ARM64: dts: rockchip: fix i2c clk for rk3399
Change-Id: I2edcdb4955d9ae5659d2a8f6f5c5e5b089759d9f
Signed-off-by: David Wu <david.wu@rock-chips.com>
2016-03-17 18:21:50 +08:00
David Wu
6345180a58 ARM64: dts: rockchip: fix gpio clk error for rk3399
Change-Id: I8efd8007b17cc054a8e0bd20d1ccc89f7cf26ee8
Signed-off-by: David Wu <david.wu@rock-chips.com>
2016-03-17 02:33:06 +08:00
Huang, Tao
24547f526e ARM64: dts: rk3399: add PSCI node
Add PSCI node for RK3399 SoC, and cpu node enable-method property is
set to "psci".

Change-Id: I24f348b379435da88fe33f01e4b726e2e0210a9d
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2016-03-17 16:09:13 +08:00
Huang, Tao
0b622df349 ARM64: dts: rk3399: add pmu node
Change-Id: I1f3226749f66a1c2c61b9aec4fb7acba17e88135
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2016-03-17 16:02:07 +08:00
Huang, Tao
0f13a2d669 ARM64: dts: rk3399: fix arch timer irq type
Should be low level triggered.

Change-Id: Ie092cac9d262947ffc6294bc71cbb2efe73f3885
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2016-03-17 15:57:35 +08:00
Jianqun Xu
a21175a163 ARM64: dts: rockchip: add wdt0 for rk3399
There are two watchdogs in ALIVE named WDT0 and WDT1, and
one watchdog in PMU named WDT2.

WDT0 can drive CRU to generate global software reset.

Change-Id: Ide47e7e69572d2f2a537b590dc75010cf0f56c51
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2016-03-17 15:20:01 +08:00
Feng Xiao
d9a31f9ee0 ARM64: dts: rockchip: rk3399: add cpu dvfs support for tb
Change-Id: I707ebf8b4ba045401ebb3e609d511a8eb0883120
Signed-off-by: Feng Xiao <xf@rock-chips.com>
2016-03-17 15:04:48 +08:00
John Keeping
80f51d168d UPSTREAM: drm/atomic-helper: Export framebuffer_changed()
The Rockchip driver cannot use drm_atomic_helper_wait_for_vblanks()
because it has hardware counters for neither vblanks nor scanlines.

In order to simplify re-implementing the functionality for this driver,
export the framebuffer_changed() helper so it can be reused.

Change-Id: I80e2dc3b412d2299e6d97a9421e928dc32a9b63e
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit c240906d36)
2016-03-17 13:57:17 +08:00
Shawn Lin
11afcabf09 mmc: sdhci-of-arasan: keep consistent with upstream
This patch manually amend some code to keep local
branch more consistent with upstream.

Change-Id: If705983f84ade4e7cebb45db8a65d34b876c7bef
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2016-03-17 11:20:11 +08:00
Feng Xiao
3d9013f5db ARM64: dts: rockchip: rk3368: fix cpu get regulator and clock error
we only add the property of regulator and clock to cpu0 and cpu4 node,
but if cpu4~cpu7 is down and then we up cpu5~cpu7, they will can not
get their regulator and clock. So we should add the properties to all
cpu node.

Change-Id: Id601fa3d3d05875f7c68f2a5472dc0eefefb6096
Signed-off-by: Feng Xiao <xf@rock-chips.com>
2016-03-17 11:04:01 +08:00
Shawn Lin
5e9b025b5f ARM64: rockchip_defconfig: enable emmc phy driver
Change-Id: If555e77e60dc64782cc071ec8b78a0fdceaf9173
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2016-03-17 11:02:33 +08:00
Jianhong Chen
17a142516d ARM64: dts: rk3366-tb: disable vdd_arm when deep sleep
Change-Id: Iffce92e3412eeee36b735a8db5fdc08f532c3894
Signed-off-by: Jianhong Chen <chenjh@rock-chips.com>
2016-03-17 11:01:57 +08:00
John Keeping
65ca3ed1ab UPSTREAM: drm/rockchip: respect CONFIG_DRM_FBDEV_EMULATION
If DRM_FBDEV_EMULATION is not selected in the config then we can save a
bit of space by not including the framebuffer code.

Change-Id: I57b8888ebed0a0980e04a908116ad843b2fad556
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: John Keeping <john@metanate.com>
(cherry picked from commit f0442df215)
2016-03-17 09:42:06 +08:00
Mark Yao
c9d0bdaa2b UPSTREAM: drm/rockchip: fix wrong pitch/size using on gem
args->pitch and args->size may not be set by userspace, sometimes
userspace only malloc args and not memset args to zero, then
args->pitch and args->size is random, it is very danger to use
pitch/size on gem.

pitch's type is u32, and min_pitch's type is int, example,
pitch is 0xffffffff, then pitch < min_pitch return true, then gem will
alloc very very big bufffer, it would eat all the memory and cause kernel
crash.

Stop using pitch/size from args, calc them from other args.

Change-Id: I867d61bf6bc48a2989ae4d15a819a85a7e38d26f
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
(cherry picked from commit e3c4abdb3b)
2016-03-17 09:42:06 +08:00
John Keeping
c1dc2dc568 UPSTREAM: drm/rockchip: explain why we can't wait_for_vblanks
Change-Id: I073cf5b91554a293009a121845ac1bf3b6b3e6ce
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: John Keeping <john@metanate.com>
(cherry picked from commit c9ad1d9946)
2016-03-17 09:42:05 +08:00
John Keeping
ba63cef87f UPSTREAM: drm/rockchip: don't wait for vblank if fb hasn't changed
As commented in drm_atomic_helper_wait_for_vblanks(), userspace relies
on cursor ioctls being unsynced.  Converting the rockchip driver to
atomic has significantly impacted cursor performance by making every
cursor update wait for vblank.

By skipping the vblank sync when the framebuffer has not changed (as is
done in drm_atomic_helper_wait_for_vblanks()) we can avoid this for the
common case of moving the cursor and only need to delay the cursor ioctl
when the cursor icon changes.

We cannot add the check on legacy_cursor_update since that results in
the cursor bo being unreferenced while the hardware may still be reading
it.  Fully supporting unsynced cursor updates is left for the future
when the atomic helper framework supports async updates.

Change-Id: I4c0e4b51ec7441fb7b7342eac5d4b98f9ca5ee62
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: John Keeping <john@metanate.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit f2227f4697)
2016-03-17 09:42:05 +08:00
Andrzej Hajda
b498b62d76 UPSTREAM: drm/rockchip/dsi: fix handling mipi_dsi_pixel_format_to_bpp result
The function can return negative value so it should be assigned to signed
variable.

The problem has been detected using patch
scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci.

Change-Id: Ide4daa64ce996d125b2f698e6f2d4899591e8065
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Chris Zhong <zyw@rock-chips.com>
(cherry picked from commit 484bb6c969)
2016-03-17 09:42:05 +08:00
Mark Yao
3cbac01510 UPSTREAM: drm/rockchip: cleanup unnecessary export symbol
Now rockchip_drm_vop.c is build into rockchipdrm.ko, so
no need to export following symbol anymore:
    rockchip_drm_dma_attach_device
    rockchip_drm_dma_detach_device
    rockchip_drm_dma_attach_device
    rockchip_drm_dma_detach_device
    rockchip_register_crtc_funcs
    rockchip_unregister_crtc_funcs
    rockchip_fb_get_gem_obj

Change-Id: Ic6cc7cb83efca4f74f1e70e3568abdfb83d2886f
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
(cherry picked from commit 63087aae5a)
2016-03-17 09:42:05 +08:00
John Keeping
ec4cbab9bb UPSTREAM: drm/rockchip: vop: fix mask when updating interrupts
Commit dbb3d94 (drm/rockchip: vop: move interrupt registers into
vop_data) introduced new macros for updating the interrupt control
registers but these always use the mask from the register definition
without refining it for the particular bits that are being changed.

This means that whenever we enable/disable a particular interrupt we end
up disabling all of the others as a side effect.

Change-Id: I3b0f2574315f3655c183c21143b0bca7cdd9f6fa
Signed-off-by: John Keeping <john@metanate.com>
(cherry picked from commit c7647f8681)
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2016-03-17 09:42:05 +08:00
Mark Yao
9de6f30164 UPSTREAM: drm/rockchip: Don't build rockchip_drm_vop as modules
rockchip_drm_vop's module init had moved to rockchip_vop_reg.c
so no need to build rockchip_drm_vop.ko

Change-Id: I36da6a2741a250f3344b9febcd0c74539a861798
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
(cherry picked from commit ce90d092bc)
2016-03-17 09:42:04 +08:00
Chris Zhong
93a34472c4 UPSTREAM: drm: rockchip: Support Synopsys DW MIPI DSI
Add support for Synopsys DesignWare MIPI DSI controller which is
embedded in the rk3288 SoCs.

Change-Id: Ic450633c683520361926a676191426349376803e
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Acked-by: Mark Yao <mark.yao@rock-chips.com>
(cherry picked from commit 84e05408fc)
2016-03-17 09:42:04 +08:00
Chris Zhong
d6fce1adfb UPSTREAM: drm/rockchip: return a true clock rate to adjusted_mode
Since the mipi dsi driver need to use the clock of vop to make the
calculation of Blanking. But sometimes the clock driver can not set a
accurate clock_rate for vop, get it by clk_round_rate before mode_set,
so we can get the true value.

Change-Id: I04e6a499763258c2e16a09e3a59cf3a1e4593706
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Acked-by: Mark Yao <mark.yao@rock-chips.com>
(cherry picked from commit b59b8de314)
2016-03-17 09:42:04 +08:00
Stephen Rothwell
ca49d45391 UPSTREAM: drm/rockchip: vop: export vop_component_ops to modules
Fixes: a67719d182 ("drm/rockchip: vop: spilt register related into rockchip_reg_vop.c")

Change-Id: I4c855f65e684c08f8648547dcf16aa657c6ae5db
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 54255e818e)
2016-03-17 09:42:04 +08:00
Mark Yao
4e5345ff3b UPSTREAM: drm/rockchip: vop: add rk3036 vop support
RK3036 registers layout is quite difference with rk3288 layout,
The IC design with different framework, rk3036 vop is VOP LITE,
and rk3288 is VOP FULL.

RK3036 support two overlay plane and one hwc plane, max output
resolution is 1080p. it support IOMMU, and its IOMMU same as
rk3288's.

Change-Id: Ib713b252dc6f2d4bffa3183698768c6f23236ccf
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
(cherry picked from commit f767345350)
2016-03-17 09:42:04 +08:00
Mark Yao
21464efe46 UPSTREAM: drm/rockchip: vop: spilt scale regsters
There are two version scale control register found on vop,
scale full version found on rk3288, support extension registers.
and scale little version found on rk3036, only support common scale.

Change-Id: Iea1f253f363e062d49390fa51c304a2c109c39c6
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
(cherry picked from commit 1194fffbb1)
2016-03-17 09:42:03 +08:00
Mark Yao
62b17da2e9 UPSTREAM: drm/rockchip: vop: spilt register related into rockchip_reg_vop.c
No functional updates. Spilt register related into another file
would be nice to multi vop driver,

Change-Id: I811b12a57b03c24eb420d0c3fa0833f412bd258c
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
(cherry picked from commit a67719d182)
2016-03-17 09:42:03 +08:00
Mark Yao
d0084393a3 UPSTREAM: drm/rockchip: vop: move interrupt registers into vop_data
Move interrupt registers into vop_data, so it can use at multi-vop driver

Change-Id: I3183fb3c97e76d58dbdab2f2df34480ee2e74b31
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
(cherry picked from commit dbb3d94444)
2016-03-17 09:42:03 +08:00