make sure the clk is enabled when read/write qos regs.
Change-Id: Ia88453504bcfd612a86537c4b12d3fd5b53f3d76
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
As gpu power on and off frequently, and the interval time is smaller
than the polling time of devfreq, add power-off-delay function to
ensure devfreq work fine.
Change-Id: Iba2405c9ead91a437233f1fedf2f3555703aa9e1
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
just to compatiable with android sdk, anyway, change it.
Change-Id: I60341c5a8a9050172c6abaca396957442f42434e
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
this patch disable spdif sound in rk3399-evb.dtsi, and enable on
product dts side as required.
Change-Id: Icf61f13aeafdfae4c7a52603ce23cf2c04c27ab4
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
There are too many NOC clocks and all of them are critical clocks.
This approach is unnecessary, we only remove them and keep them
always enable, and caused by increased power consumption is only
<=3ma.
Change-Id: I6968dd9fe5632853fade831260d0cbeeb9f8fda3
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
To simplify the description of the clock for RK3399, we don't need to
add many GRF gates clock nodes and keep them always enable,
In this case, we can avoid some of the operations GRF registers exception
problems, and caused by increased power consumption is only <=1ma.
Change-Id: Ifee9df2d5f869607191c5fb1165ec3e36e7bef9d
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Rk3399 support single and burst mode, and flushp instruction.
But burst mode improve transfer efficiency.
Please refer to:
Commit 8e770f371c
"dmaengine: pl330: add burst mode according to dts config"
Change-Id: I2eb36723697cf548dc75aca0e5a276a86cd2419d
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Rk3366 support single and burst mode, and flushp instruction.
But burst mode improve transfer efficiency.
Please refer to:
Commit 8e770f371c
"dmaengine: pl330: add burst mode according to dts config"
Change-Id: I5e3fef4684f324dda015c0afd73535c062952fc1
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Because rk3368 pl330 dma controller doesn't support single
mode, so it is necessary to set peripherals-req-type-burst.
Please refer to:
Commit 8e770f371c
"dmaengine: pl330: add burst mode according to dts config"
Change-Id: I44de28cca0085bc3d8f25a5913dbb527c36d8f83
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Because rk3288 pl330 dma controller doesn't support single
mode, so it is necessary to set peripherals-req-type-burst.
Please refer to:
Commit 8e770f371c
"dmaengine: pl330: add burst mode according to dts config"
Change-Id: Ic972880807e858334a1df8fa3f9bb567a8078ff9
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Pl330 integrated in rk3368 platform doesn't support
DMAFLUSHP function. So we add arm,pl330-broken-no-flushp quirk
for it.
Change-Id: Ia7f4bb6ffa1fba01dac5ac2257499dbbc9887da6
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Pl330 integrated in rk3xxx platform doesn't support
DMAFLUSHP function. So we add arm,pl330-broken-no-flushp quirk
for it.
Change-Id: Ibea3bc46e460bf2cf6253e6cc1eea109f651163e
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
commit 9bed8b41d8)
Pl330 integrated in rk3288 platform doesn't support
DMAFLUSHP function. So we add arm,pl330-broken-no-flushp quirk
for it.
Change-Id: I7ebd9fdd9b17b9a05e2ae859fab6b62f2967d9e5
Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
commit e7d6c9b116)
As the rk3036 only support the burst mode, so we need add it since
The commit 8e770f371c
"dmaengine: pl330: add burst mode according to dts config"
had been supported in kernel.
Change-Id: I074aa9a98c78a8ad8b1263a07690ffc2f8dfa718
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
This patch is only here to be able to test provisioning of energy related
data from an arch topology shim layer to the scheduler. Since there is no
code today which deals with extracting energy related data from the dtb or
acpi, and process it in the topology shim layer, the content of the
sched_group_energy structures as well as the idle_state and capacity_state
arrays are hard-coded here.
This patch defines the sched_group_energy structure as well as the
idle_state and capacity_state array for the cluster (relates to sched
groups (sgs) in DIE sched domain level) and for the core (relates to sgs
in MC sd level) for a Cortex A7 as well as for a Cortex A15.
It further provides related implementations of the sched_domain_energy_f
functions (cpu_cluster_energy() and cpu_core_energy()).
To be able to propagate this information from the topology shim layer to
the scheduler, the elements of the arm_topology[] table have been
provisioned with the appropriate sched_domain_energy_f functions.
Change-Id: I8c014bbd04f6a1d57892be9bfa16affe07948dcf
cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Dietmar Eggemann <dietmar.eggemann@arm.com>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
