`hdr_extend->hdr_type` add vivid hdr platform flag in bit[15:8]
to differentiate between different platforms in the future.
At present, only support rk3528/rk3576 vivid hdr, there is no
need to deliberately distinguish.
Change-Id: Id6e5dbc648358254e84397edc86a5e0c8cf97d8e
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
If rk3576 acm update parameters, there is no need
to disable acm in the first frame.
Change-Id: Ibcb43fc6ddecb250c3454c66fea2646a16969586
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
1.Support sharp work in rgb bus-format:
Sharp must work in yuv overlay. If bus-format
is rgb, post csc must perform r2y conversion.
2.Keep sw_sharp_enable always on:
sw_sharp_enable is sharp's master switch. When
enable/disable sw_sharp_enable will be a brief
black screen in some TVs.
Therefore, it is necessary to keep sw_sharp_enable
always on and enable/disable sharp function by
switching sharp submodule.
Change-Id: Ia1d21b02d30f82e59ab3d82b8b914ee439cba52a
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Choose post csc mode directly by the color format and
color range of csc input/output.
Change-Id: Ib809e5898fd8a0178758e50ae9b8dfc4b8b63335
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Disable vdd_gpu when gpu is suspended to save power.
Signed-off-by: Liang Chen <cl@rock-chips.com>
Change-Id: I3c983fd9ab153e37bbde6adf609a368b1c0b6b4b
Before the patch, the possible_crtcs in struct vop2_win_data
is used to register planes for DRM. But the index in struct
drm_crtc may be different from the id in struct vop2_video_port,
it may cause the warning:
[ 3.105377][ T10] Bogus primary plane possible_crtcs: [PLANE:56:Esmart1-win0] must be compatible with [CRTC:72:video_port1]
[ 3.105395][ T10] WARNING: CPU: 6 PID: 10 at drivers/gpu/drm/drm_mode_config.c:669 drm_mode_config_validate+0x380/0x4f0
To fix it, replace the possible_crtcs with possible_vp_mask
in struct vop2_win_data, which indicates the limitation by
vp id exactly, and add the vop2_win_get_possible_crtcs() to
calculate exact possible_crtcs for registration process.
Change-Id: Iaa866e90c894b9422f55872d0c5e7056f44dd489
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
For pwm v4, the disable operation, which sets polarity
to inactive state, will not take effect until the end
of current period.
Change-Id: Ie632b69d06495d96b79b9c743e69175cd5c175ed
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
For RK3588, if DP attached vp dclk parent is from v0pll, current vp dclk no need to use
hdmi phy pll; For RK3576, if DP attached vp dclk parent is from vpll, current
vp dclk no need to use hdmi phy pll;
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: If32d12df0df028cda48c7d0a5fd4e5513ec11265
This reverts commit d8e2297958.
Remove Android only config.
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I6b535afac162b21e898954c4749c8103eb5a6945
This reverts commit d2573a1eaa.
Remove Android only config.
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ib0a42db69125af41423bab2f2bc5ae474ff66c5b
Only using CONFIG_PCIEASPM_ROCKCHIP_WIFI_EXTENSION macro limitaition.
Change-Id: Ice14105ef12704f6639dc37398b5d872dca7fb0c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
failed
when some issue happen when disable/enable mst port, not to
break the disable/enable process is better. If the process
is broke, something wrong may appear for vc time slots alloc.
Change-Id: I621834ca7d73c2701352eaf327fdd2e3c13bb2f4
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
For Octal flash, it is possible that the pre Kenrel stage has
already been initialized to a specific IO mode in the flash.
To avoid abnormal initialization processes, it is necessary to
reset the device first.
Change-Id: I7a80aa510758697022ef2b9af7b6364e7d253ce7
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Part of ROCKCHIP SOC FSPI ip has only one CSN function io, and since
the limitation of spi-mem which is not support cs-gpios, add sfc-cs-gpios
for cs extension.
Change-Id: Ie3614e306a3c6eb5dff0631b13a58243abfc7d23
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Use lineflag or linebuffer almost full signal to trigger dmc.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I25e0bfb1d50dc13eb23d08145b938c4bf982398e
If the usbdpphy power supply is turned off, it needs to
clamp phy output, Otherwise, it may cause system exception
and power leakage.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Ic35adb96d540358db34000bd137275fd7392bf7c
Add "rockchip,usbdpphy-clamp" property to clamp usbdpphy
output when usbdpphy power off.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Ib639f0cc0fecd6e7b9f0c3ad3ac5d26204eb7921
The rk3576 use pipe_phymode to select MMU for PCIe/
SATA/USB controllers, and the pipe_phymode default
value is 2'b00 which used for PCIe mode. So it needs
to set pipe_phymode for usb even if use usb2 port
only.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I60a0fcb8a1ebb1123f3e9cefe0ea3cce73ab8bca
Since the usbdp phy driver parses "maximum-speed"
property in the parent's node not the child, this
amends all the related DT to fix it.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I1b8b2bca5c5387ad066a8c4cb59f59563ee615d5
Fixes: be2891ed31 ("mtd: torturetest: Support random pattern")
Change-Id: I2c79f8391298e2f11ae69126619d670a83de6d0f
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
The SC89890H supports boost converter operation to
deliver power from the battery to other portable devices
through USB port.
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: If182ddcee7e1f655cc9059df0b4f9ab5a9980667
1. fix multistream scaling ouput error
2. fix ack 594 and core clk 297, ldcv output no interrupt
3. fix error of rkisp_sditf_of_match when kasan enable
The buggy address belongs to the variable:
rkisp_sditf_of_match+0xc8/0x100
Change-Id: I1bd251ab93d24a62c80ca3a36a5ff1b004466ebb
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
SFC after version 8 supports dtr mode, so the IO is the binary output of
the controller clock.
Change-Id: I6ed599e15dc23a22c73c6de0e76cc966f98c3b7d
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>