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Author SHA1 Message Date
Simon Xue
6ff86d87fd iio: adc: rockchip_saradc: fix interrupt issue 
Saradc interrupt status may exist forever if read saradc
when system suspending which disable clock that finally
lead to interrupt system dead. Add mutex in suspend to
avoid this issue.

Change-Id: I6a83e4bd79db90a79985685b5e94df2209b5ae81
Signed-off-by: Simon Xue <xxm@rock-chips.com>
 2021-09-27 17:25:06 +08:00
Steven Liu
dcc20720d0 serial: 8250: fix 8250_dwlib.c gki error 
Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Change-Id: I49c2797bd0c9ac4d7461910555a4a371d407cbd2
 2021-09-27 16:53:51 +08:00
Tao Huang
8d1c43f7b4 video: rockchip: mpp: Turn sub device driver Kconfig option into bool 
Only one rk_vcodec ko.

Fixes: 5b15717952 ("video: rockchip: mpp: new video codec driver")
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I58408cbee1edf11d29b4917aca2eeaef563ed8ce
 2021-09-27 14:35:38 +08:00
Tao Huang
a085c0009e arm64: rockchip_gki.config: All mpp sub config as bool 
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I45d9d48bcbf7aedf93d51c1edb4ea4eb4bcaca17
 2021-09-27 14:33:06 +08:00
Tao Huang
f9686c89d4 arm64: rockchip_gki.config: Enable CONFIG_SW_SYNC as module 
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ib00f8f20c47f8b6814d5782ea6d68f7e28b22a4d
 2021-09-26 15:48:46 +08:00
Sandy Huang
70e8a5ecc4 dma-buf/sw_sync: build sw-sync as module for gki 
Fixes: da8f900b52 ("dma-buf/sw_sync: sw_sync register as misc devices")
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: If012d5f85b261690cb172b7b61b98212406f6a3d
 2021-09-26 15:46:54 +08:00
Wyon Bi
ff9626ac6c mfd: Drop unused rk610/rk616 driver 
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I76c73d0c565b04261a099373c7a9200d6058b8ec
 2021-09-26 14:26:14 +08:00
Jon Lin
c35d2e69de arm64: dts: rockchip: rk3588s: Add num-cs property to spi 
Change-Id: I62470b378ac631c37debac45001c2ae59ec26377
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-09-26 14:23:20 +08:00
Jon Lin
7703ddf608 arm64: dts: rockchip: rk3568: Add num-cs property to spi 
Change-Id: Ie5986d2995d21cb4bcfddd43ca4866de53b75c66
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-09-26 14:23:20 +08:00
Jon Lin
0b17f9b3f1 spi: rockchip: Fix error in getting num-cs property 
Get num-cs u32 from dts of_node property rather than u16.

Change-Id: I265c8c696f1ff884ce6e7690d9c886a2ed1bd267
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-09-26 14:23:20 +08:00
Cai YiWei
4645dbe6ed media: rockchip: isp: get sensor channel information 
Change-Id: I6b5f1a03844b0e2929c29e8253889c8ae69349b3
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2021-09-26 10:42:25 +08:00
Cai YiWei
8f300e22f9 media: rockchip: isp: compiled with differe hardware version 
Change-Id: Ic18a8ba5005e14f9676716fc9b089ed81bdd38b0
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2021-09-26 10:42:25 +08:00
Cai YiWei
3e5d8a772f media: rockchip: isp: enable soft reset for other isp version 
Change-Id: I620718f555f091d2ca53214c3fd3cd1a44107692
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2021-09-26 10:42:25 +08:00
Cai YiWei
79b33b499e media: rockchip: isp: fix input crop config for isp21 multi device 
Change-Id: I6185273f8474e151ee26c938b8825af383fb73e3
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2021-09-26 10:42:25 +08:00
Cai YiWei
c6fc3119d6 media: rockchip: isp: remove associated of cproc and ie 
Change-Id: Ic4d6171398322e24993e4a0419fd43fae85672b8
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2021-09-26 10:42:25 +08:00
Cai YiWei
bbeb468d79 media: rockchip: isp: add frame loss info to procfs 
Change-Id: Idecd94535da352fcde5f2a462d4596316f9ea049
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2021-09-26 10:42:25 +08:00
Cai YiWei
6bb1c3663d media: rockchip: isp: selfpath bytesperline 16 align 
Change-Id: I39b36e7e3a8c483f5c77ddbea0f6bebb4e1a0b0a
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2021-09-26 10:42:25 +08:00
Cai YiWei
4ab1cc1b50 media: rockchip: isp: off unused interrupt of csi 
Change-Id: Iecbd33f2f48dc73fc34af8ee90738db031ee2ffe
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2021-09-26 10:42:25 +08:00
Jon Lin
ae928f50c7 spi: rockchip: Preset cs-high and clk polarity in setup progress 
After power up, the cs and clock is in default status, and the cs-high
and clock polarity dts property configuration will take no effect until
the calling of rockchip_spi_config in the first transmission.
So preset them to make sure a correct voltage before the the first
transmission comming.

Change-Id: Ib00336a3ebda6e04bdb33c56c7da419bfb6efdd9
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-09-24 17:28:24 +08:00
Simon Xue
6a355e5f9a iommu/rockchip: fix vop blocked and screen black on RK356X and RK3588 
RK3568 and RK3588 has the same issue as RV1126/RV1109 that caused by
dte fetch time limit, So we can set BIT(31) of register 0x24 default
to 1 as a workaround.

Change-Id: Ib0d1fd110aa0349145a63f7c4be5ce77ed6ab4e4
Fixes: 7f8158fb41 ("iommu: rockchip: disable fetch dte time limit")
Signed-off-by: Simon Xue <xxm@rock-chips.com>
 2021-09-24 17:27:27 +08:00
Wyon Bi
bd4cd9a4c9 arm64: dts: rockchip: rk3588: Add hdptxphy1 node 
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Ie8f483dd86e7279beed2b7e9aa7c00ec2be930e6
 2021-09-24 17:27:27 +08:00
Yu Qiaowei
b41b6ffed6 video/rockchip: rga2: Modify the memory check of dma buffer. 
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I9f51a0ec08c49a86b70c775cc9e81f3d70384553
 2021-09-24 17:27:27 +08:00
Andy Yan
585789020e drm/rockchip: vop2: configure half_block_en bit in all mode 
First we thought the half_block_en bit in AFBCD_CTRL register
only work in afbc mode. But the fact is it control the line buffer
in all mode(afbc/tile/line), so we need configure it in the
all case.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ib8cd5fbfd0a898eea738423685fbcdc0ab6d00ad
 2021-09-24 17:27:27 +08:00
Andy Yan
240d8a3bd7 drm/rockchip: set output_if for rgb connector 
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I6c832a1e7fd8cca69da5f6cfdd9681d72696d67a
 2021-09-24 17:27:27 +08:00
Andy Yan
dc3a451bf1 drm/rockchip: set output_type as DRM_MODE_CONNECTOR_DPI for RGB interface 
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I81cce6e4f3323ae2b6ba2b20916a0875c36d41fb
 2021-09-24 17:27:27 +08:00
Andy Yan
1ec9f0640d drm/rockchip: Specific port_id when use of_graph_get_port_by_id in rgb 
This is prepare for vop2 which has multi ports.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ibca577d7738705fa425a07fbc5ea5d867b7693d7
 2021-09-24 17:27:27 +08:00
Andy Yan
74fb3941eb drm/rockchip: make VOP_FEATURE_ definitions public for all vop versions 
Definition VOP_FEATURE_OUTPUT_RGB10 and VOP_FEATURE_INTERNAL_RGB
are from upstream, so we move our private definition VOP_FEATURE_AFBDC
and VOP_FEATURE_ALPHA_SCALE to other bits.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I44a4f4864bd7d82af120dfe361b9af700d7d8ae9
 2021-09-24 17:27:27 +08:00
Yu Qiaowei
1b8283e911 video/rockchip: rga2: Added support for ARGB format 
Add ARGB8888/XRGB8888/ARGB5551/ARGB4444/ABGR8888/XBGR8888/ABGR5551/ABGR4444.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I9eb8f5fbcc1a87a5750b7dc2eaf808f8395856a0
 2021-09-24 17:27:27 +08:00
Yu Qiaowei
50ec41b5c2 video/rockchip: rga2: Optimize the process of mapping dma. 
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Ie8d140d8fc102c9a3677b266ac7848c4c3ade78e
 2021-09-24 17:27:27 +08:00
Sandy Huang
c15fbd9827 drm/rockchip: vop: add support yuv10bit format 
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I720fd9809ed2b628afae086aa64958fdbe4ee2de
 2021-09-24 17:27:27 +08:00
Sandy Huang
f4725608d9 drm/rockchip: vop: add support afbc format 
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Idff1ac169854d7338eb63ae49a8ed0496659298e
 2021-09-24 17:27:27 +08:00
Sandy Huang
3c95a80fe2 drm/rockchip: drv: delete some unused property 
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I6802fe7b92ac8993cb48135fa3a77547ee44b43a
 2021-09-24 17:27:27 +08:00
Sandy Huang
110feb525a drm/rockchip: vop: add and remove some property 
add and remove some property to compatibility with hwc 2.0

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I8239ce40e30da6e2be55e0ccfa6748816c0fcf2a
 2021-09-24 17:27:27 +08:00
Sandy Huang
a2fcc90d0d drm/rockchip: vop2: use property create by rockchip drm drv 
As some property can be used by both of rockchip_drm_vop2.c and rockchip_drm_vop.c,
so we delete some property create at vop2.c and instead by rockchip drm driver
common property.

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: If4f327db79a455da75c7d4af04d2fe3aab19a6f0
 2021-09-24 17:27:26 +08:00
Sandy Huang
cd392c00db drm/rockchip: drv: add common property for vop and vop2 
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ied641fcf9843c1a39500ece1d15913a5405efa38
 2021-09-24 17:27:26 +08:00
Wyon Bi
7efebce0d3 arm64: dts: rockchip: rk3588s: Add hdptxphy0 node 
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I7e0ffe2338ac26c7c006312d5689d5f6f3fbebea
 2021-09-23 11:42:20 +08:00
Frank Wang
bfc9c2149e usb: dwc3: core: fix runtime suspend at probe 
Just put runtime suspend synchronously for otg mode at dwc3 probe time.

We found that the USB3.0 HUB which integrated in rk3399-evb-ind board
could not be enumerated at the system boot time, and the reason is
the USB controller has been suspended when the HUB gets ready.

Fixes: d8b7417bea ("usb: dwc3: core: allow pm runtime for rockchip platform")
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: I19600f327d97cb992994d280645a00069dc9e8d2
 2021-09-23 11:40:37 +08:00
Jon Lin
dac6b60a6b drivers: rkflash: Not recheck the cache for XTX devices 
Change-Id: I440b3a07d86bbdcbeaa6ab4b5282623bf6cb74c7
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-09-23 11:08:14 +08:00
Jon Lin
f70babda2a spi: rockchip-sfc: Wait for SFC DMA finished when thunder boot 
Change-Id: Ia7b47231a1a3fabb059d734228443e52fa4ffa99
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-09-23 10:20:39 +08:00
Jon Lin
7c03ed057c mtd: spinand: core: Support suspend/resume/shutdown 
Spinand may power off after suspending, so the corresponding resume
process is necessary.

Change-Id: I36c7dbf23877b342dfe9e7fb0c8eb4885bd46d71
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-09-22 16:53:58 +08:00
Jon Lin
eac6cdbe01 spi: rockchip-sfc: Support pm ops 
Support system_sleep and runtime_pm ops.

Change-Id: I804e8349a018a10a0d242bb4baed4a99eebdc761
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-09-22 16:53:22 +08:00
Jon Lin
ad26535135 mtd: spi-nor: gigadevice: Add support gd25lq255e 
Change-Id: Iee74cbf20dbdbc00637d77a17369b837cbfc29c6
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-09-22 11:44:22 +08:00
Jon Lin
50d9b0f00d arm64: dts: rockchip: rk3588s: add fspi node 
Change-Id: I2ed03186dd44df514807fd478d41f11b8377ff27
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-09-20 18:23:33 +08:00
Wangqiang Guo
50b7c0d91b input: sensor: light/proximity sensor: support stk3332 
Signed-off-by: Wangqiang Guo <kay.guo@rock-chips.com>
Change-Id: Ie95e465c424c9a9fb0845a1bf202c1ac8f5384bb
 2021-09-18 19:45:46 +08:00
Zefa Chen
1b8544199b media: i2c: gc4663 support get channel info by ioctl 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Ifa2c09a1037d904a5a2e830f89d638e97c9287e8
 2021-09-18 18:24:26 +08:00
Zefa Chen
353786437f media: i2c: gc4c33 support get channel info by ioctl 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Idf494c4f1165aa366a12c89debdafbc4050914de
 2021-09-18 16:36:40 +08:00
Zefa Chen
7b2d30900b media: i2c: gc8034 support get channel info by ioctl 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I022c952ea91dce5e05fb2e1d3d519b110bedfd4d
 2021-09-18 16:29:17 +08:00
Zefa Chen
852184c799 arm64: rockchip_gki.config: Enable CONFIG_VIDEO_ROCKCHIP_CIF 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I490384a059f308f0c1ed16b6bf0adba78cab51ef
 2021-09-18 15:51:46 +08:00
Zefa Chen
7040b686df media: rockchip: cif: fix compile error 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I56537c637deb714f186e163227c194b65968c187
 2021-09-18 15:47:08 +08:00
Zefa Chen
b40c3ebafe media: rockchip: cif get channel info for sensor driver 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I696fd8faf01251760771bfaefde9d5d1a1e27c46
 2021-09-18 15:43:32 +08:00