陈亮
76f9c5ebbf
cpufreq: rename cpufreq_reboot_limit_freq to rockchip_cpufreq_reboot_limit_freq
2014-05-04 04:48:10 -07:00
陈亮
01eed837f6
reboot: lock core rate and volt(1.0V), cancle temp control, cancel ddr freq thread
2014-05-04 04:22:30 -07:00
陈亮
04de428e09
Revert "cpufreq: set core volt to 1.0V when reboot, and make sure core rate will not change any more"
...
reboot limit core rate at cpufreq.c may happen while ddr freq limit core rate.
it cause dvfs_clk_enable_limit restore wrong min && max;
This reverts commit 4cc5af311c
2014-05-04 02:00:29 -07:00
黄涛
238115300c
ARM: rockchip: dump kernel log to uart when panic or reboot/shutdown
2014-05-04 16:47:11 +08:00
xxm
afe5043b39
Documentation:Documentation/devicetree/bindings/iommu/rockchip,rk32-iommu.txt
2014-05-04 15:29:15 +08:00
xxm
98d6567e46
Documentation : Documentation/devicetree/bindings/arm/mali-midgard.txt
2014-05-04 15:29:15 +08:00
陈亮
4cc5af311c
cpufreq: set core volt to 1.0V when reboot, and make sure core rate will not change any more
2014-05-04 00:34:48 -07:00
lintao
ae0ea28b22
mmc: core: fix unbalanced pm_runtime_enable/disable
2014-05-04 15:02:03 +08:00
xxm
77356b196e
rockchip:iommu:reenable mmu page fault and bus error irq mask when host device enable it's mmu
2014-05-04 14:38:38 +08:00
xxm
49d1d490ce
rockchip:midgard : update gpu dvfs & use new comment
2014-05-04 14:36:19 +08:00
张晴
95495c4c3c
rk3288:rk808:get dc1\2 voltage when power off and reboot
2014-05-04 14:24:30 +08:00
张晴
a2f2439493
rk3288:rk808:get dc0\1 voltage when power off
2014-05-04 11:19:40 +08:00
hjc
5198023c6d
Documentation: add rockchip fb lcdc lvds specific content
2014-04-30 19:56:23 +08:00
dkl
d86c0abe7f
rk3288: fix the bug when dclk_lcdc select gpll as parent
2014-04-30 18:17:16 +08:00
hcy
db27b82256
pause SMP and fix idle clk gate when change ddr frequence
2014-04-30 18:09:08 +08:00
黄涛
8b95851682
ARM: rockchip: rk3288: fix pd gpu on/off
2014-04-30 18:08:25 +08:00
zyk
3d461e7c83
tp: vtl fix init warning
2014-04-30 17:53:01 +08:00
libing
9e41b24fe6
rk3288 mipi dsi: add rockchip_mipidsi_lcd.txt and rockchip_mipidsi.txt，in Documentation/devicetree/bindings/video/
2014-04-30 17:40:46 +08:00
郭毅
b056ccccbc
sensors: add rk_sensor.txt
2014-04-30 16:57:13 +08:00
wlf
600c7a69bd
USB: add Documentation/devicetree/bindings/usb/rockchip-usb.txt
2014-04-30 15:39:58 +08:00
ljf
6ae65bceed
rk3288: vcodec specialize the registers address transform (buffer id to virtual address) table for every video coding format
2014-04-30 14:28:44 +08:00
黄涛
0605110a15
ARM: rockchip: rk3288: fix pd video vio on/off
2014-04-30 12:00:58 +08:00
陈亮
0cfeec32da
rk3288: release temp limit in time when temp fall down
2014-04-29 20:09:27 -07:00
许盛飞
e623668278
pwm: add rockchip-pwm.txt
2014-04-30 10:49:48 +08:00
CMY
174296e734
rk: ion: fixed build bug
2014-04-30 09:46:49 +08:00
hjc
e5c9940340
Revert "rk fb: fix dts name for vop big and vop little mmu name"
...
This reverts commit fc4c39bc30
2014-04-30 09:43:16 +08:00
dkl
d64a67250b
rk3288: set RK3288_LIMIT_PLL_VIO1 to 410MHZ
2014-04-30 09:25:32 +08:00
CMY
f52cfbfccb
rk: ion: add version control
...
disable ion snapshot by default
fix build warn
2014-04-30 08:38:25 +08:00
黄涛
e17655ff42
ARM: rockchip: rk3288: pmu reset by second global soft reset
2014-04-29 18:27:38 +08:00
xbw
ced2d8b49c
Documentation: devicetree: bindings: mmc:
...
More detailed description of the specific content.
2014-04-29 17:25:23 +08:00
张晴
de0f0d2cbc
rk3288:ricoh619:add dc_det function,add ricoh619.txt
2014-04-29 11:15:29 +08:00
hjc
fc4c39bc30
rk fb: fix dts name for vop big and vop little mmu name
2014-04-29 10:56:55 +08:00
xxm
20eabb402c
rockchip : midgard :1,place rk_get_real_fps in rk_fb.h 2,correct macro limit_fps
2014-04-29 10:48:29 +08:00
张晴
f415a98e9f
rk3288:syb827:rename syb827 to syr82x for hardware modify
2014-04-29 09:53:12 +08:00
dkl
ae8444d7fc
rk3288: fix hevc clocks
2014-04-28 21:24:25 +08:00
dkl
259e973bd2
clk: rockchip: rk3288: make clk_cpll only used by dclk_lcdc/aclk_vio
2014-04-28 21:24:25 +08:00
dkl
ad11a1286b
clk: rockchip: add CLK_SET_RATE_PARENT_IN_ORDER
...
If the flag CLK_SET_RATE_PARENT_IN_ORDER is set, consider the
order of .set_parent and .set_rate, to prevent a too large
temporary rate on rate change. This will fix the bug of clk_gpu
in rk3288.
2014-04-28 21:24:24 +08:00
dkl
7348c1bed5
clk: rockchip: rk3288: adjust clock settings
...
1. add clkops_rate_3288_dclk_lcdc0/1
2. change gpll init_rate to 297M, and npll init_rate to 1250M
2014-04-28 21:24:24 +08:00
dkl
91019ca759
clk: rockchip: add clk_pll_ops_3188plus_auto
2014-04-28 21:24:24 +08:00
ljf
4c783a3f70
rk3288: fix the bug, release iomap area when probe vcodec failed causing system failure
2014-04-28 20:06:28 +08:00
zwl
c555b141ae
Doc: add rockchip_hdmi.txt in Documentation/devicetree/bindings/
2014-04-28 18:10:51 +08:00
lintao
89674ec027
Documentation: devicestree: bindings: mmc:
...
fix rockchip-dw-mshc.txt
2014-04-28 17:06:02 +08:00
zwl
cb3d792c14
rk3288 hdmi: add support csc function that RGB to YCbCr and RGB_0_255 to RGB_16_235
2014-04-28 16:12:41 +08:00
zyk
20a2e9cf69
tp :vtl delete pdf
2014-04-28 13:59:06 +08:00
陈亮
d25572ffd7
rk3288: temperature control add performance mode and normal mode
2014-04-27 21:48:45 -07:00
zyk
7fc41fd1ca
tp: vtl new driver
2014-04-28 11:54:54 +08:00
张晴
594bf2dd95
rk3288:syb827:set voltage by 10mv/2.4us
2014-04-28 10:26:01 +08:00
Cody Xie
f2c8edd965
rockchip midgard: 1. calculate fps in rk_fb; 2. limit fps to 60 for saving power
2014-04-28 09:43:46 +08:00
黄涛
a61f27e2ba
ARM: rockchip: rk3288: pll enter slow mode before reboot
2014-04-25 18:32:47 +08:00
wlf
6e918bae03
this commit cause host1 usb phy stop 480MHz clk output in suspend mode.
...
Revert "USB: set SIDDQ to place USB PHY into a low power state."
This reverts commit d4cb6899ac
2014-04-25 17:31:02 +08:00
