Commit Graph

854888 Commits

Author SHA1 Message Date
Elaine Zhang
77ff4b7d41 soc: rockchip: modify the config ROCKCHIP_PM_DOMAINS to tristate
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I09a067d6842fb0fef3329c4e3eb0701fa6f41968
2020-09-15 17:44:22 +08:00
Shawn Lin
039589f397 mmc: block: remove emmc_disk
emmc_disk is not used now, so remove it.

Change-Id: I8fb0fa17873bc3289c968db4c98f61040b02572c
Fixes: de208e40d9 ("mmc: porting legacy tactices into 4.19")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2020-09-15 17:38:50 +08:00
Jon Lin
6ee9b2276f drivers: rkflash: Simplify SPI Nand flash table
1.Simplify SPI Nand flash table
2.Support new SPI Nand devices
3.Format coding styles

Change-Id: Iae7b4c65e646aca5122d47dd9aecad67dbf83f7e
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-15 11:16:32 +08:00
Jon Lin
e362770348 drivers: rkflash: Remove SFC reset in initial progress
Only when the host work wrong, run SFC reset.

Change-Id: I582d5697e6166591171c71e099942fad522d972c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-15 11:16:15 +08:00
Ziyuan Xu
d3164ae64c rtc: pcf8563: make the 32k clock output to be always enabled
The WiFi needs a always-on 32.768k clock on rv1126-battery-v10 board.
The original driver disables the clock whilst registering the
*rtc_clk*, we have to avoid *disable* to make sure WiFi is available.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: Ia612b17a3d9fdef2a3d37ca2862c46b81db9133d
2020-09-15 10:20:00 +08:00
Uma Shankar
b5ae3f0458 UPSTREAM: drm: Drop a redundant unused variable
Drop a redundant and unused variable "hdr_output_metadata" from
drm_connector.

Change-Id: I7c85067ac698223f3db353a795f0cbfdbbce9c89
Suggested-by: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/1559159944-21103-2-git-send-email-uma.shankar@intel.com
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
(cherry picked from commit 848d56ddda)
2020-09-14 19:24:43 +08:00
Cai YiWei
12fea355c8 media: rockchip: isp: set clk depend on resolution for cif input
Change-Id: I0d87a9256863fab2e8412929baa8565ae860d9c9
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2020-09-14 19:20:52 +08:00
Cai YiWei
b873c8d42f media: rockchip: ispp: fix scl0 format check error
Change-Id: I05cdeb3461d0ce27060d3154159dd4f9f642222a
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2020-09-14 19:20:27 +08:00
Hu Kejun
0b1f30c59f media: rockchip: ispp: fix cannot change some shadow bits by only config function
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Change-Id: Ife16d5ec1eab82a3a30288dd91d5390d989b29d0
2020-09-14 19:20:08 +08:00
Hu Kejun
64ec71e36c phy: rockchip: mipi-dphy-rx: print data rate mbps to debug
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Change-Id: I010d4c7c6a78413e29a33b5695402be11ffb25da
2020-09-14 19:19:17 +08:00
Hu Kejun
c99031ad04 media: rockchip: cif: add more error log to debug
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Change-Id: If0d89b1741dca0a5c6bbeb0ae66a472e3a75dc12
2020-09-14 19:19:17 +08:00
Jon Lin
6ded55882d ARM: dts: rv1126: Set fspi_cs1n pin group
Change-Id: I7bbafd9d798aa1cd050bc00cee13e024520dee6d
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-14 18:25:49 +08:00
William Wu
c3a06d3145 usb: dwc3: gadget: avoid repeatedly resizing txfifos
The current code resize the txfifos for all assigned endpoints
when enable ep. If we config the USB function as UVC, the txfifos
will be resized every time when we open UVC. It's safely to resize
the txfifos if only UVC is used. However, if we config the USB
as a composite device (UVC + RNDIS), and if we resize the txfifos
when the RNDIS data transfer in progress, it may make the controller
broken.

To fix this issue, we only resize the txfifos the first time we
enable the isoc eps.

Change-Id: I6b4fa093bff1a9752fbbd7bd4401b998ff02ad23
Signed-off-by: William Wu <william.wu@rock-chips.com>
2020-09-14 16:50:30 +08:00
Wu Liangqing
084b599e12 driver: net: wireless: rtl8821cs fix clang build error
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
Change-Id: I6e3f66ed682ff795697ed7c664b1bf2d96be1031
2020-09-14 16:42:45 +08:00
Yu Qiaowei
e0159849f0 video/rockchip: rga2: invalidate dst page.
When dst needs to write data to the virtual address,
it needs to make the dst page invlaid after rga runs.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I7abf580fbca302dba043bb0f84d32cb0369e4e48
2020-09-14 16:37:31 +08:00
Yu Qiaowei
72fd43ac08 video/rockchip: rga2: Add invalidate cache.
Use dma_map_page/dma_unmap_page to flush cache.Users
need to call rga2_blit_flush_cache() to flush cache
according to their needs.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Ic929d3d4e5c1d23fae542481ca90ab6ba1680e0e
2020-09-14 16:37:31 +08:00
Jon Lin
4637222e90 ARM: dts: rockchip: Delete nandc and sfc pinctrl property for rv1126 board
Change-Id: Ib916361353973d8fd195912357e2e9598f420677
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-14 16:20:38 +08:00
Jon Lin
23480f0de4 ARM: dts: rv1126-pinctrl.dtsi remove fspi cs1 request
In order to suppot the case probing both EMMC and SFC
with pinctrl enabled, we'd better to set GPIO0_D6 iomux
EMMC pins.

Change-Id: Ia9dccfff3acfae31c153222d191391dbc5e7ac12
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-14 16:08:06 +08:00
Weiwen Chen
1e1c087277 ARM: dts: rv1126-38x38-v10-emmc: enable watchdog
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I6096007e5436970955943db7cf8c763ffe6f449e
2020-09-14 10:28:09 +08:00
Weiwen Chen
c003f2240f ARM: configs: rv1126-emmc-drivers-modules.config: add pppoe
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I2843813e6f641446d8ae347b5374d79a51a898af
2020-09-14 10:27:27 +08:00
Weiwen Chen
411afbcea4 ARM: configs: rv1126-emmc-drivers-modules.config: enable rga2 module
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I6ed51ace1c0bb80806ebe2d601128cdaddc8768f
2020-09-14 10:27:27 +08:00
Weiwen Chen
9645af9efe ARM: dts: rv1109: add 38x38 v10 emmc support
This board is the same as rv1126-38x38-v10-emmc.dts,
except camera sensor.

Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: Ib0850951b5c4e6cb7d33a71aa8fb4956b03df20a
2020-09-14 10:25:40 +08:00
Jianqun Xu
cabbb31119 pinctrl: rockchip: set pclk of gpio controller always on
Make the pclk of gpio controller on Rockchip SoCs always on.

Change-Id: I00b54ff7d3125bf7939dc10b68072e21994c2611
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-09-14 09:26:03 +08:00
Cai YiWei
c66e0dd7db media: rockchip: isp and ispp version to v0.1.6
Change-Id: I8546593a0fb54bc563a0450effbb0547f6e495fc
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2020-09-11 19:07:31 +08:00
Allon Huang
8e99dadcf8 media: rockchip: cif: add proc interface
Signed-off-by: Allon Huang <allon.huang@rock-chips.com>
Change-Id: Ifd8a5195ba7e5446a71c1d3f03e0ba2961ba49d5
2020-09-11 15:37:27 +08:00
Zefa Chen
5405181b7d media: i2c: imx415 fixed 1/25 s exposure Out of bounds in linear mode
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I15e6367c17d042ec45baf907ae5804e8bb1d9674
2020-09-11 14:18:44 +08:00
Hu Kejun
76a7f30a7f media: rockchip: cif: fix report wrong log when checking hdr time
fix report wrong log when short time < middle time or middle time < long time

Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Change-Id: I7a9a17d82412d1a5b56488da3b6bcdf9f4f58dbf
2020-09-11 14:14:53 +08:00
Finley Xiao
c83ac33a44 ARM: dts: rv1126: Change voltage for vepu 800MHz
Add more test case for Vmin test.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I1a08da2e3188a3c3290a12f1639c335a246defd8
2020-09-11 14:14:19 +08:00
Nickey Yang
086bc0f597 ARM: dts: rockchip: rv1109-38-v10-spi-nand: disable nandc
SPI NAND is driven by SFC, so disable nandc because do not need

Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Change-Id: I47027c0118dadbede3b47d0d25d49ff47bde306a
2020-09-11 10:32:28 +08:00
Cai YiWei
533d819cf4 media: rockchip: ispp: tnr support dynamic switch
Change-Id: Id22d59b17b853729622cd2f0a13fcd272d7c371d
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2020-09-11 09:24:00 +08:00
Hu Kejun
caf551f781 media: rockchip: ispp: parameter part for support module dynamic switch
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Change-Id: I7dcd3cdfc3f0f8e677061e0982b6f55ebd42bce9
2020-09-11 09:24:00 +08:00
Cai YiWei
4b6e4691a4 media: rockchip: isp: soft reset for Dehaze
Change-Id: Ie6f4b42bb1d5d37b6347c5cf65b7730794f22d7a
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2020-09-11 09:21:49 +08:00
Jon Lin
2103478839 ARM: dts: rv1126-pinctrl.dtsi fspi pin reset property
Change-Id: I2ddc1df3f53ec4a3b7f16ac19f961252a4dea8b2
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-11 09:21:25 +08:00
Jon Lin
77a59c154a ARM: dts: rockchip: rv1126: sfc add pinctrl
Change-Id: I8fcacd44e3b197f0304f41cb69822cc204a19ef4
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-09-11 09:21:25 +08:00
Liang Chen
256db929e8 ARM: dts: rk3128: optimize opp table
optimize opp table for the chips with different leakage.

Change-Id: Id7a64148aa537b4cbbec07962044c37c582f59df
Signed-off-by: Liang Chen <cl@rock-chips.com>
2020-09-10 19:49:07 +08:00
Weiwen Chen
69534ef389 ARM: dts: rv1126-38x38-v10-emmc: add wifi node
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I90dfd7847dcb014709e297b13a7c327cb5dad621
2020-09-10 15:29:14 +08:00
Weiwen Chen
4d6b1069df ARM: dts: rv1126-38x38-v10-emmc: enable usb host
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: Ie5553e6fd618a92e9ee1580f7ffadc5b61b97a10
2020-09-10 15:29:14 +08:00
Sugar Zhang
6f4194b6e8 nvmem: rockchip-otp: Add mutex for read/write
Change-Id: I4d8b1b3d8e4ad729d3beeccf2357342e45643676
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2020-09-10 15:06:15 +08:00
Sugar Zhang
c5151429e9 nvmem: rockchip-otp: Add support for oem zone write
The oem zone ranges from 256 to 511 bytes. userspace
can read/write the raw NVMEM file located at
/sys/bus/nvmem/devices/rockchip-otp0/nvmem

The rest of otp which ranging from 0 to 255 bytes is
used for system, it is protected by hardware, any writes
to this range will be ignored and not take effect.

e.g.

/#hexdump -C /sys/bus/nvmem/devices/rockchip-otp0/nvmem
00000000  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00
*
00000100  ff ff ff ff ff ff ff ff  0f 0f 0f 0f 0f 0f 0f 0f
00000110  00 01 02 03 04 05 06 07  08 09 0a 0b 0c 0d 0e 0f
00000120  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00
*
00000200

Change-Id: I3e222d87525887fd5a38aa724e97f2dd163345aa
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2020-09-10 15:06:15 +08:00
Elaine Zhang
e9ac850b88 clk: rockchip: Add clock controller for the RK3568
Add the clock tree definition for the new RK3568 SoC.

Change-Id: I9c2282938ec51ddf2dd71390b9b0cfef1f0d2735
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-09-10 14:14:27 +08:00
Elaine Zhang
472e08941e clk: rockchip: add dt-binding header for rk3568
Add the dt-bindings header for the rk3568, that gets shared between
the clock controller and the clock references in the dts.
Add softreset ID for rk3568.

Change-Id: I93d9da3625d4f92c263013e850885576be646e2c
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-09-10 14:13:25 +08:00
Elaine Zhang
c62251978e dt-bindings: add bindings for rk3568 clock controller
Add devicetree bindings for Rockchip cru which found on
Rockchip SoCs.

Change-Id: I1b9a76a6c3edf28c466493a7b72765e55ba304fc
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-09-10 14:13:06 +08:00
Ziyuan Xu
07263783d3 ARM: dts: rockchip: pull pwr_hold to always-high for rv1126-bat-ipc-v10 board
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: Iafccad3d316a9096256d52a36dac1d77f5efab54
2020-09-10 12:16:19 +08:00
Weiwen Chen
a0e33f5d7a ARM: configs: rv1126-emmc-drivers-modules.config: add imx335
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I92fdd5daa7954ca79d5573478a8a470cc2988c9c
2020-09-10 12:14:08 +08:00
Weiwen Chen
d3309761e7 ARM: configs: rv1126-emmc-drivers-modules.config: sort ES8311
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I87209f60edcdb166cf67fd8f2578de1a33302bda
2020-09-10 12:14:02 +08:00
Cai YiWei
1194412315 media: rockchip: isp: raw length 256 align
dmatx/dmarx virtual width 256 byte align better
for ddr read-write.

Change-Id: I879ce1a7a8ab5abf29070f0abbb14c798689b502
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2020-09-10 11:51:41 +08:00
Allon Huang
811474ebbf media: rockchip: cif: aligned bytesperline with 256 for raw compact
to optimize reading and writing of ddr, aliged with 256,
sync with virtual width

Signed-off-by: Allon Huang <allon.huang@rock-chips.com>
Change-Id: I5cb7e3a08e8805371eeac30cd992f97a0c759076
2020-09-10 11:51:41 +08:00
Tao Huang
dcdfbf8484 arm64: rockchip_defconfig: update by savedefconfig
Fixes: c717122cec ("arm64: rockchip_defconfig: enable CONFIG_VIDEO_TC35874X")
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Iaea10deb23652997c3a558b4e945e5d524917402
2020-09-09 18:46:59 +08:00
Tao Huang
b584d2646e arm64: rockchip_linux_defconfig: Enable CPU_RK3568
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I080ece1fe4ab2757cb5e3b9f48fe9941b30e9a1e
2020-09-09 18:41:52 +08:00
Tao Huang
b9a717925b arm64: rockchip_defconfig: Enable CPU_RK3568
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I31fd8a635c9250ce5a34999f5d96484e28c17bb9
2020-09-09 18:36:33 +08:00