move cubic lut support from drm croe to rockchip drm driver and remove
depend on NO_GKI.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I8fb6ba4fc927bf9f7e1b38c180986b1e25393347
Use the RGA_MEM_FORCE_FLUSH_CACHE flag to force the flush cache for
the current buffer, not by judging the memory type.
Update driver version to 1.2.27
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Ife6d26faf59c1e33a2cddc389ded7c93b63a22a5
In android 9,10,11,12,13, we have already support 16k wbs in
hardware level code. So, enable 16k support in kernel dts default.
Info:
In future, to support BTSCO 16k, it only need to change the
default setting of bluedroid's "DISABLE_WBS" setting.
Signed-off-by: Zou Dengming <marsow.zou@rock-chips.com>
Change-Id: Ide2435eb0fb9e8e0ffb705d8ba4b43af95dd37ff
In android 9,10,11,12,13, we have already support 16k wbs in
hardware level code. So, enable 16k support in kernel dts default.
Info:
In future, to support BTSCO 16k, it only need to change the
default setting of bluedroid's "DISABLE_WBS" setting.
Change-Id: I382bfdb47a6e13c54c53e8e666aecbad6e135f41
Signed-off-by: Zou Dengming <marsow.zou@rock-chips.com>
In android 9,10,11,12,13, we have already support 16k wbs in
hardware level code. So, enable 16k support in kernel dts default.
Info:
In future, to support BTSCO 16k, it only need to change the
default setting of bluedroid's "DISABLE_WBS" setting.
Change-Id: I31db010004b09723840c9674a093eaaa78822658
Signed-off-by: Zou Dengming <marsow.zou@rock-chips.com>
Phison E15 NVMe controller is known to be broken when doing a high loading
test. Limit io queue depth to 32 is suggested by vendor.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Ie2a89197311a6a7b59281ff12caf545ae0ab37bf
Some projects config 4KB erase sizes for SPI NOR, which are
incompatible with 64KB in u-boot, and may cause functional
abnormalities or data loss.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I90a026a4cd8cc2550f1cdb84db4602c2e239e51c
Delaying the link training after hot reset, so that it's possible
to read/write some register status through the DBI.
The controller support delaying the Link Training by setting
app_dly2_en/done register.
Change-Id: Ic6d1b28ca42e3d355610db33f4e5086cf26d705c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
1.check format when get timing.
2.if read wrong format, try multiple times.
3.disable interrupts once triggered, avoid multiple triggers.
Change-Id: I2ac21723071dd89e74b0a854a3501ab8ea978aa1
Signed-off-by: Wangqiang Guo <kay.guo@rock-chips.com>
Console thread may run all the time after console_thread_stop is 1,
and tty_fifo is not empty.
Fixes: 33f4a54037 ("fiq_debugger: tty write to tty fifo")
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Change-Id: Ie5c94d61e4553b7ea78af440db6363f07fa827c3
fix the following case:
[ 2.143145] pci 0000:00:00.0: BAR 0: no space for [mem size 0x40000000]
[ 2.143155] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x40000000]
[ 2.143161] pci 0000:00:00.0: BAR 1: no space for [mem size 0x40000000]
[ 2.143168] pci 0000:00:00.0: BAR 1: failed to assign [mem size 0x40000000]
Change-Id: I5eca2adb49d83c775036df7e961dab5c9fbfffbb
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Delaying the link training after hot reset, so that it's possible
to read/write some register status through the DBI.
The controller support delaying the Link Training by setting
app_dly2_en/done register.
Change-Id: Ieb34676ecd13d8b4c47b5adc34350294ddc60ace
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Panel k350c4516t supports to be initialized by spi in
rgb mode.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: Id6addc5db469acaf9a55b1d9d1b867c364526290
Support sc31iot and sc230ai
Update isp thunderboot buffer size
Change-Id: If701735b748b1329f3d90e2986ff0d6870aede65
Signed-off-by: Lan Honglin <helin.lan@rock-chips.com>
The trim_base nvmem cell is abandoned on some platforms, and use the
default value 30.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: If2ebb13de33b0928854a406cbefdcdc95cfa0947
[ISSUE]
device I2C communication is fail due to reset
Change-Id: I847523a8df22727b6863a4dbe2cdad11b104435c
Signed-off-by: Lan Honglin <helin.lan@rock-chips.com>
we don't directly enable all evb board to support bt-sco cards
because it may take some i2s/pcm, which may use dma,
but dmas may limit.
so we just prepare this settings, then if any one who want to
support bt-sco, he/she can just add dts in board-level dts.
now, we just enable rk3568-evb1 and rk3566-evb1 just for example.
Diff in "rk3568-evb1-ddr4-v10.dts" is like this:
+&bt_sco {
+ status = "okay";
+};
+
+&bt_sound {
+ status = "okay";
+};
+
+&i2s3_2ch {
+ status = "okay";
+};
The default pcm/i2s setting is:
Format: PCM, dsp_a, MSB first, short sync, rising edge and delay 1 bclk.
rockchip soc: master; Bt controller: slave
Change-Id: I6668bfbb87e4b0ea71a661bbcf8248cbde77974e
Signed-off-by: Zou Dengming <marsow.zou@rock-chips.com>
After panic or wdt reset, you can get /proc/rk_md/minidump
as minidump.elf, and debug it with gdb
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Change-Id: I6d92d9ee21e304bf72231a3f62ecab66b6ab1a43
we don't directly add all evb board to enable bt-sco cards
because it may take some i2s/pcm, which may use dma,
but dmas may limit.
so we just prepare this settings, then if any one who want to
support bt-sco, he/she can just add dts in board-level dts.
now, we enable rk3588-evb1 sco just for example.
Diff in "rk3588-evb1-lp4-v10.dts" is like this:
+&bt_sco {
+ status = "okay";
+};
+
+&bt_sound {
+ status = "okay";
+};
+
+&i2s2_2ch {
+ status = "okay";
+};
The default pcm/i2s setting is:
Format: PCM, dsp_a, MSB first, short sync, rising edge and delay 1 bclk.
rockchip soc: master; Bt controller: slave
Change-Id: Id161dd43ec3ea657e758852f7214727488633977
Signed-off-by: Zou Dengming <marsow.zou@rock-chips.com>
