The RNDIS gadget function has USB class of 2 and subclass
of 2, which matches "USB\Class_02&SubClass_02" in the
usbser.inf file in the Windows system, so the device is
initially detected as a COM port instead of RNDIS. This
is why we need to install RNDIS manually.
Refer to Defined Class Codes [1] and rndis_host of Linux [2],
this patch sets the RNDIS gadget with base class of 0xE0h
(Wireless Controller) and subclass of 0x01h and protocol
of 0x03h.
[1] https://www.usb.org/defined-class-codes
[2] http://www.embedded-os.de/en/proto-rndis_host.shtml
Change-Id: Ida366749f378a0ce770d707b4ba56b87f9e188cf
Signed-off-by: William Wu <william.wu@rock-chips.com>
The gmac5.10a configure has_gmac4 with true and has_gmac with false.
Others still stay has_gmac with true.
Change-Id: I0d0d1adef8551d2f7aac6702f963cb23a9861036
Signed-off-by: David Wu <david.wu@rock-chips.com>
(1) before: multiple i2c devices with the same address
registered to the same i2c bus will fail.
(2) after: multiple i2c devices with the same address
registered to the same i2c bus just print
the error log, but will not fail.
Fixes: b97a325b33 ("i2c: Devices which have some i2c addr can work in same i2c bus")
Change-Id: I53a2b5a988d96c32e64b8a426621cf894c9cba20
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
If a PM domain is powered off before system suspend,
we hope do nothing in system runtime suspend noirq phase
and system runtime resume noirq phase.
Change-Id: Id72b1f92e10449c48006aced0d49612637402210
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Unfortunately, it appears our fix in:
commit b5d29843d8 ("drm/atomic_helper: Allow DPMS On<->Off changes
for unregistered connectors")
Which attempted to work around the problems introduced by:
commit 4d80273976 ("drm/atomic_helper: Disallow new modesets on
unregistered connectors")
Is still not the right solution, as modesets can still be triggered
outside of drm_atomic_set_crtc_for_connector().
So in order to fix this, while still being careful that we don't break
modesets that a driver may perform before being registered with
userspace, we replace connector->registered with a tristate member,
connector->registration_state. This allows us to keep track of whether
or not a connector is still initializing and hasn't been exposed to
userspace, is currently registered and exposed to userspace, or has been
legitimately removed from the system after having once been present.
Using this info, we can prevent userspace from performing new modesets
on unregistered connectors while still allowing the driver to perform
modesets on unregistered connectors before the driver has finished being
registered.
Changes since v1:
- Fix WARN_ON() in drm_connector_cleanup() that CI caught with this
patchset in igt@drv_module_reload@basic-reload-inject and
igt@drv_module_reload@basic-reload by checking if the connector is
registered instead of unregistered, as calling drm_connector_cleanup()
on a connector that hasn't been registered with userspace yet should
stay valid.
- Remove unregistered_connector_check(), and just go back to what we
were doing before in commit 4d80273976 ("drm/atomic_helper: Disallow
new modesets on unregistered connectors") except replacing
READ_ONCE(connector->registered) with drm_connector_is_unregistered().
This gets rid of the behavior of allowing DPMS On<->Off, but that should
be fine as it's more consistent with the UAPI we had before - danvet
- s/drm_connector_unregistered/drm_connector_is_unregistered/ - danvet
- Update documentation, fix some typos.
Fixes: b5d29843d8 ("drm/atomic_helper: Allow DPMS On<->Off changes for unregistered connectors")
Change-Id: I998eb6f5434cf82be881085f5b23e33603b440e4
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: stable@vger.kernel.org
Cc: David Airlie <airlied@linux.ie>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20181016203946.9601-1-lyude@redhat.com
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 39b50c6038)
As a second global reset, the GRF is not reset, the iomux and
pull of PWM pin is still keeping, but PWM controller is reset,
PWM pin goes into input mode. However, the pull is still none
changed in kernel, which can cause voltage problems, so should
always keep the PWM pin pull down mode, with 0~50 μA power
increase.
Change-Id: I9f46feca00bdb6e8cad4794342d2936d62206164
Signed-off-by: David Wu <david.wu@rock-chips.com>
As a second global reset, the GRF is not reset, the iomux and
pull of PWM pin is still keeping, but PWM controller is reset,
PWM pin goes into input mode. However, the pull is still none
changed in kernel, which can cause voltage problems, so should
always keep the PWM pin pull down mode, with 0~50 μA power
increase.
Change-Id: Ibb1cbb5f5371d7838783264e23d5160c0757aaa6
Signed-off-by: David Wu <david.wu@rock-chips.com>
If the PWM pinctrl uses default state, the iomux setting will
be done at probe, the PWM may not be enabled at this moment.
It will make PWM into an intermediate state, destroy the default
hardware state, the PWM is not ready for work yet. So it is better
for doing PWM pinctrl setting after PWM enabled.
Change-Id: Iea34a7baf6a4d7df0c631f7f4fdab5b9d61bbd5f
Signed-off-by: David Wu <david.wu@rock-chips.com>
If some PWM enable_conf was configured with different values at
uboot/loader, the enable_conf should be cleaned firstly and
configured them at kernel. It is better to use the same parameters
on both sides to ensure excessive smoothing.
Change-Id: Ib1b7b55e9816639d9915543dadf059ce0e8be103
Signed-off-by: David Wu <david.wu@rock-chips.com>
The write or read request buffers may or may not be a highmem
page highmem or not allocated page, so the page->virtual will be
NULL, kmap it always need.
BUG:
[ 25.928352] Unable to handle kernel paging request at virtual address 0
[ 31.721348] pgd = a13fe17e
[ 31.724062] [0] *pgd=00000000
[ 31.727651] Internal error: Oops: 5 [#1] PREEMPT SMP ARM
[ 31.732966] Modules linked in:
Change-Id: Icdbb052bb488ecc10be1c8a8b0ca954f65c17474
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
Since opp-suspend of cpub/l is 216MHz@950000mV, and the max frequency
under 950000mV is 600MHz, so initialize cpub/l freq to 600MHz.
Change-Id: I02d2ac44f4e5d125dfa90796b839c4a733442274
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
the supported multile area win gate only can be closed when area0 is
disabled.
Change-Id: Idd447bb7c2157587456391c1abeeefc9a5d61bbd
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Native sdmmc does not use rpm, but we set pm_runtime_force_suspend()
and pm_runtime_force_resume() for sleep PM. pm_runtime_force_*()
will check rpm status, so that the it doesn't call the resume
callback if we didn't increase its usage count.
Another drive-by fix is to de-init rpm once when rpm is used.
Change-Id: Id7ea1ca95c684fb51867fb87c66f8998fc0758a3
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Add support to disable cqe function if disable-cqe
is assiged by firmware.
Change-Id: Iac2826c4b986c122510af1594c971c4135bafc34
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Add more ip nodes to rk3368 core dts file, such as iep, vop, ...
Change-Id: Ief8da75765bb84ebe038e9446c782aff3e3a6aed
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Android 10 requires ion to allocate buffers for audio playback,
enable system heap by default to support it.
Change-Id: I20653e9377c86e4baed295f33a475e49a63f5082
Signed-off-by: Chen Jinsen <kevin.chen@rock-chips.com>
This's what mmc_select_hs400() or mmc_select_hs() did,
since mmc_set_clock() will let sdhci_arasan_set_clock()
update the PHY clock to match the timing, otherwise
the following mmc_switch_status() will be failed.
Change-Id: Ic1a0178ec209ec71d904f7212a84da6665904007
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
It's meaningless to check the card's status which execute
the on-going flush. As the status been responded make no
any sense here.
Change-Id: I34197d1c93c01337dd2e68ec22e3ce8dd195c424
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
* android-4.19: (2854 commits)
ANDROID: move up spin_unlock_bh() ahead of remove_proc_entry()
BACKPORT: arm64: tags: Preserve tags for addresses translated via TTBR1
UPSTREAM: arm64: memory: Implement __tag_set() as common function
UPSTREAM: arm64/mm: fix variable 'tag' set but not used
UPSTREAM: arm64: avoid clang warning about self-assignment
ANDROID: sdcardfs: evict dentries on fscrypt key removal
ANDROID: fscrypt: add key removal notifier chain
ANDROID: refactor build.config files to remove duplication
ANDROID: Move from clang r353983c to r365631c
ANDROID: gki_defconfig: remove PWRSEQ_EMMC and PWRSEQ_SIMPLE
ANDROID: unconditionally compile sig_ok in struct module
Linux 4.19.80
perf/hw_breakpoint: Fix arch_hw_breakpoint use-before-initialization
PCI: vmd: Fix config addressing when using bus offsets
x86/asm: Fix MWAITX C-state hint value
hwmon: Fix HWMON_P_MIN_ALARM mask
tracing: Get trace_array reference for available_tracers files
ftrace: Get a reference counter for the trace_array on filter files
tracing/hwlat: Don't ignore outer-loop duration when calculating max_latency
tracing/hwlat: Report total time spent in all NMIs during the sample
...
Conflicts:
drivers/clk/rockchip/clk-mmc-phase.c
drivers/gpu/drm/rockchip/rockchip_drm_vop.c
drivers/regulator/core.c
drivers/tty/serial/8250/8250_port.c
drivers/usb/dwc3/core.h
drivers/usb/dwc3/gadget.c
drivers/usb/dwc3/gadget.h
Change-Id: I65599d770d6613caba14251b890fcfd1cfa0f100
The pins from GPIO2B0 to GPIO2B6 are located at GRF_GPIO2BL_IOMUX,
they are recalculated to get correct iomux.
Change-Id: I1e46697c4508c396b5e8140c32c4185925a040ea
Signed-off-by: David Wu <david.wu@rock-chips.com>
The usage of slew rate is needed to config it at DTS,
such as:
fast speed: slew-rate = <1>;
slew speed: slew-rate = <0>;
Change-Id: Iefa9c15a35c6c1e94f716f5d6dd7e30d20a7293f
Signed-off-by: David Wu <david.wu@rock-chips.com>
If the gpio IRQ type changes, it is possible to accidentally trigger
an interrupt, such as when the input is high, changed from level to
rise edge. For now, the best way to do this is to disable the INTEN
bit first, then configure the type to stagger this period of time.
Change-Id: I71351b9ed6f7920958c7451c2e51ab5f699875d1
Signed-off-by: David Wu <david.wu@rock-chips.com>
There are writable 32 bits for PMU_GPIO0's iomux, so add the
IOMUX_WRITABLE_32BIT to read iomux register at first, it would
not change others' bits.
Change-Id: I1fb27c60d5d26e5719b6911a78e7cdf144feba26
Signed-off-by: David Wu <david.wu@rock-chips.com>
This adds the necessary data for handling io voltage domains on the rk3308.
As interesting tidbit, the rk3308 contains one iodomain area at grf,
Change-Id: Ife72a284a8926d02ef5df7a422d41924494d0300
Signed-off-by: David Wu <david.wu@rock-chips.com>
