1.check format when get timing.
2.if read wrong format, try multiple times.
3.disable interrupts once triggered, avoid multiple triggers.
Change-Id: I2ac21723071dd89e74b0a854a3501ab8ea978aa1
Signed-off-by: Wangqiang Guo <kay.guo@rock-chips.com>
Console thread may run all the time after console_thread_stop is 1,
and tty_fifo is not empty.
Fixes: 33f4a54037 ("fiq_debugger: tty write to tty fifo")
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Change-Id: Ie5c94d61e4553b7ea78af440db6363f07fa827c3
fix the following case:
[ 2.143145] pci 0000:00:00.0: BAR 0: no space for [mem size 0x40000000]
[ 2.143155] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x40000000]
[ 2.143161] pci 0000:00:00.0: BAR 1: no space for [mem size 0x40000000]
[ 2.143168] pci 0000:00:00.0: BAR 1: failed to assign [mem size 0x40000000]
Change-Id: I5eca2adb49d83c775036df7e961dab5c9fbfffbb
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Delaying the link training after hot reset, so that it's possible
to read/write some register status through the DBI.
The controller support delaying the Link Training by setting
app_dly2_en/done register.
Change-Id: Ieb34676ecd13d8b4c47b5adc34350294ddc60ace
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Panel k350c4516t supports to be initialized by spi in
rgb mode.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: Id6addc5db469acaf9a55b1d9d1b867c364526290
Support sc31iot and sc230ai
Update isp thunderboot buffer size
Change-Id: If701735b748b1329f3d90e2986ff0d6870aede65
Signed-off-by: Lan Honglin <helin.lan@rock-chips.com>
The trim_base nvmem cell is abandoned on some platforms, and use the
default value 30.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: If2ebb13de33b0928854a406cbefdcdc95cfa0947
[ISSUE]
device I2C communication is fail due to reset
Change-Id: I847523a8df22727b6863a4dbe2cdad11b104435c
Signed-off-by: Lan Honglin <helin.lan@rock-chips.com>
we don't directly enable all evb board to support bt-sco cards
because it may take some i2s/pcm, which may use dma,
but dmas may limit.
so we just prepare this settings, then if any one who want to
support bt-sco, he/she can just add dts in board-level dts.
now, we just enable rk3568-evb1 and rk3566-evb1 just for example.
Diff in "rk3568-evb1-ddr4-v10.dts" is like this:
+&bt_sco {
+ status = "okay";
+};
+
+&bt_sound {
+ status = "okay";
+};
+
+&i2s3_2ch {
+ status = "okay";
+};
The default pcm/i2s setting is:
Format: PCM, dsp_a, MSB first, short sync, rising edge and delay 1 bclk.
rockchip soc: master; Bt controller: slave
Change-Id: I6668bfbb87e4b0ea71a661bbcf8248cbde77974e
Signed-off-by: Zou Dengming <marsow.zou@rock-chips.com>
After panic or wdt reset, you can get /proc/rk_md/minidump
as minidump.elf, and debug it with gdb
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Change-Id: I6d92d9ee21e304bf72231a3f62ecab66b6ab1a43
we don't directly add all evb board to enable bt-sco cards
because it may take some i2s/pcm, which may use dma,
but dmas may limit.
so we just prepare this settings, then if any one who want to
support bt-sco, he/she can just add dts in board-level dts.
now, we enable rk3588-evb1 sco just for example.
Diff in "rk3588-evb1-lp4-v10.dts" is like this:
+&bt_sco {
+ status = "okay";
+};
+
+&bt_sound {
+ status = "okay";
+};
+
+&i2s2_2ch {
+ status = "okay";
+};
The default pcm/i2s setting is:
Format: PCM, dsp_a, MSB first, short sync, rising edge and delay 1 bclk.
rockchip soc: master; Bt controller: slave
Change-Id: Id161dd43ec3ea657e758852f7214727488633977
Signed-off-by: Zou Dengming <marsow.zou@rock-chips.com>
The SR register of the old version IP SPI slave tx transmission
process will remain in a busy state, so it needs to be processed
by determining the tx empty status bits filed.
Change-Id: If71ed842e2b7aed3cfe22d7bc401ea2d0bb1409b
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
VOP in RK3308 supports global alpha and pixel alpha.
Only one alpha mode can be enabled at the same time.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: Ia749deeb82a31b7e5298ca14586bbfb75606469f
Enable horizontal color bar:
echo 1 > /sys/kernel/debug/dri/0/video_port0/color_bar
Enable vertical color bar:
echo 2 > /sys/kernel/debug/dri/0/video_port0/color_bar
Disable color bar:
echo 0 > /sys/kernel/debug/dri/0/video_port0/color_bar
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I63ed8f2a3a2fafc852151fda03b91b926a8e4470
If it is not controlled, when the path is configured after
resume, the clock will be continuously turn on to increase
the clock count.
Therefore, we can count and control the switch of clock
separately according to the current status of playback and
capture, so as to avoid that mclk is accidentally turned off
when playback and capture exist at the same time, causing
the other stream to fail to work.
For example:
- before:
mclk_sai0 2 2 0 11289600 0 0 50000
mclk_sai0_out2io 1 1 0 11289600 0 0 50000
mclk_sai0_to_io 16 16 0 11289600 0 0 50000
- after:
mclk_sai0 2 2 0 11289600 0 0 50000
mclk_sai0_out2io 1 1 0 11289600 0 0 50000
mclk_sai0_to_io 2 2 0 11289600 0 0 50000
Change-Id: I78ec18c7ffc42f548e82357bcf20701aa057f15d
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
We can configure automatically playback/capture path via
the controlling of 'Resume Path'.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Change-Id: Ie00e7a673bff068aa922e322d833106f4cbacfde
Add transfer completion wait to improve software compatibility,
1.Support to adjust he timeount value if needed
2.Return the fail result when spi slave abort
Choose to discard the rx fifo data after slave abort instead of
attempting to modify xfer->len to change the framework layer
mechanism.
Change-Id: I6bb1ba0ba12ad7486117aff5e948616c8e768418
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
