Commit Graph

1060549 Commits

Author SHA1 Message Date
William Wu
9228f832cd arm64: dts: rockchip: rk3588: add usb nodes for evbs
This patch add vbus regulator and fusb302 nodes for
rk3588 and rk3588s evbs, and also disable unused usb
controllers and phys node.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I59678e7cd34de76ed09cc55010a1d8533fe58602
2021-11-02 15:15:52 +08:00
Lin Jinhan
b56b10f007 arm64: dts: rockchip: rk3588s: add rng node
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: Ifb8964053daa6b593dd2c2c6a3b8caab8526e56d
2021-11-02 15:12:50 +08:00
Lin Jinhan
c6aead9a16 arm64: dts: rockchip: rk3588s: add crypto node
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: I516df4d5719f101c92fc39dd7b62af1a80c40777
2021-11-02 15:07:02 +08:00
Jianqun Xu
17e9559f67 arm64: dts: rockchip: rk356x-evb: fix pcie supply to regulator-fixed
The pcie supply design is (rk3566 evb2 example)
DC12V
  -> VCC12V_PCIE(controlled by GPIO0_C2_H)
  -> VCC3V3_PCIE(controlled by GPIO0_C2_H)
  -> VCC5V0_SYS
       -> VCC3V3_PI6C(controlled by GPIO0_C2_H)

The pci phy driver only want to enable or disable the VCC3V3_PCIE power.

Suggested from pcie owner to ignore the VCC12V_PCIE and VCC3V3_PI6C, so
the dts only need to add regulator node for VCC3V3_PCIE.

Most of time we keep the regulator name same as the hardware design, so
the dts node is
    vcc3v3_pcie: gpio-regulator {
        compatible = "regulator-fixed";
        regulator-name = "vcc3v3_pcie";
        regulator-min-microvolt = <3300000>;
        regulator-max-microvolt = <3300000>;
        enable-active-high;
        gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
        vin-supply = <&dc_12v>;
    };

The regulator type is "regulator-fixed" since its voltage always be
3.3v, min and max should be 3300000 make the regulator has a voltage
value.

The regulator can be enabled or disabled by regulator_enable or
regulator_disable function, so make the GPIO0_B7 as "ena_pin" for the
regulator.

The regulator is supplied by DCIN_12V, so add the vin-supply.

Some boards need a delay before enabling trainning for power to be
stable from the measurement.

By measurement, 5ms is enough for power and refclk to be stable.

Change-Id: Iaf70abe9c9e06504af067dc0e3d60b775557c026
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-11-02 14:43:52 +08:00
Jianqun Xu
eff93358f1 pci: dwc: rockchip: fix pci power enable/disable
Change-Id: I4337746b7db995b3c6de29b50b9edc7a6bc10a81
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-11-02 14:38:57 +08:00
Shawn Lin
959a4d84f2 mmc: dw_mmc-rockchip: Improve v2 tuning
v2 tuning has a defect that if invalid space is laid
between 90 and 180, and the PVT might make the invalid
space back and forth. To overcome this weakness, we don't
need to select phase from beginning, and should directly
chose the next one against the last phase selected.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I0cbeb1dba524c2e23a3719d28b868af3ed49e20b
2021-11-02 14:38:57 +08:00
Guochun Huang
a124131bab drm/rockchip: dsi: add to get dsc info from dts
Change-Id: Idbf1503e775a26d24ba1965495d531e30b7cc6c6
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-11-02 10:25:20 +08:00
Sugar Zhang
131a63013b arm64: dts: rockchip: rk3588: Add property for dedicated i2s nodes
These controllers only have playback or capture capability.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I69791088e4fd3e9a623b938279a7580b928dc89a
2021-11-01 20:31:21 +08:00
Sugar Zhang
f3378c3aa6 ASoC: dt-bindings: rockchip: Add compatible for rk3588 codec digital
This patch adds compatible string for rk3588 codec digital.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Iaaceed2f8a9a64e6e6616d5105b3910bb839f13f
2021-11-01 20:30:55 +08:00
Sugar Zhang
b906f67703 ASoC: rk_codec_digital: Add support for rk3588 SoC
This patch adds support for rk3588 SoC.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I8dbd270afce20f6c2f3573a15129c4dff8eb1b12
2021-11-01 20:30:44 +08:00
Sugar Zhang
08e779ab0c ASoC: dt-bindings: rockchip: Add compatible for rk3588 pdm
This patch adds compatible string for rk3588 pdm.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ie64bfb76b5d5776856623c09281a9bd85fe48447
2021-11-01 20:30:27 +08:00
Sugar Zhang
3ce4fe6dca ASoC: rockchip: pdm: Add support for rk3588 pdm
This patch add support for rk3588 pdm which is the same
with rv1126.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I5df248970c9fdfd27e048cc1a6bb60898c50e8f3
2021-11-01 20:30:09 +08:00
Sugar Zhang
8af9719df9 ASoC: dt-bindings: rockchip: Add compatible for rk3588 spdif
This patch adds compatible string for rk3588 spdif.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Id984b337bfbc3dfe92d03b789003fcc0a9612a30
2021-11-01 20:29:42 +08:00
Sugar Zhang
3f861f2110 ASoC: rockchip: spdif: Add support for rk3588 spdif
This patch adds support for rk3588 spdif which is the same
with rk3366.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ia6677fc9281868edd9960337aa9726b36b754e3e
2021-11-01 20:29:42 +08:00
shengfei Xu
5aa669c9f1 arm64: dts: rockchip: rk806: fix the name for the nldo4
the name is consistent with the schematic diagram of the hardware.

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I97c7bebcf1358e461ab37846e0b0034483e20760
2021-11-01 20:21:24 +08:00
Jianqun Xu
7c8d7f9e36 arm64: dts: rockchip: rk3568-evb fix vcc5v0_usb nodes
Add min/max voltage for usb regulators, also add vin-supply for them.

From rk3568-evb1 hardware design, the power tree about usb is
DC12V
  ->  VCC5V0_USB(controlled by EXT_EN from PMIC)
        ->  VCC5V0_HOST(controlled by GPIO0_A6)
	->  VCC5V0_OTG(controlled by GPIO0_A5)

The EXT_EN from PMIC RK809 is designed for device power off to cut off
the usb 5.0v power, during system on, it keeps always on.

Change-Id: I21e431b4b41022b101b6db92b0769d096679b67c
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
2021-11-01 20:12:47 +08:00
ZiHan Huang
18a99b5a86 arm64: dts: rockchip: add rk3588 linux base dts
Signed-off-by: ZiHan Huang <zack.huang@rock-chips.com>
Change-Id: Ib59ec583e110f2fcb0599ca5c591c55e01518e44
2021-11-01 20:10:57 +08:00
Yifeng Zhao
d69e2f24c6 arm64: dts: rockchip: rk3588: modify sdhci compatible to matching drive
Fixes: 0d390428b5 ("arm64: dts: rockchip: Add base dts for rk3588 soc")
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I45699bc7cb24ffe9ccd31e0552835bd005ab8c7f
2021-11-01 18:09:54 +08:00
Cai YiWei
c75bd88eba media: rockchip: ispp: replace iommu detach/attach
Change-Id: I1cf46cb9cba85be418f32d218dd70452c8062d42
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2021-10-30 15:49:49 +08:00
Cai YiWei
4aed134bfe media: rockchip: isp: replace iommu detach/attach
fix NULL Pointer when isp to reset
[ 4486.719609]  __iommu_dma_unmap+0x14/0x7c
[ 4486.719968]  iommu_dma_unmap_sg+0x64/0x90
[ 4486.720348]  __iommu_unmap_sg_attrs+0x48/0x5c
[ 4486.720745]  vb2_dma_sg_dmabuf_ops_detach+0x60/0x80
[ 4486.721192]  dma_buf_detach+0x88/0x9c

iommu_detach_device will set domain to null,
and __iommu_dma_unmap using domain but no check.

Change-Id: I3c679565c6a7e67783e1750fc4d028191a9c9fcf
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2021-10-30 15:49:49 +08:00
Wyon Bi
f065eedfb5 arm64: dts: rockchip: rk3588: Add aux clock for dp1
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I145d47f35da3b6cc80a0591dcff5cb23ff118db4
2021-10-29 19:10:12 +08:00
Wyon Bi
409ff5b0ce arm64: dts: rockchip: rk3588s: Add aux clock for dp0
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I4f712f94ec2ab15c30cd9d827513cf778743f000
2021-10-29 19:10:02 +08:00
Zhang Yubing
a5a1823c18 arm64: dts: rockchip: rk3588: Add display-subsystem
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I84edbac259ed7f4573139ecb3ed03a7ebb29db23
2021-10-29 19:09:15 +08:00
Finley Xiao
187019e367 arm64: dts: rockchip: rk3568: Add vop-frame-bw-dmc-freq
Fix vop POST_BUF_EMPTY irq err when rotate screen.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I3c0d5c52efa8612ce6bf24f6748ccab7c1c05a57
2021-10-29 19:00:34 +08:00
Finley Xiao
f1123f2aab PM / devfreq: rockchip_dmc: Change frequency according to vop frame bandwidth
Sometimes the vop line bandwidth is not high, the vop also report
buf empty err, and the frame bandwidth is high at this time, so change
ddr frequency according to frame bandwidth can fix the error.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ia893a07def99aaaa4da421b6d619a8fd3eec9745
2021-10-29 19:00:34 +08:00
Sandy Huang
a3d4f6e0df drm/rockchip: vop: add calculate current frame data size
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ie9c92c651b8c379c77aac941d03bf3f772ed7eea
2021-10-29 19:00:34 +08:00
Zhen Chen
a42b57181b MALI: rockchip: upgrade bifrost DDK to g7p1-01bet0, from g6p0-01eac0
Including modifications under drivers/base/ from the new DDK.

Resolve lots of conflicts.

Fix compilation errors when CONFIG_DEBUG_FS is disabled.

Change-Id: I69f9ac87d927441d0b92b8dac8b704922aeb6a0a
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2021-10-29 18:44:22 +08:00
Zhen Chen
8e59d03969 MALI: bifrost: fix a bug that makes vdd_gpu abnormally low
Change-Id: Ic0b785ead0da551e9e640c45b73f6686a1ec5cca
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2021-10-29 18:44:22 +08:00
Zhen Chen
404110b7de MALI: rockchip: upgrade bifrost DDK to g6p0-01eac0, from g2p0-01eac0
Include a new directory include/uapi/gpu/arm/bifrost/,
which includes some header files of bifrost device driver.
In the original part of g6, the path is include/uapi/gpu/arm/midgard/.
I changed the "midgard" to "bifrost", and modified the paths of the header files in .c files.

I resolved some conflicts between modifications form ARM and RK, manually.

In addition, introduce source files of protected_memory_allocator
that might be needed by bifrost_device_driver into build system.

Further more, to avoid errors when building in GKI mode,
add "WITH Linux-syscall-note" to SPDX tag of uapi headers.

Change-Id: I09d500a0fdbc5da352c81dc4fcfbffb5b7f907f5
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2021-10-29 18:44:22 +08:00
Tao Huang
da27a9f52c arm64: rockchip_gki.config: Enable CONFIG_RK_HEADSET
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I03ff3e3d003e2a884b16b18735ee19be0c565252
2021-10-29 18:06:44 +08:00
Shunhua Lan
342259045c rk_headset: enable rk_headset and fix complie error
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: I3f1906ddca16b2fedf403c7c88e00ff1dc4edd42
2021-10-29 18:06:44 +08:00
Sandy Huang
cd2119c1ce drm/rockchip: vop2: add support rk3588 DSC
RK3588 can support DSC (Display Stream Compression) with the following
feature:

1. DSC 8K encoder for HDMI TX0/MIPI DSI2 Host0 interface
2. DSC 4K encoder for HDMI TX1/MIPI DSI2 Host1 interface
3. Conformance Standard: VESA DSC v1.1 and v1.2a
4. Data path: VOP VP -> DSC encoder -> DSI/HDMI controller -> phy -> panel

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ia395374102be0e1710bb2049d7407a6cc0d5f873
2021-10-29 17:12:50 +08:00
Andy Yan
aa3aee14d0 drm/rockchip: vop2: Add vop2 internal pd support for rk3588
There are 7 internal power domains on rk3588 vop:

Cluster0/1/2/3 each have one, and Cluster0 power domain act
as parent pd of Cluster1/2/3.

Esmart0/1/2/3 share on pd.

DSC_8K/DSC_4K each have one.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: If2c3c79980d2690761d12e64a486aca9be992e4b
2021-10-29 17:01:03 +08:00
Wu Liangqing
e976889d1a arm64: dts: rockchip: rk3588: adjust rk3588/rk3588s evb dts structure
separate rk3588-evb and rk3588s-evb

Change-Id: I6298f3db43d9853c136857e0b09152f6b311717a
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2021-10-29 16:54:12 +08:00
Tao Huang
9346f9db7d arm64: dts: rockchip: rk806: Fix indentation
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I711b651c32a2993ce993363373ec7cc40cfc6aa1
2021-10-29 16:53:20 +08:00
Kever Yang
a14e5e74a9 phy: phy-rockchip-snps-pcie3: support rk3588
RK3588 is using the same snps phy for pcie3.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I4fe45cdd4f634437f4b863d9a34e523e2deeaf9f
2021-10-29 16:41:30 +08:00
Guochun Huang
cfd737a904 drm/rockchip: rk628: fix lvds default data format
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: Ib99e6e3d285b3693428523fdd11027d8862ee734
2021-10-29 16:00:57 +08:00
Sandy Huang
dd32d33d69 drm/rocckhip: vop: rename to NEXT_HDR feature
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I148ecf0f400c98e8c5e79716a6c69add3b21b6e5
2021-10-29 15:29:05 +08:00
Shawn Lin
2a53aab5cf mmc: dw_mmc-rockchip: Skip all phases bigger than 270 degrees
Per design recommendation, it'd better not try to use any phase
which is bigger than 270. Let's officially follow this.

Change-Id: I8dee3eb648d321cc86e0926844cde528dbb5bd95
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2021-10-29 15:28:39 +08:00
Guochun Huang
5bb9b625e7 arm64: dts: rockchip: rk3588: add dsi dts nodes
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: Ia8ccd04ccaf337480da6c27b67dcc0a38e33ec6d
2021-10-29 07:59:29 +08:00
Guochun Huang
8cc47fe067 arm64: dts: rockchip: rk3588: add mipi dcphy dts nodes
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I68b0de9bb0ddf00a171754adaae3d2dffd789d2c
2021-10-29 07:57:31 +08:00
Weixin Zhou
a939cdfe9d nvmem: rk628-efuse: add rk628 efuse driver
Change-Id: I1b379fb75ba65f5628653ce114d1d440e9a95ec9
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
2021-10-28 19:30:03 +08:00
Elaine Zhang
9528bfc14a clk: rockchip: rk3588: export clk_aux16m_x id for dp
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: Iec7deb4005d4ce3b842eccd89018a7d9f335434c
2021-10-28 16:31:46 +08:00
Wyon Bi
ccfe243eb8 arm64: dts: rockchip: rk3588: Add dp1 node
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I4e5334e83304b08e8cd1c52166c2394e91f9747a
2021-10-28 16:31:27 +08:00
Wyon Bi
17650f44dc arm64: dts: rockchip: rk3588s: Add dp0 node
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Idab51106a7336bd8d95a478b51559546805e2b71
2021-10-28 16:31:27 +08:00
shengfei Xu
01122322cb arm64: dts: rockchip: rk806: fix the name for the NLDO_REG4
the name is consistent with the schematic diagram of the hardware.

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I63256863f52ce8141b45829a4efd4b81e2424f44
2021-10-28 16:31:00 +08:00
Simon Xue
78f050e418 iommu/rockchip: wrap enable/disable operation for user
There are issues about the field "links" of struct device
by calling pm_runtime_get_sync/pm_runtime_put_sync to
enable/disable iommu, wrap helpers to make things easy.

Change-Id: I03a85dc8c67b902e79b1e86a201b2074e2562d83
Signed-off-by: Simon Xue <xxm@rock-chips.com>
2021-10-28 15:47:09 +08:00
shengfei Xu
5b87fd45e0 arm64: dts: rockchip: rk3588-evb: rearrange the regulator configuration
rk806-double.dtsi: for two rk806s schemes
rk806-single.dtsi: for one rk806 schemes

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I7dfa2c33d50d59bb08d4cd1e1005181344304240
2021-10-27 17:25:27 +08:00
Andy Yan
c4b5e35d90 drm/rockchip: vop2: Add splice mode for alpha
Used for 8K output on rk3588

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ic5a5443f85c063fcf45a2c91a676766a773a0317
2021-10-27 16:11:32 +08:00
Andy Yan
b5502e21e2 drm/rockchip: vop2: Add splice support for HDR10
We need two HDR10 controllers in splice mode.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ie4f98f64b3afa1a4bbf561d4dc061031febd22e5
2021-10-27 16:10:55 +08:00