Commit Graph

862996 Commits

Author SHA1 Message Date
Algea Cao
9ab9fd2458 drm/rockchp: drv: Add comparison to mode clock
For resolution floating refresh rate such as 59.94 Hz,
the only difference between the resolution and its
corresponding integer refresh rate resolution is the clock.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I149471f58c9eb65f972139b23a45339ea8807e54
2021-03-31 14:18:46 +08:00
Cai YiWei
fc439e4702 media: rockchip: ispp: change fec data state if params buf no use
Change-Id: I278d7ec35a39b2ce18af6553cdca33892ec1382b
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2021-03-31 11:42:05 +08:00
Wenping Zhang
be0d5270c6 ARM: dts: rockchip: add mmc aliases for rk312x.
Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
Change-Id: Ide6179393b7dae5752ab4b9105d344cd371d6ad9
2021-03-31 09:05:34 +08:00
Johan Jonker
5bfc198162 UPSTREAM: arm64: dts: rockchip: assign a fixed index to mmc devices on px30 boards
Recently introduced async probe on mmc devices can shuffle block IDs.
Pin them to fixed values to ease booting in environments where UUIDs are
not practical. Use newly introduced aliases for mmcblk devices from [1].
The sort order is based on reg address.

[1] https://patchwork.kernel.org/patch/11747669/

Change-Id: I3a61c02162e975b1ba4f8635b36965f99f0b60d7
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210118155242.7172-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 84b2c2c872)
2021-03-30 20:33:39 +08:00
Tao Huang
ba3f217445 arm64: rockchip_defconfig: Enable CONFIG_LEDS_TRIGGER_HEARTBEAT
RK3566 EVB use this feature.

Change-Id: I04796360365cf5e06952df5f00e4c7eb8493ea91
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2021-03-30 20:32:57 +08:00
Wu Liangqing
00e587302d arm64: dts: rockchip: rk356x-evb enabled work led
Change-Id: Id5ab430ae0b417646e416ee894929ee4e45f05f5
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2021-03-30 20:32:40 +08:00
Herman Chen
9aa7f0beff video: rockchip: mpp: Add device task capacity
1. Add mpp_dev task capacity and default is 1.
   The task capacity is the task queue length that hardware can accept.
   Default 1 means normal hardware can only accept one task at once.

2. Attach mpp_dev to mpp_taskqueue for status probe. The task queue
   capacity is the minimum task capacity of all the attached mpp_dev.

Change-Id: I8cafe806ec9399902237418d2bbcb088240ed415
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
2021-03-30 18:00:49 +08:00
Elaine Zhang
e76369cf03 clk: rockchip: rk3568: use CLK_FRAC_DIVIDER_NO_LIMIT flag for uart clk
Change-Id: I7aa00abf3623f1b96571f327824161428a367892
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2021-03-30 15:52:13 +08:00
Elaine Zhang
e5cbf33404 clk: rockchip: add flag CLK_FRAC_DIVIDER_NO_LIMIT for fractional divider
There are some clks(uart) that do not have to comply with the 20 times
fractional divider limit.

Change-Id: I420d8ba3b5de65d9e0ea74920d5ea8450ae94465
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2021-03-30 15:52:13 +08:00
William Wu
a5bc56f4b7 usb: dwc3: host: workaround xhci u2 broken suspend for RK356X
The RK356X DWC3 supports to set the USB 2.0 PHY enter
suspend mode if the DWC3 core suspend conditions are
valid (as per DWC3 controller databook 6.3.46 GUSB2PHYCFG
register bit6). This cause xHC driver failed to send
USB resume signal to USB 2.0 device in xhci_bus_resume().
This patch adds a quirk "xhci-u2-broken-suspend" to force
the xHC to set the link state to XDEV_RESUME and send USB
resume signal to USB 2.0 device.

Change-Id: I24c017867f80728890c0562a12e4554625913e67
Signed-off-by: William Wu <william.wu@rock-chips.com>
2021-03-30 15:23:35 +08:00
William Wu
6ad580141f usb: xhci: fix u2 bus suspend for Rockchip SNPS 3.0 xHC
Rockchip SNPS xHC 3.0 set USB 2.0 PHY enter suspend mode
from DWC3 core if the suspend conditions are valid (as per
DWC3 controller databook 6.3.46 GUSB2PHYCFG register bit6).
In this case, it needs to set the bus_suspended bit for
USB 2.0, so that in xhci_bus_resume, it can set the xHC
link state to XDEV_RESUME and send USB resume signal to
USB 2.0 device.

Test on RK3568 USB 3.0 Host interface with USB 2.0 Camera
or USB 2.0 HUB which support USB auto suspend. Without this
patch, the xHC fails to send USB resume signal on the USB
bus to wakeup the USB 2.0 devices, and cause xHC died.

Change-Id: Icb5a553d71a5f3144d77f8d5a5132892a5795285
Signed-off-by: William Wu <william.wu@rock-chips.com>
2021-03-30 15:23:06 +08:00
William Wu
6158751cd9 usb: dwc3: gadget: disable suspend event by default
The DWC3 suspend event is used for special usb gadgets
which support usb auto suspend, such as UVC. So disable
the suspend event by default, and enable it depends on
the uwk_en flag. This can avoid printing redundant log
continuously in some case like this:

[47.526109] dwc3 fcc00000.dwc3: device suspend
[47.527118] dwc3 fcc00000.dwc3: device suspend
[47.528200] dwc3 fcc00000.dwc3: device suspend
[47.529110] dwc3 fcc00000.dwc3: device suspend
[47.530120] dwc3 fcc00000.dwc3: device suspend

Change-Id: I1945eba68d4bb1639d9c3ace66a8caea023371cc
Signed-off-by: William Wu <william.wu@rock-chips.com>
2021-03-30 15:21:27 +08:00
William Wu
78181a93d1 usb: xhci: fix bulk tx with trb ent
On Rockchip platforms, we use TRB_ENT for bulk Tx TRB.
However, the TRB_ENT can only be enabled for TRB if
the transfer length of the TRB is an integer multiple
of the EP maxpacket. The current code only check the
transfer length of the first TRB, it's not enough.

Without this patch, the xHCI fail to do Read(10) command
with the U3 Disk used VFAT filesystem on RK3566 Box board
(2 + 4)G DDR, the error log like this:

[   23.165539] usb 2-1: new SuperSpeed Gen 1 USB device number 2 using xhci-hcd
[   23.183342] usb 2-1: New USB device found, idVendor=0781, idProduct=55a3, bcdDevice= 1.00
[   23.183418] usb 2-1: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[   23.183434] usb 2-1: Product: Ultra Luxe
[   23.183447] usb 2-1: Manufacturer: SanDisk
...
[   23.186615] usb-storage 2-1:1.0: USB Mass Storage device detected
[   23.189013] scsi host0: usb-storage 2-1:1.0
[   24.217186] scsi 0:0:0:0: Direct-Access     SanDisk  Ultra Luxe       1.00 PQ: 0 ANSI: 6
[   24.219712] sd 0:0:0:0: [sda] 120127488 512-byte logical blocks: (61.5 GB/57.3 GiB)
[   24.221263] sd 0:0:0:0: Attached scsi generic sg0 type 0
[   24.221301] sd 0:0:0:0: [sda] Write Protect is off
[   24.222162] sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
[   24.243346] sd 0:0:0:0: [sda] Attached SCSI removable disk
[   24.642325] FAT-fs (sda1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck.
[   25.862084] usb 2-1: reset SuperSpeed Gen 1 USB device number 2 using xhci-hcd
[   25.882974] sd 0:0:0:0: [sda] tag#0 FAILED Result: hostbyte=DID_ERROR driverbyte=DRIVER_OK
[   25.883003] sd 0:0:0:0: [sda] tag#0 CDB: Read(10) 28 00 00 50 28 01 00 00 3f 00
[   28.349195] usb 2-1: reset SuperSpeed Gen 1 USB device number 2 using xhci-hcd
[   28.366763] sd 0:0:0:0: [sda] tag#0 FAILED Result: hostbyte=DID_ERROR driverbyte=DRIVER_OK
[   28.366823] sd 0:0:0:0: [sda] tag#0 CDB: Read(10) 28 00 01 15 4b 81 00 00 3f 00

Fixes: 0f580acb01 ("usb: xhci: add support for xhci trb ent quirk")
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Iaa8f87eba3146c09fda858704c96644da40f5859
2021-03-30 14:30:02 +08:00
Algea Cao
51f0473d7f drm: rockchip: dw-hdmi: Don't clean output_if when mode set
If hdmi mode is changed but not plug out, encoder disabled
is after encoder atomic check, hdmi output_if won't be set
when crtc atomic enable, sync polarity won't be set correctly.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I2e3244c4f8f9f9fd565170d50f39710749085b98
2021-03-30 11:11:29 +08:00
Wang Panzhenzhuan
d06b5490d8 media: platform: rockchip: cif: fix rk3568 missing reg
rk3568 CIF_REG_GRF_CIFIO_CON1 reg has been omitted, fix it.

Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: Ib489312ae129fd522c7d23f55d14a7852086df25
2021-03-29 18:45:59 +08:00
Allon Huang
ef6aee87d2 media: platform: rockchip: cif: optimize dts parameters config
Signed-off-by: Allon Huang <allon.huang@rock-chips.com>
Change-Id: I2a8f471e52c2099f562f1bf765ea0c3e5d9e5845
2021-03-29 18:45:59 +08:00
Allon Huang
279747103f media: rockchip: cif: add dynamic cropping function
Signed-off-by: Allon Huang <allon.huang@rock-chips.com>
Change-Id: Ied69eef87b59f088e8e160b2631ad29127b03254
2021-03-29 18:45:58 +08:00
Cai YiWei
6545ac24ff media: rockchip: isp/ispp to version v1.5.2
Change-Id: I75d545c76ca4e59392211db9dbafd379141bbf19
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2021-03-29 18:45:58 +08:00
Cai YiWei
e1ff4db01b media: rockchip: isp: adjust rdbk times with mulit dev for isp2.0
Change-Id: I0d15991a0f17ce0498435a296d8b997e30f6fc38
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2021-03-29 18:45:58 +08:00
David Wu
3371773b5c net: ethernet: stmicro: Exit loopback when dwmac_rk_init failed
This patch fixed the following issue:
[  106.688843] Call trace:
[  106.689091]  dwmac4_release_tx_desc+0x0/0x10
[  106.689495]  dwmac_rk_loopback_with_identify+0x48/0x54
[  106.689971]  dwmac_rk_loopback_run.constprop.10+0x55c/0xcf8
[  106.690482]  phy_lb_scan_store+0xdc/0xe0
[  106.690848]  dev_attr_store+0x18/0x28
[  106.691191]  sysfs_kf_write+0x48/0x58
[  106.691531]  kernfs_fop_write+0xf4/0x220
[  106.691896]  __vfs_write+0x34/0x158
[  106.692219]  vfs_write+0xb0/0x1d0
[  106.692530]  ksys_write+0x64/0xe0
[  106.692842]  __arm64_sys_write+0x14/0x20

Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I7d36105d20cc94275842f07c9d7aaa49cc6daa06
2021-03-29 11:11:08 +08:00
Andy Yan
55fab09816 drm/rockchip: vop2: wb uv address must follow yrgb address without gap
VOP writeback directly without stride, and the uv buffer is follow
yrgb buffer without gap.

Change-Id: I9f63eb0527499e2d18d99fc248dbfd95b5d6179d
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-03-29 10:49:38 +08:00
Andy Yan
824600d786 drm/rockchip: vop2: Add uv offset for y mirror
Esmart/Smart should add offset in y mirror mode.

Change-Id: I5299543006c702c1492ee740460d0b7536e7d6e8
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-03-29 10:46:54 +08:00
Cai YiWei
9d40015844 media: rockchip: ispp: add uvnr sd32 self en control
Change-Id: I57c0ed94b7916a9ea2a17c0ab761bad3d0af27a4
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2021-03-29 10:46:20 +08:00
Dingxian Wen
76455ded4c media: i2c: rk628csi: fixed some issues
1.Fix the problem that MIPI CSI TX is abnormal when HDMI TX is powered on
after rk628.
2.Support dynamic switching of MIPI bit rate.
3.Remove 1080P50 from edid.

Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com>
Change-Id: I9980065da639b4b269306470f3ffa2db83a9b132
2021-03-26 17:37:32 +08:00
Finley Xiao
fc751a9c09 PM / devfreq: rockchip_dmc: Fix rate when enter isp and dulaview statuses
As the frequency can't be changed in isp and dulaview statuses,
the target frequency should be the bigger one, both in isp status
or in dulaview status.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Id9182d591f615304f24ccba5816424a876046dc3
2021-03-26 17:36:30 +08:00
Finley Xiao
eec8142566 PM / devfreq: rockchip_dmc: Fix misused IS_ERR_OR_NULL checks
Fixes the following warning:
drivers/devfreq/rockchip_dmc.c:2914
rockchip_dmcfreq_register_cooling_device() warn: passing zero to 'PTR_ERR'

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ia8b0811d0e27394e420b862305917314189f94be
2021-03-26 17:36:30 +08:00
Shawn Lin
9df33edc9a mmc: sdhci-of-dwcmshc: Fix DLL settings
We shouldn't enable any DLL settings in low speed and
always try to reset all of them in case of any leave-out
from previous stage.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Iccd5dde85425d3c5981300da5aba9563b2f8b821
2021-03-26 14:45:57 +08:00
Jianqun Xu
5c7123ea0f arm64: dts: rockchip: rk3568-android: reserved cma default at 128M
The usb driver will alloc from the cma default memory pool, when it's
limited to 32bit, the cma default memory should limit to dma32.

Change-Id: Ibd91f3158af6eae98d899018685e03e8f47e75a9
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-03-26 14:41:03 +08:00
William Wu
fbb9a10fc2 usb: dwc3: improve gadget wakeup from resume signal
The dwc3 wakeup and suspend interrupt handler are not perfect,
and it can't support usb gadget auto suspend function to save
power. For UVC device, the auto suspend function is necessary
and helpful.

With this patch, it enable DWC3_DEVTEN_EOPFEN by default for
software to handle suspend interrupt. And for Rockchip platforms,
they usually power down DRAM when system enter deep sleep, so
this patch disable the dwc3 irq in dwc3_suspend to avoid dwc3
controller access the DRAM for handling dwc3 event if wakeup
from USB Host resume signal.

By default, the gadget wakeup from system suspend is disabled.
The user can add "wakeup-source" property in DTS dwc3 node to
enable it like this:

&usbdrd_dwc3 {
	status = "okay";
	wakeup-source;
};

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Iaf9d642ae1ef6ed12e66a15158706de6d73d5124
2021-03-26 14:24:15 +08:00
Dingxian Wen
1f165caac6 arm64: rockchip_defconfig: enable CONFIG_VIDEO_RK628_CSI
Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com>
Change-Id: I896a6909a1f44323881afb5215cd890efe5456c6
2021-03-26 10:37:41 +08:00
Vicent Chi
8fb7288c5e media: i2c: nvp6188: fixup default fps info not match
Change-Id: Id25d580c8540c88d48402ee356e00bafbf4a7115
Signed-off-by: Vicent Chi <vicent.chi@rock-chips.com>
2021-03-26 10:01:54 +08:00
Huang zhibao
cecd44d545 arm64: dts: rockchip: rk3566-box: remove regulator-always-on from usb otg regulator
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: I66b8af4d1961e6cbb1e11ae9a2ed5d74bd35a50b
2021-03-26 09:01:39 +08:00
Huang zhibao
8362342c17 arm64: dts: rockchip: rk356x: remove pwm interrupts define from products dtsi
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: Id89aa2fb8f368fad504ce5efd4e1ed20e1335fa3
2021-03-26 08:38:37 +08:00
Zorro Liu
1cc56ceb3d drm/rockchip: ebc_dev: release version v1.06
wait pre mode end when mode change

Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Change-Id: I0b642da4aec21338a2ec36aac5fe3d1b58e9605c
2021-03-25 21:06:24 +08:00
Sandy Huang
eec84644a3 drm/rockchip: vop2: enable yuv clip when bt1120/bt656 output
Avoid image data have 0xff 0x00 0x00 lead to disturb bt1120/bt656
EAV and SAV sync signal, so enable yuv clip when bt1120/bt656 output.

Change-Id: I59d802814f3619641516254b88e82adc636c6cde
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-03-25 20:55:30 +08:00
Yu Qiaowei
b5c2d70e63 video/rockchip: rga2: Fix YUV output error.
Fix some modes that did not set the U/V address and
cause the output error of the YUV format image.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I41abd364576e0a73fd501f3dfc726eeaa6c9b118
2021-03-25 20:55:06 +08:00
Tao Huang
000389f66a ARM: dts: rockchip: bulk convert gpios to their constant counterparts (v2)
According to upstream commit 07f08d9cee ("ARM: dts: rockchip:
bulk convert gpios to their constant counterparts") replace
RK_FUNC_x -> x and RK_GPIOx -> x.

sed -i -e "
/rockchip,pins *=/bcheck
b # to end of script
:append-next-line
N
:check
/^[^;]*$/bappend-next-line
s/<RK_GPIO\([0-9]\) /<\1 /g
s/<\([^ ][^ ]*  *\)0 /<\1RK_PA0 /g
s/<\([^ ][^ ]*  *\)1 /<\1RK_PA1 /g
s/<\([^ ][^ ]*  *\)2 /<\1RK_PA2 /g
s/<\([^ ][^ ]*  *\)3 /<\1RK_PA3 /g
s/<\([^ ][^ ]*  *\)4 /<\1RK_PA4 /g
s/<\([^ ][^ ]*  *\)5 /<\1RK_PA5 /g
s/<\([^ ][^ ]*  *\)6 /<\1RK_PA6 /g
s/<\([^ ][^ ]*  *\)7 /<\1RK_PA7 /g
s/<\([^ ][^ ]*  *\)8 /<\1RK_PB0 /g
s/<\([^ ][^ ]*  *\)9 /<\1RK_PB1 /g
s/<\([^ ][^ ]*  *\)10 /<\1RK_PB2 /g
s/<\([^ ][^ ]*  *\)11 /<\1RK_PB3 /g
s/<\([^ ][^ ]*  *\)12 /<\1RK_PB4 /g
s/<\([^ ][^ ]*  *\)13 /<\1RK_PB5 /g
s/<\([^ ][^ ]*  *\)14 /<\1RK_PB6 /g
s/<\([^ ][^ ]*  *\)15 /<\1RK_PB7 /g
s/<\([^ ][^ ]*  *\)16 /<\1RK_PC0 /g
s/<\([^ ][^ ]*  *\)17 /<\1RK_PC1 /g
s/<\([^ ][^ ]*  *\)18 /<\1RK_PC2 /g
s/<\([^ ][^ ]*  *\)19 /<\1RK_PC3 /g
s/<\([^ ][^ ]*  *\)20 /<\1RK_PC4 /g
s/<\([^ ][^ ]*  *\)21 /<\1RK_PC5 /g
s/<\([^ ][^ ]*  *\)22 /<\1RK_PC6 /g
s/<\([^ ][^ ]*  *\)23 /<\1RK_PC7 /g
s/<\([^ ][^ ]*  *\)24 /<\1RK_PD0 /g
s/<\([^ ][^ ]*  *\)25 /<\1RK_PD1 /g
s/<\([^ ][^ ]*  *\)26 /<\1RK_PD2 /g
s/<\([^ ][^ ]*  *\)27 /<\1RK_PD3 /g
s/<\([^ ][^ ]*  *\)28 /<\1RK_PD4 /g
s/<\([^ ][^ ]*  *\)29 /<\1RK_PD5 /g
s/<\([^ ][^ ]*  *\)30 /<\1RK_PD6 /g
s/<\([^ ][^ ]*  *\)31 /<\1RK_PD7 /g
s/<\([^ ][^ ]*  *[^ ][^ ]*  *\)0 /<\1RK_FUNC_GPIO /g
s/<\([^ ][^ ]*  *[^ ][^ ]*  *\)RK_FUNC_\([1-9]\) /<\1\2 /g
" *.dts *.dtsi

Change-Id: I8ee2a66094cc25b0d72aba11a239f4fe9c76c4f4
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2021-03-25 19:55:38 +08:00
Tao Huang
f8817b8fb3 arm64: dts: rockchip: bulk convert gpios to their constant counterparts (v2)
According to upstream commit d64420e816 ("arm64: dts: rockchip:
bulk convert gpios to their constant counterparts") replace
RK_FUNC_x -> x and RK_GPIOx -> x.

sed -i -e "
/rockchip,pins *=/bcheck
b # to end of script
:append-next-line
N
:check
/^[^;]*$/bappend-next-line
s/<RK_GPIO\([0-9]\) /<\1 /g
s/<\([^ ][^ ]*  *\)0 /<\1RK_PA0 /g
s/<\([^ ][^ ]*  *\)1 /<\1RK_PA1 /g
s/<\([^ ][^ ]*  *\)2 /<\1RK_PA2 /g
s/<\([^ ][^ ]*  *\)3 /<\1RK_PA3 /g
s/<\([^ ][^ ]*  *\)4 /<\1RK_PA4 /g
s/<\([^ ][^ ]*  *\)5 /<\1RK_PA5 /g
s/<\([^ ][^ ]*  *\)6 /<\1RK_PA6 /g
s/<\([^ ][^ ]*  *\)7 /<\1RK_PA7 /g
s/<\([^ ][^ ]*  *\)8 /<\1RK_PB0 /g
s/<\([^ ][^ ]*  *\)9 /<\1RK_PB1 /g
s/<\([^ ][^ ]*  *\)10 /<\1RK_PB2 /g
s/<\([^ ][^ ]*  *\)11 /<\1RK_PB3 /g
s/<\([^ ][^ ]*  *\)12 /<\1RK_PB4 /g
s/<\([^ ][^ ]*  *\)13 /<\1RK_PB5 /g
s/<\([^ ][^ ]*  *\)14 /<\1RK_PB6 /g
s/<\([^ ][^ ]*  *\)15 /<\1RK_PB7 /g
s/<\([^ ][^ ]*  *\)16 /<\1RK_PC0 /g
s/<\([^ ][^ ]*  *\)17 /<\1RK_PC1 /g
s/<\([^ ][^ ]*  *\)18 /<\1RK_PC2 /g
s/<\([^ ][^ ]*  *\)19 /<\1RK_PC3 /g
s/<\([^ ][^ ]*  *\)20 /<\1RK_PC4 /g
s/<\([^ ][^ ]*  *\)21 /<\1RK_PC5 /g
s/<\([^ ][^ ]*  *\)22 /<\1RK_PC6 /g
s/<\([^ ][^ ]*  *\)23 /<\1RK_PC7 /g
s/<\([^ ][^ ]*  *\)24 /<\1RK_PD0 /g
s/<\([^ ][^ ]*  *\)25 /<\1RK_PD1 /g
s/<\([^ ][^ ]*  *\)26 /<\1RK_PD2 /g
s/<\([^ ][^ ]*  *\)27 /<\1RK_PD3 /g
s/<\([^ ][^ ]*  *\)28 /<\1RK_PD4 /g
s/<\([^ ][^ ]*  *\)29 /<\1RK_PD5 /g
s/<\([^ ][^ ]*  *\)30 /<\1RK_PD6 /g
s/<\([^ ][^ ]*  *\)31 /<\1RK_PD7 /g
s/<\([^ ][^ ]*  *[^ ][^ ]*  *\)0 /<\1RK_FUNC_GPIO /g
s/<\([^ ][^ ]*  *[^ ][^ ]*  *\)RK_FUNC_\([1-9]\) /<\1\2 /g
" *.dts *.dtsi

Change-Id: I789e702620a4d0331d54474d48aaf68133795859
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2021-03-25 19:40:40 +08:00
Sandy Huang
282016c6b0 drm/rockchip: vop: enable yuv clip when bt1120 output
Avoid image data have 0xff 0x00 0x00 lead to disturb bt1120 EAV and SAV
sync signal, so enable yuv clip when bt1120 output.

Change-Id: I103615bfecfbf812768b89fb42bfd3859950187b
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-03-25 15:12:32 +08:00
Vicent Chi
5fe2f921ff media: i2c: nvp6188: fixup mixed resolution linkfreq rate mismatch
Change-Id: I7b886b45982fd4682ebf1db45ee182a18dcdb218
Signed-off-by: Vicent Chi <vicent.chi@rock-chips.com>
2021-03-25 15:10:52 +08:00
William Wu
241a5e5577 usb: gadget: f_uvc: add suspend and resume function
This patch adds uvc_function_suspend and uvc_function_resume
for uvc function. With this patch, if usb bus enter suspend
or resume state, the usb controller driver will call the
uvc_function_suspend or uvc_function_resume to send event
to uvc app.

Change-Id: I9c584aae25298747c5a287243cb3efd71c8adfe6
Signed-off-by: William Wu <william.wu@rock-chips.com>
2021-03-25 14:13:10 +08:00
Cai YiWei
f8b5452aae media: rockchip: isp: support multi dev for isp21
Change-Id: I5973f952d0b744448025496c29a1c6b4c5316db3
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2021-03-25 14:12:44 +08:00
Ville Syrjälä
b5529311af UPSTREAM: drm/edid: Add CTA-861-G modes with VIC >= 193
Add a second table to the cea modes with VIC >= 193.

v2: Improve the comment for cea_modes_*[] to indicate
    that one should always use cea_mode_for_vic() (Tom)

Cc: Hans Verkuil <hansverk@cisco.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Thomas Anderson <thomasanderson@google.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191213174348.27261-3-ville.syrjala@linux.intel.com
(cherry picked from commit f7655d42fc)
Change-Id: Ie8889d9062cdadfa3416ea35caf1b8ecca24cadc
2021-03-25 11:33:39 +08:00
Ville Syrjälä
c417ed8f46 UPSTREAM: drm/edid: Abstract away cea_edid_modes[]
We're going to need two cea mode tables (one for VICs < 128,
another one for VICs >= 193). To that end replace the direct
edid_cea_modes[] lookups with a function call. And we'll rename
the array to edid_cea_modes_0[] to indicate how it's to be
indexed.

v2: Fix typos (Tom)
    Drop the pointless NULL checks in the loops (Tom)
    Assign when declaring (Tom)
    Improve the comment for cea_modes_*[] to indicate
    that one should always use cea_mode_for_vic() (Tom)

Cc: Tom Anderson <thomasanderson@google.com>
Cc: Hans Verkuil <hansverk@cisco.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191213174348.27261-2-ville.syrjala@linux.intel.com
Reviewed-by: Thomas Anderson <thomasanderson@google.com>
(cherry picked from commit 7befe621ff)
Change-Id: I97f9bfe67f0b4b7f2f4da53105d625add04b8f8b
2021-03-25 11:32:49 +08:00
Ville Syrjälä
01235a497c UPSTREAM: drm/edid: Add CTA-861-G modes with VIC < 128
Fill out our list of cea modes with the new stuff from CTA-861-G.
We only do the modes with VIC < 128 here. Adding the higher
numbered VICs will need some slight code refactoring first.

Cc: Hans Verkuil <hansverk@cisco.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190711103234.6294-2-ville.syrjala@linux.intel.com
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
(cherry picked from commit 978f6b0693)
Change-Id: I3fe74dc92e0f97e74445fc348962c2cd05155063
2021-03-25 11:31:17 +08:00
Jon Lin
483a2cd58a spi: rockchip: Stop spi slave dma receiver when cs inactive
The spi which's version is higher than ver 2 will automatically
enable this feature.

If the length of master transmission is uncertain, the RK spi slave
is better to automatically stop after cs inactive instead of waiting
for xfer_completion forever.

Change-Id: If99e51d35391b824f48e31a3e4508db036593c8a
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-03-25 10:24:37 +08:00
Vicent Chi
b33df72292 media: i2c: add techpoint driver
Change-Id: I6022492c26a9d792773de28f2ae05e817a9040e8
Signed-off-by: Vicent Chi <vicent.chi@rock-chips.com>
2021-03-25 09:26:04 +08:00
Yu Qiaowei
7918accd02 video/rockchip: rga2: Support 8G DDR.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I2583cd7f96362803fd57a25f42aad21e23e837d4
2021-03-25 09:18:37 +08:00
Tao Huang
b8c64fbca6 media/i2c/soc_camera: remove unused rockchip drivers
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I898b1035c9d591143ec35e7b4c137603201ef89a
2021-03-24 18:52:38 +08:00
Vicent Chi
8f94f92285 media: platform: cif: not allow reset work after all streams off
Change-Id: Ifceccb3788dae7a95dae09a0c524a52b33808a26
Signed-off-by: Vicent Chi <vicent.chi@rock-chips.com>
2021-03-24 16:57:35 +08:00