On Cortex-A12 (r0p0..r0p1-00lac0-rc11), when a CPU executes a sequence of
two conditional store instructions with opposite condition code and
updating the same register, the system might enter a deadlock if the
second conditional instruction is an UNPREDICTABLE STR or STM
instruction. This workaround setting bit[12] of the Feature Register
prevents the erratum. This bit disables an optimisation applied to a
sequence of 2 instructions that use opposing condition codes.
Add CONFIG_ION_CMA_HIGHMEM to support cma that placed in highmem zone.
Use dma_alloc_attrs() with DMA_ATTR_NO_KERNEL_MAPPING to alloc memory from
cma heap that placed in highmem zone, and use dma_free_attrs() with
DMA_ATTR_NO_KERNEL_MAPPING to free the memory.
Use ion_heap_map_kernel/ion_heap_unmap_kernel for map/unmap to the kernel
when support cma in highmem.
reserved DMA(CMA) regions may be large than 512MB for devices, placed it
in the highmem zone is appropriate, but according to the existing
mechanism, memory allocation with mapping will cause vmalloc area not
enough.
Now we don't do mapping if the DMA_ATTR_NO_KERNEL_MAPPING is set.
If devices fall in bad state make data_busy be hold too long,
dto interrupt will not be present, which leading mmc-core wait for it forever.
[<c06d42e4>] (__schedule+0x48c/0x554) from [<c06d275c>] (schedule_timeout+0x1c/0x260)
[<c06d275c>] (schedule_timeout+0x1c/0x260) from [<c06d3c10>] (wait_for_common+0xd0/0x164)
[<c06d3c10>] (wait_for_common+0xd0/0x164) from [<c044a4bc>] (mmc_wait_for_req_done+0x1c/0xe0)
[<c044a4bc>] (mmc_wait_for_req_done+0x1c/0xe0) from [<c0453730>] (mmc_io_rw_extended+0x218/0x294)
[<c0453730>] (mmc_io_rw_extended+0x218/0x294) from [<c0454590>] (sdio_io_rw_ext_helper+0xc8/0x194)
[<c0454590>] (sdio_io_rw_ext_helper+0xc8/0x194) from [<c04546b0>] (sdio_memcpy_toio+0x1c/0x20)
[<c04546b0>] (sdio_memcpy_toio+0x1c/0x20) from [<c032e96c>] (sdioh_request_packet+0x664/0x7e8)
[<c032e96c>] (sdioh_request_packet+0x664/0x7e8) from [<c032fc78>] (sdioh_request_buffer+0x1a8/0x210)
