Commit Graph

609066 Commits

Author SHA1 Message Date
Yifeng Zhao
9f091f9fc6 drivers: rk_nand: zftl static wear leveling strategy optimize
1. Garbage collection does not deal with the updated blocks.
2. Static wear considers the SLC mode erase count and XLC
mode erase count

Change-Id: I3a404a686e48f8ae44f5e7e507f6d1ef633671d4
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
2018-05-25 16:32:10 +08:00
Liang Chen
6bd134260e soc: rockchip: pvtm: correct bit_freq_done for rk3288
Change-Id: I6afb822149971be77c2fd7365771f43143691c8d
Signed-off-by: Liang Chen <cl@rock-chips.com>
2018-05-25 11:40:06 +08:00
Tao Huang
a49baba6eb ARM: rockchip: no build mach-rockchip when CONFIG_ARM_PSCI
There is not need to build mach-rockchip when PSCI is enabled.
Save about 5K text, 7K data and fix compilation error for THUMB2_KERNEL.

Change-Id: Ieb17867592d7d49a8b983dc5c7e8d1d1df14d864
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-05-25 09:12:28 +08:00
Tao Huang
d2bc46a703 ARM: rockchip: support CPU config
CACHE_L2X0/TWD/ARM_GLOBAL_TIMER are only available on Cortex-A9.
DW_APB_TIMER_OF only use on rk3066a.

Change-Id: Ied2f49b5d308e961ce5af72eb577aac23e3eb890
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-05-25 09:10:22 +08:00
Tao Huang
f1cb4fc186 soc: rockchip: all cpu support ARM
Let ARMv8 CPU that support AARCH32 selected on ARM.
But disabled by default.

Change-Id: I1db422c8ed3fcaf761c9ef9d6d5d68356696e4ab
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-05-25 09:10:02 +08:00
Tao Huang
bfe1e6e631 ASoC: rockchip: i2s_tdm: Cast pointer to uintptr_t to fix warning on 32-bit
On 32-bit:
sound/soc/rockchip/rockchip_i2s_tdm.c:155:18: warning:
cast from pointer to integer of different size [-Wpointer-to-int-cast]

Cast the pointer to uintptr_t instead of u64 to fix this.

Change-Id: Ie7dbbb59da68fadfe8ad639d93c513e38ab00b38
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-05-25 09:09:33 +08:00
Tao Huang
76a299b90c clk: rockchip: pll: Fix compile error when !DEBUG_FS
Change-Id: I49be8f1772e28ab7f3cc343b0a81f258d739fdfb
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-05-24 19:37:29 +08:00
Wang Panzhenzhuan
49b5045634 camera: rockchip: camsys_drv: v0.0x29.0
Fix crash in rk3288w mid sample machine when switch to
front soc camera,such as: gc2035

Change-Id: I94fb4f29834f6e9b54db025059d558c3813a2a33
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
2018-05-24 16:49:54 +08:00
Shawn Lin
001cdfec71 mmc: core: Allow adding software debounce via mmc_gpiod_request_cd()
mmc_gpio_request_cd() allow host drivers to add bigger software
debounce from the drivers themself, but we might allow the same
behaviour from the fwnode.

Change-Id: Icc994aa9b58b0b8836a2fb60ac1a87ac3c7e676a
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2018-05-24 16:47:45 +08:00
Zain Wang
5d600c5c23 BACKPORT: ARM: dts: rockchip: Add Crypto node for rk3288
Add Crypto node for rk3288 including crypto controller and dma clk.

Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit c2cb616129)

Change-Id: I3e56c3bd6831248b724487ddfa8e468308f79476
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2018-05-24 14:07:59 +08:00
Zain Wang
10691369e3 UPSTREAM: crypto: rockchip - add DT bindings documentation
Add DT bindings documentation for the rk3288 crypto drivers.

Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit e81c1b4646)

Change-Id: Iaea953b6a7fe59c957377f6b963ffc6e700cf592
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2018-05-24 14:07:59 +08:00
Zain Wang
5ad9ae1478 UPSTREAM: crypto: rockchip - Don't dequeue the request when device is busy
The device can only process one request at a time. So if multiple
requests came at the same time, we can enqueue them first, and
dequeue them one by one when the device is idle.

Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit 5a7801f663)

Change-Id: Ie155271c181cd9b6174708e8ebc36bf65c0d49c8
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2018-05-24 14:07:59 +08:00
Zain Wang
d0733c029c UPSTREAM: crypto: rockchip - return the err code when unable dequeue the crypto request
Sometime we would unable to dequeue the crypto request, in this case,
we should finish crypto and return the err code.

Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit 9a42e4eed3)

Change-Id: If3cd08dbd48beb66539a3ac6bbe1c3d2656c8a7b
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2018-05-24 14:07:59 +08:00
Zain Wang
deadc80be3 UPSTREAM: crypto: rockchip - move the crypto completion from interrupt context
It's illegal to call the completion function from hardirq context,
it will cause runtime tests to fail. Let's build a new task (done_task)
for moving update operation from hardirq context.

Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit 641eacd156)

Change-Id: Iddfdf48c5dc823817d7e15fc5d04bef96506c3be
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2018-05-24 14:07:59 +08:00
Sudip Mukherjee
5321d2f8eb UPSTREAM: crypto: rockchip - use devm_add_action_or_reset()
If devm_add_action() fails we are explicitly calling the cleanup to free
the resources allocated.  Lets use the helper devm_add_action_or_reset()
and return directly in case of error, as we know that the cleanup function
has been already called by the helper if there was any error.

Signed-off-by: Sudip Mukherjee <sudip.mukherjee@codethink.co.uk>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit 16d56963e8)

Change-Id: I9fd5d7c0659744243b313693615bf332a2b5e05c
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2018-05-24 14:07:59 +08:00
Zain Wang
2e5c80594b UPSTREAM: crypto: rockchip - add hash support for crypto engine in rk3288
Add md5 sha1 sha256 support for crypto engine in rk3288.

Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit bfd927ffa2)

Change-Id: Ifabff24170064187aaffcf396d50c22007ac48bc
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2018-05-24 14:07:59 +08:00
Heiko Stuebner
8c2b0823c8 UPSTREAM: crypto: rockchip - fix possible deadlock
Lockdep warns about a possible deadlock resulting from the use of regular
spin_locks:

=================================
[ INFO: inconsistent lock state ]
4.4.0-rc2+ #2724 Not tainted
---------------------------------
inconsistent {SOFTIRQ-ON-W} -> {IN-SOFTIRQ-W} usage.
ksoftirqd/0/3 [HC0[0]:SC1[1]:HE1:SE0] takes:
(&(&crypto_info->lock)->rlock){+.?...}, at: [<bf14a65c>] rk_crypto_tasklet_cb+0x24/0xb4 [rk_crypto]
{SOFTIRQ-ON-W} state was registered at:
  [<c007f4ac>] lock_acquire+0x178/0x218
  [<c0759bac>] _raw_spin_lock+0x54/0x64
  [<bf14af88>] rk_handle_req+0x7c/0xbc [rk_crypto]
  [<bf14b040>] rk_des_ecb_encrypt+0x2c/0x30 [rk_crypto]
  [<bf14b05c>] rk_aes_ecb_encrypt+0x18/0x1c [rk_crypto]
  [<c028c820>] skcipher_encrypt_ablkcipher+0x64/0x68
  [<c0290770>] __test_skcipher+0x2a8/0x8dc
  [<c0292e94>] test_skcipher+0x38/0xc4
  [<c0292fb0>] alg_test_skcipher+0x90/0xb0
  [<c0292158>] alg_test+0x1e8/0x280
  [<c028f6f4>] cryptomgr_test+0x34/0x54
  [<c004bbe8>] kthread+0xf4/0x10c
  [<c0010010>] ret_from_fork+0x14/0x24
irq event stamp: 10672
hardirqs last  enabled at (10672): [<c002fac8>] tasklet_action+0x48/0x104
hardirqs last disabled at (10671): [<c002faa0>] tasklet_action+0x20/0x104
softirqs last  enabled at (10658): [<c002ef84>] __do_softirq+0x358/0x49c
softirqs last disabled at (10669): [<c002f108>] run_ksoftirqd+0x40/0x80

other info that might help us debug this:
Possible unsafe locking scenario:

    CPU0
    ----
  lock(&(&crypto_info->lock)->rlock);
  <Interrupt>
    lock(&(&crypto_info->lock)->rlock);

 *** DEADLOCK ***

Fix this by moving to irq-disabling spinlocks.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit ac7c8e6b6d)

Change-Id: Ic333d4924b1984ea953f7a4c8da18d078cba8239
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2018-05-24 14:07:59 +08:00
Zain Wang
a1ffacfbe6 UPSTREAM: crypto: rockchip - add crypto driver for rk3288
Crypto driver support:
     ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede)
You can alloc tags above in your case.

And other algorithms and platforms will be added later on.

Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit 433cd2c617)

Change-Id: I7ee26d896754f66adb1152b33c65cc030c4906ed
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2018-05-24 14:07:59 +08:00
LABBE Corentin
2f8f9b4153 UPSTREAM: crypto: hash - add zero length message hash for shax and md5
Some crypto drivers cannot process empty data message and return a
precalculated hash for md5/sha1/sha224/sha256.

This patch add thoses precalculated hash in include/crypto.

Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit 0c4c78de04)

Change-Id: Ie15d9e6119f415c7c5af875fec160299e9053770
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2018-05-24 11:44:00 +08:00
Sudip Mukherjee
c0d45d1ad2 UPSTREAM: devm: add helper devm_add_action_or_reset()
Add a helper function devm_add_action_or_reset() which will internally
call devm_add_action(). But if devm_add_action() fails then it will
execute the action mentioned and return the error code.

Signed-off-by: Sudip Mukherjee <sudip@vectorindia.org>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit a3499e9bf0)

Change-Id: Ice9a6b483021494194b3c57149bbc451050b1fe3
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2018-05-24 11:43:52 +08:00
Algea Cao
51c6af4856 drm/rockchip: inno-hdmi-phy: Support more pre-pll configuration
Adding the following freq cfg in 8-bit and 10-bit color depth:

{
  40000000,  65000000,  71000000,  83500000, 85750000,
  88750000, 108000000, 119000000, 162000000
}

New freq has been validated by quantumdata 980.

For some freq which can't be got by only using integer freq div,
frac freq div is needed, Such as 88.75Mhz 10-bit. But The actual
freq is different from the target freq, We must try to narrow
the gap between them. RK322X only support integer freq div.

The VCO of pre-PLL must be more than 2Ghz, otherwise PLL may be
unlocked.

Change-Id: Icc978a31a51e330e12c6372c68f4e6b94e26cbda
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2018-05-23 18:49:56 +08:00
Putin Lee
81e58a6d23 Revert "video/rockchip: rga2: remove flush cache"
This change has some bug, revert it.

This reverts commit cc06fabbcd.

Change-Id: I8f772f01d50379f68767d9b79b13826b1dd3610a
Signed-off-by: Putin Lee <putin.li@rock-chips.com>
2018-05-23 16:16:24 +08:00
Caesar Wang
3c5053599b arm64: config: add configure for rk3326_linux
As rk3326 used the new ISP framework that different with old
ISP v10 was used by other SoCs. We didn't have a better solution to solve
the camera configure.

Also, the rk3326 linux need improve the optimization for some products.

Change-Id: I212ef50cdd0b4860759505e2f7a03106ac2ef268
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2018-05-23 15:35:24 +08:00
Binyuan Lan
37e9548f04 arm64: dts: rockchip: px30: add cpuinfo
Change-Id: Ib9819736fb67ca6f8de31c847f13c660f6bcba96
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
2018-05-23 15:05:47 +08:00
Shunqian Zheng
250569c9b4 ARM: dts: add rockchip px3se evb board
This adds rockchip px3se evb board dts.

Change-Id: I3ae9dbc7833e1001379e6b57f22c6930d8ddd21f
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
2018-05-23 14:04:30 +08:00
Dingqiang Lin
a38fd055d2 drivers: rkflash: add rkflash drivers
Change-Id: I6faf12d63088b8df345b69fc4665915429c856c9
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
2018-05-23 09:26:14 +08:00
Dingqiang Lin
4f7c7cdaef Documentation: bindings: add DT documentation for rkflash driver
Change-Id: I88c079435e6d1623eedc7317438fca9bf3f21759
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
2018-05-23 09:26:14 +08:00
Dingqiang Lin
d66b1d9e6a soc: rockchip: add flash vendor storage support
Change-Id: I0261e652161e6a20a4d988c4ddfd7f186ad2200e
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
2018-05-23 09:26:14 +08:00
Huibin Hong
69a8ff2ffa soc: rockchip: rk_fiq_debugger: remove debug_port_init of uart putc and flush
If uart is busy all the time, which may call debug_port_init and
reset uart, but this can't clear the USR busy status. The LCR can't be
writed if UART is busy.UART can't be reinited ok.

This issue is tested by open and close wifi, and start logcat.
A lot of android log is outputed by uart,uart is always busy,maybe it
triggers reinit process, and cause the issue.

It is unnecessary to call debug_port_init, because we have make sure
uart is ok all the time.

Change-Id: I1ef06e2a913d7045e86fe75a48a152c04e7e96a7
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2018-05-22 16:49:19 +08:00
Caesar Wang
a9010d53ff arm64: dts: rockchip: with GPT for rk3326-linux bootargs
The linux platform used the GPT for update image, and the new
tools(v2.55) had fixed the bug before.

Change-Id: I200d98170d538098c4e3472a22398a4ecc15270e
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2018-05-22 16:18:49 +08:00
Ziyuan Xu
ee9369d235 pwm: gpio: reivse something according from the upstream
-sort include files alphabetically
-drop DRV_NAME
-fix type definition of some variables
-only support one gpio per node
-fixup gpio output value polarity

The PWM_POLARITY_NORMAL(=0) means a high signal for the duration of the
duty-cycle, thus rectify the output value in pwm_on&off.

Usually, the pwm output should be a low signal before the first-timeuse.
Because of the probe function set the gpio output value to GPIOD_OUT_LOW
within devm_gpiod_get_index, we have been forced to set the flag of
gpios with ACTIVE_HIGH.

-fixup reverse the output signal at an inappropriate moment

In one case, someone set the value of duty_cycle as the same as the
period while the pwm output is enable, the off_time will be set to zero.
However the original implementation still to set the pwm output to a low
signal, it causes the output is not a **real** high signal. As the
result,
the output duty cycle is almost 97 percent.

Change-Id: I449fc96938ccaeb7bdfaf90e237eeb9f5c4e6de6
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
2018-05-22 14:45:10 +08:00
Ziyuan Xu
2c43cafb74 Documentation: dt: pwm-gpio: fix a bad sample
Refer to the proposal of https://patchwork.kernel.org/patch/7492201/ to
fixup the sample.

Change-Id: Ia81c631fcdb2893cbec3f12b828162bc090b99cd
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
2018-05-22 14:45:10 +08:00
Olliver Schinagl
db7279d29f FROMLIST: pwm: gpio: Add a generic gpio based PWM driver
This patch adds a bit-banging gpio PWM driver. It makes use of hrtimers,
to allow nano-second resolution, though it obviously strongly depends on
the switching speed of the gpio pins, hrtimer and system load.

Each pwm node can have 1 or more "pwm-gpio" entries, which will be
treated as pwm's as part of a pwm chip.

Change-Id: Ibdb28eca3239a3a8503c947667117a9b0e9427b9
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
(cherry picked from https://patchwork.kernel.org/patch/7492201/)
2018-05-22 14:45:10 +08:00
Liang Chen
054d326294 arm64: dts: rockchip: adjust opp-table by pvtm for px30/rk3326
Change-Id: I0d72c313a484611ca20c0b39b21ce6d3ed85d7d4
Signed-off-by: Liang Chen <cl@rock-chips.com>
2018-05-22 09:45:44 +08:00
Liang Chen
e5a5cff62f PM / devfreq: rockchip: adjust opp-table by pvtm for dmc and gpu
Change-Id: Iec80dc04ddedbfe747dd7a9ff45e0b1a111728ac
Signed-off-by: Liang Chen <cl@rock-chips.com>
2018-05-22 09:45:43 +08:00
Liang Chen
d5ee3defbe soc: rockchip: opp_select: use the saved pvtm data for the same channel
Some modules will use the same pvtm channel to adjust opp-table, do not
calclate pvtm data twice for the same channel.

Change-Id: Ib8d765139821cfbdcc45bd60153d975fc80d48fa
Signed-off-by: Liang Chen <cl@rock-chips.com>
2018-05-22 09:45:25 +08:00
Sugar Zhang
2b987b28a8 ASoC: rockchip: i2s_tdm: add support for tdm mode
Change-Id: Id99c14a1f49796107186405b8b73bffcc49143e8
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2018-05-21 18:37:06 +08:00
William Wu
5597d4ac85 FROMLIST: usb: dwc2: fix the incorrect bitmaps for the ports of multi_tt hub
The dwc2_get_ls_map() use ttport to reference into the
bitmap if we're on a multi_tt hub. But the bitmaps index
from 0 to (hub->maxchild - 1), while the ttport index from
1 to hub->maxchild. This will cause invalid memory access
when the number of ttport is hub->maxchild.

Without this patch, I can easily meet a Kernel panic issue
if connect a low-speed USB mouse with the max port of FE2.1
multi-tt hub (1a40:0201) on rk3288 platform.

Change-Id: I51c6fb53919e3ab186b95180c4fd6569e03cffee
Signed-off-by: William Wu <william.wu@rock-chips.com>
(am from https://patchwork.kernel.org/patch/10414533/)
2018-05-21 18:16:42 +08:00
Huang jianzhi
38160e8ac9 arm64: dts: rockchip: add new dts for rk3328 liantong box
Change-Id: Icb443a3b0d5117c6eed9e64b0321106a90813bb9
Signed-off-by: Huang jianzhi <jesse.huang@rock-chips.com>
2018-05-21 15:54:28 +08:00
Zhen Chen
b1111d30ea MALI: rockchip: upgrade bifrost DDK to r12p0-01rel0
in addition,
	resolve all the conflicts;
	rename all the configs and macros that have a same name in midgard/;
	adjust "platform specific code" for the change of interface
		to get GPU busy/idle time from "common part";

Change-Id: Iad3493c15c95653a1c72c5375f510e44c4535d0c
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2018-05-21 11:37:35 +08:00
Huang jianzhi
fda77a2530 ARM64: dts: rockchip: rk3328: add the pwm0 and pwm1 pull up pinctrl interface
Change-Id: I2e21318a5863a020f104872c803ff2250b84fd7d
Signed-off-by: Huang jianzhi <jesse.huang@rock-chips.com>
2018-05-21 11:01:03 +08:00
Elaine Zhang
66aa9cdc5b ARM64: dts: rockchip: rk3399: mark xin32k clk as fixed clk
Change-Id: Ia9e0af6242a20c62e4042afe4d99dedcfbeb753b
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2018-05-21 09:42:56 +08:00
Elaine Zhang
d42f8848b6 ARM64: dts: rockchip: rk3368: mark xin32k clk as fixed clk
Change-Id: I773b37449b67518e06102c950d34e55b778295db
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2018-05-21 09:41:31 +08:00
Elaine Zhang
9b3c02ff75 ARM64: dts: rockchip: rk3366: mark xin32k clk as fixed clk
Change-Id: Ic9a6167e389f39bc93fd6214b8fe07ef30dea7da
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2018-05-21 09:36:07 +08:00
Elaine Zhang
7b06728ef9 ARM64: dts: rockchip: rk3328: mark xin32k clk as fixed clk
Change-Id: I25ab72ba7af64b7031fb02d30d0cb5cb6798d692
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2018-05-21 09:36:07 +08:00
Elaine Zhang
ad49663a83 ARM: dts: rk322x: mark xin32k clk as fixed clk
Change-Id: I89a5f3f8a938b68d00b655a6e93160c865691c2c
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2018-05-21 09:36:06 +08:00
Elaine Zhang
f69d17a2ae ARM: dts: rk312x: mark xin32k clk as fixed clk
Change-Id: If5aa3acb02580eb7766ad118ddf189c218f7acac
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2018-05-21 09:36:06 +08:00
Elaine Zhang
128cff7b2b ARM: dts: rk3036: mark xin32k clk as fixed clk
Change-Id: I5bf0a64502a7dd7b36545437b1675bb896c97bce
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2018-05-21 09:36:06 +08:00
Elaine Zhang
d901f21180 ARM: dts: rk3288: mark xin32k clk as fixed clk
Change-Id: I1fc9c2f8213f6645659bd731546ca9cafd7d63d0
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2018-05-21 09:36:05 +08:00
Stefan Brüns
ade6b9cc4e UPSTREAM: iio: light: vl6180: Correct ALS scale for non-default gain/integration time
The reported scale was only correct for the default settings of 100 ms
integration time and gain 1.

This aligns the reported scale with the behaviour of any other IIO driver
and the documented ABI, but may require userspace changes if someone uses
non-default settings.

Change-Id: I969d50d317f20d05d26db74d497dba790b5a7c25
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
(cherry picked from commit 3525d7cfb7)
2018-05-19 10:50:09 +08:00