externd rockchip_drm_crtc from drm_crtc, so we can add more private
parameter for dump buffer function.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I9e0450cafe9d184ac4d9daad03749ade1302f249
externd rockchip_drm_crtc from drm_crtc, so we can add more private
parameter for dump buffer function.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I56ca9c08d7d2bb19de544d56c9bc883d5b880da1
Linux system will set hdmi properties when system boot
When some properties such as quant_range was set, dw_hdmi_setup()
will be called. HDMI status may not be config correctly. So if HDMI
is not properly initialized, don't call dw_hdmi_setup() when
these properties was set.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I6956e50161a4a5bd579f7174c73977d2e33da0c5
Saradc interrupt status may exist forever if read saradc
when system suspending which disable clock that finally
lead to interrupt system dead. Add mutex in suspend to
avoid this issue.
Change-Id: I6a83e4bd79db90a79985685b5e94df2209b5ae81
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Only one rk_vcodec ko.
Fixes: 5b15717952 ("video: rockchip: mpp: new video codec driver")
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I58408cbee1edf11d29b4917aca2eeaef563ed8ce
Get num-cs u32 from dts of_node property rather than u16.
Change-Id: I265c8c696f1ff884ce6e7690d9c886a2ed1bd267
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
After power up, the cs and clock is in default status, and the cs-high
and clock polarity dts property configuration will take no effect until
the calling of rockchip_spi_config in the first transmission.
So preset them to make sure a correct voltage before the the first
transmission comming.
Change-Id: Ib00336a3ebda6e04bdb33c56c7da419bfb6efdd9
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
RK3568 and RK3588 has the same issue as RV1126/RV1109 that caused by
dte fetch time limit, So we can set BIT(31) of register 0x24 default
to 1 as a workaround.
Change-Id: Ib0d1fd110aa0349145a63f7c4be5ce77ed6ab4e4
Fixes: 7f8158fb41 ("iommu: rockchip: disable fetch dte time limit")
Signed-off-by: Simon Xue <xxm@rock-chips.com>
First we thought the half_block_en bit in AFBCD_CTRL register
only work in afbc mode. But the fact is it control the line buffer
in all mode(afbc/tile/line), so we need configure it in the
all case.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ib8cd5fbfd0a898eea738423685fbcdc0ab6d00ad
Definition VOP_FEATURE_OUTPUT_RGB10 and VOP_FEATURE_INTERNAL_RGB
are from upstream, so we move our private definition VOP_FEATURE_AFBDC
and VOP_FEATURE_ALPHA_SCALE to other bits.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I44a4f4864bd7d82af120dfe361b9af700d7d8ae9
add and remove some property to compatibility with hwc 2.0
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I8239ce40e30da6e2be55e0ccfa6748816c0fcf2a
As some property can be used by both of rockchip_drm_vop2.c and rockchip_drm_vop.c,
so we delete some property create at vop2.c and instead by rockchip drm driver
common property.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: If4f327db79a455da75c7d4af04d2fe3aab19a6f0
Just put runtime suspend synchronously for otg mode at dwc3 probe time.
We found that the USB3.0 HUB which integrated in rk3399-evb-ind board
could not be enumerated at the system boot time, and the reason is
the USB controller has been suspended when the HUB gets ready.
Fixes: d8b7417bea ("usb: dwc3: core: allow pm runtime for rockchip platform")
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: I19600f327d97cb992994d280645a00069dc9e8d2
Spinand may power off after suspending, so the corresponding resume
process is necessary.
Change-Id: I36c7dbf23877b342dfe9e7fb0c8eb4885bd46d71
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
