Commit Graph

615144 Commits

Author SHA1 Message Date
Wyon Bi
b5aaea950e ARM: dts: rockchip: Update and clean up display nodes for rk3126/rk3128/px3se boards
Change-Id: Ia9f5cf9db93e14e5539b2f0c91470c62b52a2b3d
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-04 20:42:53 +08:00
Wyon Bi
a11d7cbb6d drm/rockchip: lvds: clean up rk3126 phy code
Change-Id: Ie4b39acb18b2a99f4fa37eb283ad2dbe34cfa99f
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-04 20:42:53 +08:00
Wyon Bi
c0a4f82de1 ARM: rockchip_defconfig: enable CONFIG_ROCKCHIP_RGB
Change-Id: I0d6219c57bee9dd30eca228c4882c820117b428f
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-04 20:42:53 +08:00
Wyon Bi
9a3c18fbb8 ARM: rockchip_defconfig: enable CONFIG_PHY_ROCKCHIP_INNO_VIDEO_COMBO_PHY
Change-Id: I06321bb4d6ea229bd8dae3f8314bd299c630e281
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-04 20:42:53 +08:00
Wyon Bi
0d4b66f493 drm/rockchip: rgb: Add support for rk3128
Change-Id: I567b3f559ea94842445c1ca703dc8a70f37a150c
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-04 20:42:53 +08:00
Wyon Bi
445e6f3f2c dt-bindings: display: rockchip: rgb: add rk3128 compatible string
Change-Id: I600ff82678d8de1158071936704a8cff783730c7
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-04 20:42:53 +08:00
Wyon Bi
3dbac6ed7e arm64: dts: rockchip: px30-evb-ext-rk618: Update display nodes
Change-Id: I67abbc5206d2bd06beb3eb93223ce0f67ccdb20a
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 23:31:44 +08:00
Wyon Bi
9a17c25478 arm64: dts: rockchip: px30-z7-a0-rk618-dsi: Update display nodes
Change-Id: I525b47446abe480c14175f6ea43226d298f71648
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 20:41:56 +08:00
Wyon Bi
68d1bdc962 arm64: dts: rockchip: px30-ad-r35-mb: Move common nodes into dtsi
Change-Id: I4b8332cdc51f9dc0033da1c2318defd968c2578c
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 20:38:45 +08:00
Wyon Bi
8ff4ca1aa0 arm64: dts: rockchip: Add support for rk3326 W7 board
Change-Id: I7b6ceadebc1be803e2ea2e8c6d39be79071adf73
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 20:25:18 +08:00
Wyon Bi
c57f0bbc87 drm/rockchip/rk618: rgb: Add dithering support for RGB666 LCD panels
Change-Id: I359cb841b14ba56d68d42e5bf2f40dae05ff9f62
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 19:11:42 +08:00
Wyon Bi
7b2a7b73e4 drm/bridge: Add support for Chipone ICN6211
ICN6211 is a bridge chip which receives MIPI-DSI inputs and
sends RGB outputs.

MIPI-DSI supports up to 4 lanes and each lane operates at
1Gbps maximum; the totally maximum input bandwidth is 4Gbps;
and the MIPI defined ULPS(ultra-low-power state) is also supported.
ICN6211 decodes MIPI-DSI 16bpp RGB565 and 18bpp RGB666 and
24bpp RGB888 packets.

The RGB output 18 or 24 bits pixel with pixel clock range of
2MHz to 154MHz.

ICN6211 support video resolution up to FHD (1920x1080) and
WUXGA(1920x1200).

Change-Id: I85cc0dbc8e628b9b1a09371df1d92975202c5c10
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 19:11:42 +08:00
Wyon Bi
4d076eca04 dt-bindings: display: bridge: Document Chipone ICN6211 MIPI-DSI to RGB bridge bindings
Change-Id: I2e4cac28a704416858ae8ef3e4b57d48aec84d65
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 19:11:42 +08:00
Cai YiWei
b25f7aefe0 media: i2c: tc35874x: support interlace output
Change-Id: I62025a9fcea726791aeed8a5e993e74f2e748d1c
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2019-01-03 19:04:50 +08:00
Cai YiWei
70f89eed1a media: rockchip: isp1: selfpath support interlace input
Change-Id: I4a69abac4cc2627e6899e4f49123e8f875524487
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2019-01-03 19:04:50 +08:00
Cai YiWei
c955146087 media: rockchip: isp1: isp v12/v13 add raw stream
stream raw support sensor bayer raw to
mipi to dmatx to ddr.

Change-Id: Ide24b6e9b2e5d95a6627cf046979ad62eeb9dea9
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2019-01-03 19:04:50 +08:00
Algea Cao
725bdaa024 drm: bridge: dw-hdmi: Check whether hdmi is initialized when hdmi suspend or resume
Hdmi suspend or resume may be called before hdmi initialization. We must
verify that hdmi is initialized first.

Change-Id: I2a680209e64b9c1aebc2d9ee19d543927137afd0
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2019-01-03 18:06:52 +08:00
Wyon Bi
90988f0da1 dt-bindings: phy: phy-rockchip-inno-mipi-dphy: Remove support for rk3366
Change-Id: I149c86dd06bfbacdad7c168ffac7707e3ca78e75
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 17:32:50 +08:00
Wyon Bi
f4ec2e722a phy/rockchip: mipi-dphy: Remove support for rk3366
Change-Id: Ic7674fa599282672fa56234a24c7087ffa3585e0
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 17:32:29 +08:00
Wyon Bi
b3eb6dcb73 dt-bindings: display: rockchip: lvds: Remove support for rk3366
Change-Id: I72c4d335315315d666806eea4eab70d9d7d5a183
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 17:32:23 +08:00
Wyon Bi
e2413679c9 drm/rockchip: lvds: Remove support for rk3366
Change-Id: I7e118d86eb219740b2a817501c322cd39ae5bf03
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 17:32:18 +08:00
Wyon Bi
15a2dc7adf arm64: dts: rockchip: rk3368-sziauto-rk618: Update and clean up display nodes
Change-Id: I7eb05bf38d7020b79a510df0cb7fdf59f917f9fd
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 17:25:49 +08:00
Wyon Bi
16105c43b2 arm64: dts: rockchip: rk3368-r88: Update display nodes
Change-Id: I7e0ee1f516de330002229fb95a84ba8192f9f04a
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 17:22:53 +08:00
Wyon Bi
d40a05c1a8 arm64: dts: rockchip: rk3368-android: enable video phy node
Change-Id: I33f85b81c3290cd2d735d91c10120804ec6c59b4
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 17:22:53 +08:00
Wyon Bi
b40321ad74 arm64: dts: rockchip: rk3368: Add support for video phy
Change-Id: I89d4d9d01ee896bd5ad2f142c266f1da3e99ba20
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 17:22:53 +08:00
Wyon Bi
d7450831a2 arm64: dts: rockchip: Update and clean up display nodes for rk3368 boards
Change-Id: Ibe4e76bfe5d96517810bb28154076c453528777b
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 17:22:53 +08:00
Wyon Bi
2ece7c824f dt-bindings: phy: phy-rockchip-inno-mipi-dphy: Remove support for rk3368
Change-Id: I72b4017625c41b15b15d34123f2acdd60a1d7650
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 17:22:53 +08:00
Wyon Bi
f9fcd7f37a phy/rockchip: mipi-dphy: Remove support for rk3368
Change-Id: If624a4b4ea6ac6d5d3264eafced54251a1bdc124
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 17:22:53 +08:00
Wyon Bi
3ff2d490f2 drm/rockchip: lvds: clean up rk3368 phy code
Change-Id: Icfcbd554146c0104bf0c156cbdec4d29ef007106
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 17:22:53 +08:00
Finley Xiao
6c0edd8c06 arm64: dts: rockchip: rk3308: Fix rockchip,pvtm-temp-prop
Change-Id: Iadb4b2b27a46dd869efc7d8add9098ebb4716def
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2019-01-03 16:44:42 +08:00
Wyon Bi
bf96f69970 drm/rockchip: rgb: Add support for rk3368
Change-Id: I1987b4df5128006f0a0162eedc1a98d7002c00cf
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 10:36:05 +08:00
Wyon Bi
0ffced2e17 dt-bindings: display: rockchip: rgb: add rk3368 compatible string
Change-Id: I105319043f8d67943aa0d8ac70cadc5441065e2f
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 10:35:54 +08:00
Wyon Bi
496b550894 phy/rockchip: inno-video-combo-phy: Only reverse sample clock direction in lvds mode
Change-Id: Ieff673dcf8d0459127d9ebe0f4c65818590b28ea
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2019-01-03 08:40:18 +08:00
Sean Young
06311511c2 UPSTREAM: kfifo: DECLARE_KIFO_PTR(fifo, u64) does not work on arm 32 bit
If you try to store u64 in a kfifo (or a struct with u64 members),
then the buf member of __STRUCT_KFIFO_PTR will cause 4 bytes
padding due to alignment (note that struct __kfifo is 20 bytes
on 32 bit).

That in turn causes the __is_kfifo_ptr() to fail, which is caught
by kfifo_alloc(), which now returns EINVAL.

So, ensure that __is_kfifo_ptr() compares to the right structure.

Change-Id: I7b5c8415a6bb8f54bbc8ec50fa98e1803cda3ce8
Signed-off-by: Sean Young <sean@mess.org>
Acked-by: Stefani Seibold <stefani@seibold.net>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
(cherry picked from commit 8a866fee39)
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
2019-01-02 19:16:19 +08:00
Randy Li
7feaeeb9ff iommu/rockchip: assign driver iommu ops to domain
It would help the other driver to install the DMA ops for
itself.

Change-Id: I4c7283bbd8889650684630e169696133fdc6801a
Signed-off-by: Randy Li <randy.li@rock-chips.com>
2019-01-02 18:53:02 +08:00
Liang Chen
fad451203d MALI: bifrost_for_linux: optimize opp-table for rockchip SoCs
Change-Id: I33e029a58880c3a54f36e9c5d7d94ce2394404b7
Signed-off-by: Liang Chen <cl@rock-chips.com>
2019-01-02 18:52:27 +08:00
Sandy Huang
be55b3581e arm64: rk1808_x4_linux_defconfig: enable vir camera and display
Change-Id: I6a9dd5e77bc873a021edf3146de55d1d2f80749b
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2019-01-02 17:28:08 +08:00
Sandy Huang
dd19dcb61a drm/rockchip: csi tx: add host reset and path mode config
1. get csi tx path mode from dts config.
2. for some unknown reason, we must reset csi tx host before enable,
   otherwise will appear the following error:

   [drm:rockchip_mipi_csi_irq_handler] *ERROR* Header fifo overflow raw
   [drm:rockchip_mipi_csi_irq_handler] *ERROR* Payload fifo overflow raw

Change-Id: I4dd49fc0ddecfcef4d88f24b7a22bef5c349b146
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2019-01-02 17:28:07 +08:00
Sandy Huang
00000ab556 arm64: dts: rockchip: add board dt file for rk1808 x4 evb second
the first rk1808 at x4 evb board use rk1808-evb-second.dts, the other
three rk1808 use rk1808-evb-second.dts

Change-Id: Ia766787eabf9d276204414137821aff3782e63fc
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2019-01-02 17:28:07 +08:00
Sandy Huang
41885786f6 arm64: dts: rockchip: rk1808-evb-x4: enable display module
Change-Id: Id30b1c72d664b9ea0c0d32c5f8a8fae67ba29d28
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2019-01-02 17:27:55 +08:00
Sandy Huang
86f1eb7210 drm/rockchip: vop: update default pdaf work mode
rk1808 cascade must set default pdaf work mode, after all
the chip csi rx and tx enale, the userspace will change to
normal mode.

Change-Id: I0ce18dc944bd55dbdb0812737affb11104e2f7a8
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2019-01-02 17:19:43 +08:00
Sandy Huang
4cd2da42a7 drm: set wait_for_completion_timeout for commit clean up
no need to wait 10000ms for time out. because even the 24fps
panel, the vsync time is 41ms.

Change-Id: I161836eca3f93d954028e06e4175db6c6d7ec734
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2019-01-02 17:19:27 +08:00
Huibin Hong
a997ba744c serial: 8250: add /dev/ttySx when uart is enable
before the patch:
ls /dev/ttyS
ttyS0 ttyS1 ttyS2 ttyS3 ttyS4 ttyS5  ttyS6 ttyS7

after the patch:
ls /dev/ttyS
ttyS3  ttyS4  ttyS6

Change-Id: I844523408751cb579bbfb50fafb7923d5c2cafdf
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-01-02 15:33:21 +08:00
Tao Huang
782ea01b34 arm64: rockchip_linux_defconfig: update by savedefconfig
Change-Id: I8c6e2b1c9f026b740188cab25dbd1557a085d3a4
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2019-01-02 15:30:54 +08:00
Tao Huang
024d62f90f arm64: rockchip_linux_defconfig: enable ROCKCHIP_PVTM
Change-Id: I9075eb058bb5c2393758c94271879d85f3287cef
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2019-01-02 15:30:40 +08:00
Finley Xiao
e68f7ba094 arm64: dts: rockchip: Enable pvtm for rk3399 linux
Change-Id: Ic669992b98b12ec490fd0cfacb7264fb483a12d4
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2019-01-02 14:35:46 +08:00
Finley Xiao
4dbb13551a soc: rockchip: opp_select: Fix return value when pvtm list is null
Change-Id: I8b767ddbe0f6156ceff746ead3ed86e3e1d55be4
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2019-01-02 14:29:19 +08:00
Hu Kejun
26d92177fc media: rk-isp10: add timestamp to vb buffer
Change-Id: I4549465811737caf00332fb2ca32c4d36f072728
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
2019-01-02 12:03:06 +08:00
Hu Kejun
de08c9ce95 media: rockchip: isp1: support query version by module parameter
Change-Id: Iadae8543cb2c6f617c47ec04ed59c3d252f65377
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
2019-01-02 12:02:45 +08:00
Hu Kejun
2555c66ab1 media: rk-isp10: fix cproc en bit is affected by cifisp_cproc_config
Change-Id: I4714ac726f58fde1459da8c29196aeb4175abe34
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
2019-01-02 12:02:45 +08:00