imx378 need to change the data lanes from <1 2> to <1 2 3 4>
Signed-off-by: Zhenke Fan <fanzy.fan@rock-chips.com>
Change-Id: Ifeb88250c7e01a4da84b67a0e77adcf0124201a9
Fixes: d7ad116fb3 ("drm/rockchip: analogix_dp: Add support for rk3568")
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I42c4099e266ca8c97380c7c7021a967d7418dc88
It is better to select M0 and M1 iomux by gmac_rxd0, the
gmac_rxd0 would be used at RGMII and RMII.
Change-Id: I850dafcc8a9a826c25b9af7da3cf5b97208ea67f
Signed-off-by: David Wu <david.wu@rock-chips.com>
Because there are two gmac controllers at rk3568, use
bus id to set the corresponding registers respectively.
Change-Id: Ie422e91075093bdcd2ed5ca11a7e3995aa75021a
Signed-off-by: David Wu <david.wu@rock-chips.com>
This patch fixes the following issues for rk3568 usb2 phy.
1. Only enable the id irq and bvalid irq for the port of combphy
which used shared interrupt and work as otg/peripheral mode.
2. Enable the DP/DM pulldown resistors for the port of combphy
if the port is used for usb host controller.
3. Set utmi opmode to no-driving for rk3568 usb phy when usb
phy enter suspend mode via usb phy grf. It can help to
avoid triggering the linestate irq constantly.
Change-Id: I3efe964c79865bef8ba70047f2ee20c59901ca6c
Signed-off-by: William Wu <william.wu@rock-chips.com>
When a host system has kernel headers that are newer than a compiling
kernel, mksyscalltbl fails with errors such as:
<stdin>: In function 'main':
<stdin>:271:44: error: '__NR_kexec_file_load' undeclared (first use in this function)
<stdin>:271:44: note: each undeclared identifier is reported only once for each function it appears in
<stdin>:272:46: error: '__NR_pidfd_send_signal' undeclared (first use in this function)
<stdin>:273:43: error: '__NR_io_uring_setup' undeclared (first use in this function)
<stdin>:274:43: error: '__NR_io_uring_enter' undeclared (first use in this function)
<stdin>:275:46: error: '__NR_io_uring_register' undeclared (first use in this function)
tools/perf/arch/arm64/entry/syscalls//mksyscalltbl: line 48: /tmp/create-table-xvUQdD: Permission denied
mksyscalltbl is compiled with default host includes, but run with
compiling kernel tree includes, causing some syscall numbers to being
undeclared.
Committer testing:
Before this patch, in my cross build environment, no build problems, but
these new syscalls were not in the syscalls.c generated from the
unistd.h file, which is a bug, this patch fixes it:
perfbuilder@6e20056ed532:/git/perf$ tail /tmp/build/perf/arch/arm64/include/generated/asm/syscalls.c
[292] = "io_pgetevents",
[293] = "rseq",
[294] = "kexec_file_load",
[424] = "pidfd_send_signal",
[425] = "io_uring_setup",
[426] = "io_uring_enter",
[427] = "io_uring_register",
[428] = "syscalls",
};
perfbuilder@6e20056ed532:/git/perf$ strings /tmp/build/perf/perf | egrep '^(io_uring_|pidfd_|kexec_file)'
kexec_file_load
pidfd_send_signal
io_uring_setup
io_uring_enter
io_uring_register
perfbuilder@6e20056ed532:/git/perf$
$
Well, there is that last "syscalls" thing, but that looks like some
other bug.
Signed-off-by: Vitaly Chikunov <vt@altlinux.org>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Tested-by: Michael Petlan <mpetlan@redhat.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Hendrik Brueckner <brueckner@linux.ibm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kim Phillips <kim.phillips@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com>
Link: http://lkml.kernel.org/r/20190521030203.1447-1-vt@altlinux.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
(cherry picked from commit f95d050cdc)
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: Ie5381538e0bdf1dbb1bdff04b931487f6585328b
Enabled by config CONFIG_ROCKCHIP_DRM_DEBUG=y
Debugfs node:
sys/kernel/debug/dri/0/video_port0/vop_dump/dump
sys/kernel/debug/dri/0/video_port1/vop_dump/dump
sys/kernel/debug/dri/0/video_port2/vop_dump/dump
Change-Id: I14b466b01c136e67e8ab5ccd18270134f43938ca
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
It comes from the result for SD3.0 test that level 5 is
suitable for this platform.
Change-Id: I95da7be6f514367799ea5e8e7c4b338fd1b1435e
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
This patch allows user to set I2Sx_MCLKOUT rate
by CLK_SET_RATE_PARENT.
Change-Id: I2248d67e24159886b266d6f024026f402a50747b
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Add a compatible string for the eDP controller found in the RK3568 SoC.
Change-Id: I4ece0815efd7d603ee0c5f5adac8d3bf5b91130e
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
This patch adds support for Analogix eDP TX IP used on RK3568 SoC.
Change-Id: Ieb89906cba5bc569ed8c476fecd00f6035a7f582
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
The Linux rootfs allow to be readable and writable by default.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: Ibc8de371c2b27a5062311e079bfe3389c5ffd6c8
Enable the eDP PHY driver used on Rockchip RK3568 SoC.
Change-Id: I7cf7509e66e660facf98f906e238e311e9cc4f54
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Add DT binding documentation for Naneng eDP Transmitter PHY IP used
in Rockchip's RK3568 SoC.
Change-Id: Id45165ccaef7d82f590e8d6ff26c6b6a0784314f
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
DPTPHYT22ULP is designed for chips that perform eDP/DP data
communication while operating at low power consumption.
The main link is a multi-gigabit transmitter macro which
enable speed up to 4.0Gbps data transmitter with optimized
power and die size, also it can be easily fabricated and
implemented in a video system. The AUX channel is a halfduplex,
bidirectional channel consisting of one differential pair,
supporting the bit rate of about 1Mbps.
Macro consists of multi-main link transmitter channels,
AUX channel, one PLL and bias-gen unit. The main link
transmitter performs dedicated P2S, clock generator,
driver with preemphasis and self-test. Each of the channels
can be turned off individually.
Change-Id: Idf58991ff1bdd4557c4cfadf2dc047e95eca7668
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Allow DisplayPort PHYs to be configured through the generic
functions through a custom structure added to the generic union.
The configuration structure is used for reconfiguration of
DisplayPort PHYs during link training operation.
The parameters added here are the ones defined in the DisplayPort
spec v1.4 which include link rate, number of lanes, voltage swing
and pre-emphasis.
Add the DisplayPort phy mode to the generic phy_mode enum.
Change-Id: Id68cbd69c0938bd64402b8af7b6b37b168472848
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Reviewed-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(cherry picked from commit 42d068472d)
Now that we have some infrastructure for it, allow the MIPI D-PHY phy's to
be configured through the generic functions through a custom structure
added to the generic union.
The parameters added here are the ones defined in the MIPI D-PHY spec, plus
the number of lanes in use. The current set of parameters should cover all
the potential users.
Change-Id: Ie5a12064ba59a1a2c8628bd34c4c2b4996559ec3
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(cherry picked from commit 2ed869990e)
