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Author SHA1 Message Date
zwl
ca8cb61eff rk616: update rk616 driver,add dts property 2014-02-08 17:41:09 +08:00
黄涛
f69a429a94 ARM: rockchip: update rockchip_defconfig to support mtd and rknand 2014-02-08 16:39:23 +08:00
Zhaoyifeng
c7bcbec350 rknand:remove debug log. 2014-02-08 16:13:02 +08:00
陈亮
8994824a90 rockchip_defconfig : set default cpufreq governor to interactive 2014-02-07 22:17:36 -08:00
陈亮
24ea5cf410 rk3188 : add dvfs && cpufreq 2014-02-07 19:33:27 -08:00
Zhaoyifeng
9a35477e37 add rknand for debug 2014-02-08 10:23:40 +08:00
dkl
bd1ad1b0a6 ARM: rockchip: correct L2 latency setting 2014-02-07 20:19:16 +08:00
luowei
026195c1e3 close pinctrl debug log 2014-02-07 13:42:17 +08:00
dkl
3bfb2e97f2 clk: rockchip: fix clk reg address description in dts 
1.Descripe cru address mapping in clocks node's "ranges" property, and
change children nodes' "reg" property accordingly.
2.Get cru base from clock_regs node's "reg" property.
 2014-02-07 11:30:51 +08:00
dkl
4af160253c Recommit "clk: rockchip: add clk init data and enable clk init" 
This recommit commit 4673090895 with
fix that lower clk_core init rate to 594 MHZ.
 2014-02-07 09:50:53 +08:00
yxj
c8c1d278af rk fb:rename layer to win, add iomux for rk3188 lcdc 2014-01-26 16:42:58 +08:00
陈金泉
7a74e7eab9 update audio platform driver, add spdif codec dts property 2014-01-26 16:28:43 +08:00
黄涛
2971908618 ARM: rockchip: set rk3188 machine name RK30board to keep android happy 2014-01-26 15:58:50 +08:00
张晴
5d87f43f8a rk:pmu:rk808&act8846:support dts for linux 3.1 2014-01-26 09:58:37 +08:00
dkl
be994cdbfb Revert "clk: rockchip: add clk init data and enable clk init" 
This reverts commit 4673090895.
 2014-01-26 09:34:30 +08:00
dkl
4673090895 clk: rockchip: add clk init data and enable clk init 
Mainly add rk3188 clk_core\cpu_clks\peri_clks init data and apply
it.
 2014-01-23 17:51:14 +08:00
黄涛
247134ec9e ARM: rockchip: update rockchip_defconfig to support devtmpfs 2014-01-22 16:39:19 +08:00
黄涛
f537d4dada ARM: rockchip: add rk3288 fpga support 2014-01-22 16:13:20 +08:00
黄涛
5fad3b4ac2 ARM: rockchip: rk3188 add RK3188_UART_SIZE 2014-01-22 16:03:27 +08:00
黄涛
a89fbe854f ARM: rockchip: rk3188-tb remove wrong serial-id 2014-01-22 16:01:17 +08:00
黄涛
f41e6812d3 clocksource: rockchip_timer: support count up and consistency with arch timer 2014-01-22 15:57:49 +08:00
许盛飞
ad362bec5b PWM: add CONFIG_PWM_ROCKCHIP configuration 2014-01-22 09:24:06 +08:00
许盛飞
87a777982c pwm: CONFIG_PWM_ROCKCHIPS rename CONFIG_PWM_ROCKCHIP 2014-01-21 20:03:22 +08:00
许盛飞
b9732c840e pwm-bl: rename of pwm-rockhip.c and change the backlight-driver configuration 2014-01-21 19:51:19 +08:00
许盛飞
3d60fec285 pwm-bl: change some warning 2014-01-21 18:47:26 +08:00
陈金泉
02006e10ce Change path of audio platform device from rk to rockchip 2014-01-21 18:16:11 +08:00
许盛飞
74ee2d20de pwm-bl: add pwm backlight driver for rockchip 2014-01-21 17:53:11 +08:00
陈金泉
53d00cb8c3 update codec driver 2014-01-21 17:24:35 +08:00
dkl
46b5245015 clk: rockchip: add clk_core ops support 2014-01-21 17:06:22 +08:00
dkl
a713b86ca3 clk: rockchip: add apll set_rate support 2014-01-21 17:06:22 +08:00
黄涛
c278ce337a ARM: rockchip: rk_fiq_debugger use 32-bit read/write, workaround for rk3288 2014-01-21 14:26:09 +08:00
Jonathan Austin
a5151dfaa8 ARM: add support for the Cortex-A12 processor 
The A12 behaves as the A7/A15 does with respect to setting the SMP bit, and
doesn't require TLB ops broadcasting to be explicitly enabled like the A9 does.

Note that as the ACTLR cannot (usually) be written from non-secure, it is the
responsibility of the bootloader/firmware to set this bit per core - it is
done here in Linux as last resort in case of bad firmware.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
 2014-01-20 19:42:53 +08:00
dkl
5bb16a57ac clock: rockchip: ignore unused clocks temporarily. 
Include "clk_ignore_unused" in the bootargs to the kernel.
 2014-01-20 19:36:52 +08:00
dkl
c09b58f93c Revert "rk_clk: not disable unused clocks temporarily" 
This reverts commit 97c8dc7c30.
 2014-01-20 19:31:05 +08:00
黄涛
e88c7b949d ARM: rockchip: rk3188 use timer-based delay 2014-01-20 18:49:30 +08:00
黄涛
3e5a837e29 clocksource: rockchip_timer: support timer-based delay 2014-01-20 18:49:12 +08:00
dkl
97c8dc7c30 rk_clk: not disable unused clocks temporarily 2014-01-20 17:40:16 +08:00
yxj
0a615bbd79 rk fb:base version for linux3.10 2014-01-20 14:16:25 +08:00
dkl
c37288b6f4 rk_clk: modify clk-ops.c to reuse and fit the common clk framework. 
After the .determine_rate operation was introduced, many ops and
clocks can be implemented more easily by the common clock framework,
and many unnessary old codes can be removed as a result.
 2014-01-17 17:52:17 +08:00
Mike Turquette
342b0a63bd clk: composite: pass mux_hw into determine_rate 
The composite clock's .determine_rate implementation can call the
underyling .determine_rate callback corresponding to rate_hw or the
underlying .determine_rate callback corresponding to mux_hw. In both
cases we pass in rate_hw, which is wrong. Fixed by passing mux_hw into
the correct callback.

Reported-by: Lemon Dai <dailemon.gl@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
 2014-01-17 14:26:45 +08:00
Emilio López
e8b3fb940b clk: composite: .determine_rate support 
This commit adds .determine_rate support to the composite clock. It will
use the .determine_rate callback from the rate component if available,
and fall back on the mux component otherwise. This allows composite
clocks to enjoy the benefits of automatic clock reparenting.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
 2014-01-17 14:25:20 +08:00
黄涛
0c092fe690 ARM: rockchip: add cortex-a9 cpuidle support 2014-01-16 12:15:17 +08:00
黄涛
75180cac61 ARM: rockchip: rk3188 add restart support 2014-01-15 16:40:50 +08:00
黄涛
39c51fba66 ARM: rockchip: rk3188 add uart2 static iomap 2014-01-13 11:14:11 +08:00
黄涛
4ba553fd1a ARM: rockchip: rk3188 add DDR init 2014-01-13 10:59:13 +08:00
黄涛
bd8164da47 ARM: rockchip: rk3188 add pie init 2014-01-13 10:51:01 +08:00
黄涛
0d3914fff0 rk: fix PIE support multi cpu 2014-01-13 10:43:41 +08:00
dkl
a574676e96 rk_clk: add common pll and gpll set_rate support 2014-01-09 15:59:18 +08:00
dkl
828ecbcca8 rk_clk: add clk-pll.c support 
support pll recalc_rate/round_rate except apll
 2014-01-08 20:22:28 +08:00
James Hogan
0cf097587e clk: add CLK_SET_RATE_NO_REPARENT flag 
Add a CLK_SET_RATE_NO_REPARENT clock flag, which will prevent muxes
being reparented during clk_set_rate.

To avoid breaking existing platforms, all callers of clk_register_mux()
are adjusted to pass the new flag. Platform maintainers are encouraged
to remove the flag if they wish to allow mux reparenting on set_rate.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Chao Xie <xiechao.mail@gmail.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: "Emilio López" <emilio@elopez.com.ar>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Andrew Chew <achew@nvidia.com>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Thomas Abraham <thomas.abraham@linaro.org>
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: spear-devel@list.st.com
Cc: linux-tegra@vger.kernel.org
Tested-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com> [tegra]
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> [sunxi]
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> [Zynq]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
 2014-01-08 11:14:00 +08:00