According to the dwc2 programmer's guide v3.10a, in '2.1.3.2 Dedicated
FIFO Mode with No Thresholding', it suggested that:
Device RxFIFO =
- Scatter/Gather DMA mode:
(4 * number of control endpoints + 6) + ((largest USB packet used / 4) +
1 for status information) + (2 * number of OUT endpoints) + 1 for Global NAK
on rockchip platforms:
(4 * 1 + 6) + ((1024 / 4) + 1) + (2 * 6) + 1 = 280
- Slave or Buffer DMA mode:
(5 * number of control endpoints + 8) + ((largest USB packet used / 4) +
1 for status information) + (2 * number of OUT endpoints) + 1 for Global NAK
on rockchip platforms:
(5 * 1 + 8) + ((1024 / 4) + 1) + (2 * 6) + 1 = 283
Device IN Endpoint TxFIFO =
The TxFIFO must equal at least one MaxPacketSize (MPS).
In addition to RxFIFO and TxFIFOs, refer to dwc2 databook v3.10a,
'Figure 2-13 Device Mode FIFO Address Mapping and AHB FIFO Access Mapping
(Dedicated FIFO)', it required that when the device is operating in non
Scatter Gather Internal DMA mode, the last locations of the SPRAM are used
to store the DMAADDR values for each Endpoint (1 location per endpoint).
When the device is operating in Scatter Gather mode, then the last locations
of the SPRAM store the Base Descriptor address, Current Descriptor address,
Current Buffer address, and status quadlet information for each endpoint
direction (4 locations per Endpoint). If an Endpoint is bidirectional , then
4 locations will be used for IN, and another 4 for OUT).
Considering that the total FIFO size of dwc2 otg is 0x3cc (972),
and we must reserve (4 * 13) = 52 locations for all Endpoints.
So reconfig dwc2 device fifo size as follows:
Device RxFIFO = 280
Device IN Endpoint TxFIFO
- FIFO #0 = (64 / 4) = 16 (Assuming this is used for EP0)
- FIFO #1 = (1024/4) = 256 (Assuming this is used for Isochronous)
- FIFO #2 = (512/4) = 128
- FIFO #3 = (512/4) = 128
- FIFO #4 = (256/4) = 64
- FIFO #5 = (128/4) = 32
- FIFO #6 = (64/4) = 16
After reconfig the dwc2 device fifo size, test mtp write on rockchip
platform (PC -> rockchip platform) on rk312x/rk3326/px30/rk3288 evb,
when mask the 'vfs_write' in f_mtp.c, the writing data rate can be
increased from 16MBps ~ 20MBps to 30MBps ~ 36MBps on different kinds
of rockchip evbs.
Change-Id: I52c64a279523c811f706e69e427b0a6e8c45683b
Signed-off-by: William Wu <william.wu@rock-chips.com>
According to the dwc2 programmer's guide v3.10a, in '2.1.3.2 Dedicated
FIFO Mode with No Thresholding', it suggested that:
Device RxFIFO =
- Scatter/Gather DMA mode:
(4 * number of control endpoints + 6) + ((largest USB packet used / 4) +
1 for status information) + (2 * number of OUT endpoints) + 1 for Global NAK
on rockchip platforms:
(4 * 1 + 6) + ((1024 / 4) + 1) + (2 * 6) + 1 = 280
- Slave or Buffer DMA mode:
(5 * number of control endpoints + 8) + ((largest USB packet used / 4) +
1 for status information) + (2 * number of OUT endpoints) + 1 for Global NAK
on rockchip platforms:
(5 * 1 + 8) + ((1024 / 4) + 1) + (2 * 6) + 1 = 283
Device IN Endpoint TxFIFO =
The TxFIFO must equal at least one MaxPacketSize (MPS).
In addition to RxFIFO and TxFIFOs, refer to dwc2 databook v3.10a,
'Figure 2-13 Device Mode FIFO Address Mapping and AHB FIFO Access Mapping
(Dedicated FIFO)', it required that when the device is operating in non
Scatter Gather Internal DMA mode, the last locations of the SPRAM are used
to store the DMAADDR values for each Endpoint (1 location per endpoint).
When the device is operating in Scatter Gather mode, then the last locations
of the SPRAM store the Base Descriptor address, Current Descriptor address,
Current Buffer address, and status quadlet information for each endpoint
direction (4 locations per Endpoint). If an Endpoint is bidirectional , then
4 locations will be used for IN, and another 4 for OUT).
Considering that the total FIFO size of dwc2 otg is 0x3cc (972),
and we must reserve (4 * 13) = 52 locations for all Endpoints.
So reconfig dwc2 device fifo size as follows:
Device RxFIFO = 280
Device IN Endpoint TxFIFO
- FIFO #0 = (64 / 4) = 16 (Assuming this is used for EP0)
- FIFO #1 = (1024/4) = 256 (Assuming this is used for Isochronous)
- FIFO #2 = (512/4) = 128
- FIFO #3 = (512/4) = 128
- FIFO #4 = (256/4) = 64
- FIFO #5 = (128/4) = 32
- FIFO #6 = (64/4) = 16
After reconfig the dwc2 device fifo size, test mtp write on rockchip
platform (PC -> rockchip platform) on rk312x/rk3326/px30/rk3288 evb,
when mask the 'vfs_write' in f_mtp.c, the writing data rate can be
increased from 16MBps ~ 20MBps to 30MBps ~ 36MBps on different kinds
of rockchip evbs.
Change-Id: Icdf8a5dd95f96d174233e4ffc765c9a982b9f0b6
Signed-off-by: William Wu <william.wu@rock-chips.com>
If more than two consecutive requests queue into in ep, maybe some
requests need alloc temporary aligned buffer, only the first request
will do memory copy to the aligned buffer, but start_next_request()
function missing memory copy, then the transmission of data will be
wrong, so do memory copy after alloc aligned buffer right away.
TEST=rk3288 use rndis gadget function, Linux PC use this command
can't ping: ping IP -s 1473
Change-Id: I1c5339dbb089d8a94d8093baa2a801f54e450267
Signed-off-by: Feng Mingli <fml@rock-chips.com>
Add rockchip,low-power-suspend property to DT of u2phy to make
the port enter lower power state when suspend.
Change-Id: I88eef53b24c8859ebe2c2b3cb5ecbdc42b406d04
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Make u2phy enter low power mode when suspend. If config the DT of
u2phy port with "rockchip,low-power-mode" property, the port will
be config to lower power state when suspend.
Bvalid irq and linestate irq will be disabled in this mode.
Change-Id: Ie7d40a9a181b0622b1f8d062a741661548cabd59
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
From Rockchips fractional divider usage, some clocks can be generated
by fractional divider, but the input clock frequency of fractional
divider should be less than a specified value.
Change-Id: Ifd6c5f6a24a64021f990506e8657cd925f9b96f9
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
set the regulator named "vcc_wl" stay on in suspend.
Change-Id: I6d21b8904a6367938a386df8e905ede62f4069a8
Signed-off-by: JinSen Chen <kevin.chen@rock-chips.com>
Limit the max size of aligned buffer to 64K. Because
64K buffer is enough for most of usb transfers, and
the aligned buffer is a coherent DMA buffer allocated
by dma_alloc_coherent, too large buffer may cause
coherent DMA memory allocation failure on some platforms.
Change-Id: Ib4895349be93d7a298f5cd08c609f1a8a81d2610
Signed-off-by: William Wu <william.wu@rock-chips.com>
If dst buf not 4k align vir address, mmu page may calculate error.
This situation will cause rga hardware not respond, cannot return irq_handle.
Change-Id: I29a104984415b6736713073684c2551252c975b9
Signed-off-by: Putin Lee <putin.li@rock-chips.com>
case 1:
plug in hdmi and power on, after kernel complete and before android
start(maybe can update simplification boot.img) we plug out hdmi will
appear error log.
case 2:
plug in hdmi and power on, at the beginning of drm driver bind, plug out
hdmi, the hdmi irq maybe at disable state, so the vop is in running
state which is set at uboot. in this case vop will not to enable clk
refrerence, after driver probe complete, the unused clk maybe close by
clk driver framework. this will lead to vop appear error log:
[ 4.898107] rockchip-vop ff370000.vop: [drm:vop_crtc_enable] Update mode to 720*288
[ 4.900174] rockchip-vop ff370000.vop: [drm:vop_isr] *ERROR*BUS_ERROR irq err
solution:
1. disable vop all planes before disable crtc and enable crtc;
2. disable vop all planes when can't detect connect at power on.
3. enable dma stop before detach iommu and disable dma stop after attach
iommu.
Change-Id: Ia981d52c96a274fa177493d10362fd4e395a6707
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Detached may occurred at swap operations. Don't ignore
the EVENT_CC during swapping at all, check the connection
after it.
Change-Id: I2c69c8e2a026e3524ee390e25db3bdf84dad7bdb
Signed-off-by: zain wang <wzz@rock-chips.com>
Power role compatible can configure the typec power role,
and we can enable try.role function as well, that can
change the power role to our wanted if possible.
Change-Id: I85a3c4d0c5a54b37573f5fb24fe107d88f385021
Signed-off-by: zain wang <wzz@rock-chips.com>
Sometimes we may prefer our port would be specified power
role when the both attaching port are DRP port. We can
enable this function in dts file, such as:
fusb302,role = "ROLE_MODE_DRP";
fusb302,try_role = "ROLE_MODE_DFP";
It would change the port power role to your wanted
if possible.
Change-Id: Id71595fa10c5c55755ac6b2965c3f14f593c2493
Signed-off-by: zain wang <wzz@rock-chips.com>
This patch set a frame for DR_SWAP, and it only support UFP to DFP,
because there are many works to coordinate USB part and PD part when
change DFP to UFP.
Change-Id: Iebcccdcd9115c5be4704e6e8e0dc0b568a4ac48d
Signed-off-by: zain wang <wzz@rock-chips.com>
If you set your port to DFP(UFP), the port would only detect
UFP(DFP) device. If you want your port to detect both UFP and DFP,
set it to DRP in dts.
Change-Id: I1b8dc46bd3538094a01ee3376bf019113622fcca
Signed-off-by: zain wang <wzz@rock-chips.com>
Exclude rk3308-evb-ext-v10.dtsi from rk3308 evb boards, that it's only
used for IP functional verification.
Change-Id: Ic679da54e16134e6326b50fd7de4fbafab57ac8f
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
This patch supports fusb302 to do data role swap for
Type-C Dongle with PD adapter.
The test case is:
- Use a Type-C Dongle (PD adapter & USB & HDMI)
- Plug a PD adapter into Type-C Dongle first, then
connect the Dongle with RK3399 Type-C0 port.
- Check if Type-C Dongle can fetch 5V with the following log:
"fusb302 4-0022: PD connected as UFP, fetching 5V"
- Wait for the data role swap completion (hundreds of
milliseconds), then check if the Type-C USB can work
in DFP mode.
Without this patch, the DWC3 can't switch to DFP mode
after the data role swap completion. It's because that
when the fusb302 do data role swap, it only sends extcon
notifier with EXTCON_USB true or EXTCON_USB_HOST true.
Generally, the sequence of the extcon notifier sent from
fusb302 is:
- send "EXTCON_USB = true" and "EXTCON_USB_HOST=false"
to DWC3 driver, then DWC3 switch to UFP, and set the
connected flag to true.
- After swap completion, send "EXTCON_USB = false" and
"EXTCON_USB_HOST = true" to DWC3 driver. Because the
connected flag is true, the DWC3 is unable to switch
to DFP mode.
This patch forces DWC3 to do disconnection if it detects
the connected flag is true and the DWC3 mode is UFP.
Change-Id: I470187823708e6fb8bb8869bca3b475850a8c2e7
Signed-off-by: William Wu <william.wu@rock-chips.com>
Pickup the fix for handling unresolved phandles in overlays.
This adds the following commits from upstream:
c1e55a5513e9 checks: fix handling of unresolved phandles for dts plugins
f8872e29ce06 tests: Avoid 64-bit arithmetic in assembler
48c91c08bcfa libfdt: add stringlist functions to linker script
Change-Id: I81a0cc9a936f8d1da810460ea5df4472fa27dd5c
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit e45fe7f788)
This adds the following commits from upstream:
b1a60033c110 tests: Add a test for overlays syntactic sugar
737b2df39cc8 overlay: Add syntactic sugar version of overlays
497432fd2131 checks: Use proper format modifier for size_t
22a65c5331c2 dtc: Bump version to v1.4.5
c575d8059fff Add fdtoverlay to .gitignore
b6a6f9490d19 fdtoverlay: Sanity check blob size
8c1eb1526d2d pylibfdt: Use Python2 explicitly
ee3d26f6960b checks: add interrupts property check
c1e7738988f5 checks: add gpio binding properties check
b3bbac02d5e3 checks: add phandle with arg property checks
fe50bd1ecc1d fdtget: Split out cell list display into a new function
62d812308d11 README: Add a note about test_tree1.dts
5bed86aee9e8 pylibfdt: Add support for fdt_subnode_offset()
46f31b65b3b3 pylibfdt: Add support for fdt_node_offset_by_phandle()
a3ae43723687 pylibfdt: Add support for fdt_parent_offset()
a198af80344c pylibfdt: Add support for fdt_get_phandle()
b9eba92ea50f tests: Return a failure code when any tests fail
155faf6cc209 pylibfdt: Use local pylibfdt module
50e5cd07f325 pylibfdt: Add a test for use of uint32_t
ab78860f09f5 pylibfdt: Add stdint include to fix uint32_t
36f511fb1113 tests: Add stacked overlay tests on fdtoverlay
1bb00655d3e5 fdt: Allow stacked overlays phandle references
a33c2247ac8d Introduce fdt_setprop_placeholder() method
0016f8c2aa32 dtc: change default phandles to ePAPR style instead of both
e3b9a9588a35 tests: fdtoverlay unit test
42409146f2db fdtoverlay: A tool that applies overlays
aae22722fc8d manual: Document missing options
13ce6e1c2fc4 dtc: fix sprintf() format string error, again
d990b8013889 Makefile: Fix build on MSYS2 and Cygwin
51f56dedf8ea Clean up shared library compile/link options
21a2bc896e3d Suppress expected error message in fdtdump test
2a42b14d0d03 dtc: check.c fix compile error
a10cb3c818d3 Fix get_node_by_path string equality check
548aea2c436a fdtdump: Discourage use of fdtdump
c2258841a785 fdtdump: Fix over-zealous version check
9067ee4be0e6 Fix a few whitespace and style nits
e56f2b07be38 pylibfdt: Use setup.py to build the swig file
896f1c133265 pylibfdt: Use Makefile constructs to implement NO_PYTHON
90db6d9989ca pylibfdt: Allow setup.py to operate stand-alone
e20d9658cd8f Add Coverity Scan support
b04a2cf08862 pylibfdt: Fix code style in setup.py
1c5170d3a466 pylibfdt: Rename libfdt.swig to libfdt.i
580a9f6c2880 Add a libfdt function to write a property placeholder
ab15256d8d02 pylibfdt: Use the call function to simplify the Makefile
9f2e3a3a1f19 pylibfdt: Use the correct libfdt version in the module
e91c652af215 pylibfdt: Enable installation of Python module
8a892fd85d94 pylibfdt: Allow building to be disabled
741cdff85d3e .travis.yml: Add builds with and without Python library prerequisites
14c4171f4f9a pylibfdt: Use package_dir to set the package directory
89a5062ab231 pylibfdt: Use environment to pass C flags and files
4e0e0d049757 pylibfdt: Allow pkg-config to be supplied in the environment
6afd7d9688f5 Correct typo: s/pylibgfdt/pylibfdt/
Change-Id: I0591bb1fe4e76051deae3318011927b350271f6c
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 4201d057ea)