Use freq 0 Hz to represent the case which not used yet, and,
should assign the match freq as external mclk in if used.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I0a731367a81a740df36af7552c7b6a353f9bd2f0
Use freq 0 Hz to represent the case which not used yet, and,
should assign the match freq as external mclk in if used.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Id8d39117ba477285a562e7fa7bf7b28edd5e9212
adjust commit time from 1/8 to 7/8 scan timing when enable writeback;
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Iea0dd9e29b83399c1a0966e0c3ff68b861acd020
if not control csirx data clk, may cause vicap do cru reset fail
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I38bd186e8add2d3e7df1df527f3d02bf4e7d5d76
There is no need to start DAIs which have no channel mapping.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ia6be32d474845b9ecb443c38b6801e9836e8a77a
If set default phase to 1, 1080p RGB/YUV444 10BIT display blur
when switch from 4K YUV420 8BIT.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I8ccd1cef40f3e47ce481a176a41c569ab2932b83
This patch add support switch for clk-bidirection which located
at GRF, such as SAIx_MCLK_{IN OUT} which share the same pin.
and these config maybe located in many pieces of GRF,
which hard to addressed in one single clk driver. so, we add
this simple helper driver to address this situation.
In order to simplify implement and usage, and also for safety
clk usage (avoid high freq glitch), we set all clk out as disabled
(which means Input default for clk-bidrection) in the pre-stage,
such boot-loader or init by HW default. And then set a safety freq
before enable clk-out, such as "assign-clock-rates" or clk_set_rate
in drivers.
e.g.
1. mclk{out,in}_sai0 define:
mclkin_sai0: mclkin-sai0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <12288000>;
clock-output-names = "mclk_sai0_from_io";
};
mclkout_sai0: mclkout-sai0@ff040070 {
compatible = "rockchip,clk-out";
reg = <0 0xff040070 0 0x4>;
clocks = <&cru MCLK_SAI0_OUT2IO>;
#clock-cells = <0>;
clock-output-names = "mclk_sai0_to_io";
rockchip,bit-shift = <4>;
//example with PD if reg access needed
power-domains = <&power RK3562_PD_VO>;
};
Note:
clock-output-names of mclkin_sai0 should equal to strings in drivers. such as:
drivers/clk/rockchip/clk-rk3562.c:
PNAME(clk_sai0_p) = { "clk_sai0_src", "clk_sai0_frac", "xin_osc0_half", "mclk_sai0_from_io" };
2. mclkout_sai0 usage:
&ext_codec {
clocks = <&mclkout_sai0>;
clock-names = "mclk";
assigned-clocks = <&mclkout_sai0>;
assigned-clock-rates = <12288000>;
pinctrl-names = "default";
pinctrl-0 = <&i2s0m0_mclk>;
};
clk_summary on sai0 work:
cat /sys/kernel/debug/clk/clk_summary | egrep "pll|sai0"
clk_sai0_src 1 1 0 1188000000 0 0 50000
clk_sai0_frac 1 1 0 12288000 0 0 50000
clk_sai0 1 1 0 12288000 0 0 50000
mclk_sai0 1 1 0 12288000 0 0 50000
mclk_sai0_out2io 1 1 0 12288000 0 0 50000
mclk_sai0_to_io 1 1 0 12288000 0 0 50000
example with PD if reg access needed:
* PD status when mclk_sai0_to_io on:
cat /sys/kernel/debug/pm_genpd/pm_genpd_summary
domain status children
/device runtime status
----------------------------------------------------------------------
...
vo on
/devices/platform/clocks/ff040070.mclkout-sai0 active
...
* PD status when mclk_sai0_to_io off:
cat /sys/kernel/debug/pm_genpd/pm_genpd_summary
domain status children
/device runtime status
----------------------------------------------------------------------
...
vo off-0
/devices/platform/clocks/ff040070.mclkout-sai0 suspended
...
3. mclkin_sai0 usage:
please override freq of mclkin as the real external clkin, such as:
&mclkin_sai0 {
clock-frequency = <24576000>;
}
&ext_codec {
clocks = <&mclkin_sai0>;
clock-names = "mclk";
assigned-clocks = <&cru CLK_SAI0>;
assigned-clock-parents = <&mclkin_sai0>;
pinctrl-names = "default";
pinctrl-0 = <&i2s0m0_mclk>;
};
clk_summary on sai0 work:
cat /sys/kernel/debug/clk/clk_summary | egrep "pll|sai0"
mclk_sai0_from_io 1 1 0 12288000 0 0 50000
clk_sai0 1 1 0 12288000 0 0 50000
mclk_sai0 1 1 0 12288000 0 0 50000
mclk_sai0_out2io 0 0 0 12288000 0 0 50000
mclk_sai0_to_io 0 0 0 12288000 0 0 50000
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ibe8286bb98ea1fc3bc6421c30f6e46fc0b1b0d88
Should be explicit direction for mclkin, such as "mclk_sai0_from_io"
instead of "mclk_sai0_io".
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I6a4a3ecad527c610cc1577faca169588545f0765
Fix channel disorder caused by "ASoC: rockchip: pdm: Fix pop noise
in the beginning".
The PDM device need to delete some unused data since the pdm of
various manufacturers can not be stable quickly. This is done by
commit "ASoC: rockchip: pdm: Fix pop noise in the beginning".
But we do not know how many data we delete, this cause channel
disorder. For example, we record two channel 24-bit sound, then
delete some starting data. Because the deleted starting data is
uncertain, the next data may be left or right channel and cause
channel disorder.
Luckily, we can use the PDM_RX_CLR to fix this. Use the PDM_RX_CLR
to clear fifo written data and address, but can not clear the read
data and address. In initial state, the read data and address are
zero.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I248744c7982365adeb23aa516cf5bed346f4beaf
1.Assert phy-reset via PIPEPHY GRF instead of asserting via CRU that
would be useless when PD_PHP is off.
2.RK3562 change to use phy grf reset
Change-Id: Id30e8bf28c0bb8d30bab27ad069201978ec74785
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
sleep-mode-config-mem-lite = <...> is mode_config for mem_lite.
wakeup-config-mem-lite = <...> is wakeup_config for mem_lite.
sleep-mode-config-mem-ultra = <...> is mode_config for mem_ultra.
wakeup-config-mem-ultra = <...> is wakeup_config for mem_ultra.
Change-Id: If41ef73d8075c9e74b87a0ebf1634622e5625db3
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
1. remove execute_tuning api
2. remove RK_RXCLK_NO_INVERTER for RK3528 and RK3562
3. set strbin tap to 3 for RK3528 and RK3562
4. fixed tap value by software
5. Disable output clock while config DLL
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Icad745d09a0fad37ec58d2071ba780b9749d1c16
The original patch is attached in the mail of Zhigang.Yao@arm.com at 2023-02-08 09:00.
Commit message in the original patch:
{
From d1245d8578ba6ae4fb1b0f70417a97ea6afa920d Mon Sep 17 00:00:00 2001
From: Raffaele Aquilone <raffaele.aquilone@arm.com>
Date: Thu, 19 Jan 2023 15:26:12 +0000
Subject: [PATCH] GPUCORE-36657 Remove PageMovable() symbol
The PageMovable() function has been removed from the DDK because
it cannot be used in Android. The movable status of the page has
been duplicated into the status variable of the page metadata,
and it's kept up to date every time the movable property is set or
cleared, except in those cases where it's not necessary to keep
alive the information.
The unit test that attempts to migrate a firmware page has been
removed because now the driver has no way to detect that a page
without metadata is not movable; the driver has to trust that
the system doesn't try to isolate pages which are not movable.
...
}
Its base is not current g15.
I applied it manually on DDK g15.
Change-Id: I7e8a29f3ce79d991bc8b3a746690e9ef279e572a
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
It's helpful for user to observe the DAI path by kmsg.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I4e4e0c784a70d19b2b3c05d7fa424022e79a94ba
It's helpful for user to observe the DAI path by kmsg.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Iebf69a9ecbca5fe6a98ca1512ea549c67f18cdff
It's helpful for user to observe the DAI path by kmsg.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I60baaf787551362994c2bcb58a1c2d7c21bd23d4
Set jack for the first successful one to fix the disorder
codec assignment.
And of course, we suggest user to place the one which use
the jack in the first place in Device Tree.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I8dc5d95ba73c053a599d95c0448042fd04765c05
Should use dai->component instead of the fixed rtd->codec[0],
because codec may be addressed in multi-codecs situation,
Obviously, it's wrong. the dais' one is always RIGHT.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I97cd09aa0886e2b89f2c2f257defb228168e93b0
