There are i2s and spdif interfaces for audio, default is i2s
When switching audio interfaces, both interfaces's mclk must be enabled
And can switch off after switching
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: I9007a2115c3c3fcdc5e68112aabcfab5fce5a5a8
All device have similar function for device shutdown, thus,
extract it for common function.
Change-Id: I365cc10759559c7d7e824a6e4c93df24198d82f9
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
When a vop port connect more than one type output interface(DP +
HDMI in connector mirror mode), the output_type can't provide all
the interface info, which may calculate wrong dclk. So we use
output_if to get the output interface info.
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: Ia1b815c6d65a47b64e1b9679906c5979119f1d16
Add color properties support, then userspace can set the dp
output color depth and color format.
The default color depth and color format is 0, and driver
auto select the suitable color depth and color format.
If set the color depth to 0, it mean driver auto select
the suitable color depth and color format.
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I453ec87e8305cb6d8ddf0f7e4a9c274b97c54ee8
The uboot Type-C PD driver needs to poll the interrupt gpio level,
but the uboot code does not have a suitable interface to convert the
attributes of "interrupt-parent" and "interrupts" to standard gpio,
so add int-n-gpios configure for uboot to analyze and use.
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
Change-Id: Ie403b158a259411312159845ec316ffd8a061acf
Change from:
BAR0 512GB 32bits mem
BAR1~5 64MB 32bits mem
to:
BAR0 512GB np 32bits mem
BAR1 8MB np 32bits mem
BAR2 BAR4 64MB pref 64bits mem
And the log is like the following:
[ 5.245427] [ T148] pci 0000:01:00.0: BAR 2: assigned [mem 0x900000000-0x903ffffff 64bit pref]
[ 5.245449] [ T148] pci 0000:01:00.0: BAR 4: assigned [mem 0x904000000-0x907ffffff 64bit pref]
[ 5.245471] [ T148] pci 0000:01:00.0: BAR 1: assigned [mem 0xf0800000-0xf0ffffff]
Change-Id: I43ba2ebe0aacdc2b7f49175a6008d22c26ffd220
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
prsnt-gpios can be defined in DTS for showing if PCIe device is present
or not. By default, low voltage means device is present defined by PCIe
ECM spec. However, some buggy board may invert this voltage level. So
if you need high voltage to show the device is present, please add
rockchip,prsnt-active-high as well.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Ib0a5b509afc202a9ec63a4bbdd1e54a3916dcfc9
Sometimes we may need disable threaded init controllers, for instance,
multiple PCIe-2-SATA usage need to disable threaded init in order to
fix the sequence of disk number.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I34d22c619046b3f0d7c03e4a19a5ff07680be057
The reset function build in the SDHCI will not reset the logic
circuit related to the tuning function, which may cause data
reading errors. It is need to reset the controller by the cru.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I969945ae9db969ca8ea0869e8eaf7521dbe957ec
The background color and color bar won't display if the bg delay number
not correctly setting.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I11f78d043b173e4cd651f0c1ea5cab5dfe0fdb4b
Add the clock tree definition for the new RV1106 SoC.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I392cccbd4a4510940c099b7911a4f4711788f8ee
Add the dt-bindings header for the rv1106, that gets shared between
the clock controller and the clock references in the dts.
Add softreset ID for rv1106.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: Ia5bd903c6dc9caf925277fd42f873d8e8d6f643a
Document the device tree bindings of the rockchip Rv1106 SoC
clock driver in
Documentation/devicetree/bindings/clock/rockchip,rv1106-cru.yaml.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: Ide494c03b439ef0e3b88f1cfa6ee9b263b172f3f
When the virtual address has an in-page offset, iova needs to be offset
to the corresponding starting point.
Update driver version to 1.2.1
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I01e5109bd684f573920773d0d1e08685d1214a40
HDMI phy pll Ksub can't set to 0, or some frequencies may
have slight deviation.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I5e9b6faf7a4397b2b43beea7094fbd3f4b4cb46b
Different output interface may user the some property, keep
the property define in rockchip drm driver header file.
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: Ia0e53c978285fa3fc4bb1642ab5886279139c461
hdmi id 0 mean hdmi0, hdmi id 1 mean hdmi1, fix it.
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I8766336cf88c8b1dbff0f2f018cb69a5e65fdfa4
Now RV1103/6 is coming, the original CLK_RV110X is for
RV1107/8, to avoid been mis-understood, so, make this
change.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Id27803b6b2863f6949ddebb9c285c21ad1ca32ef
Now RV1103/6 is coming, the original CPU_RV110X is for
RV1107/8, to avoid been mis-understood, so, make this
change.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I1fa19e740b72934dc84f0d2bbbf56b00aa24225a
