It is not necessary to send rescheduling IPI when target cpu is not
idle for non-preempt kernel, because the target cpu will pick all the
tasks on the run-queue before enter idle.
Test this patch on RK3568-NVR, make cpu load to 100% with command:
taskset 01 yes > /dev/null &
taskset 02 yes > /dev/null &
taskset 04 yes > /dev/null &
taskset 08 yes > /dev/null &
So that the cpu will not enter idle.
without the patch, 32 channel video@25fps:
[root@RK356X:/]# cat /proc/interrupts | grep IPI0; sleep 10; cat /proc/interrupts | grep IPI0
IPI0: 74204 58815 99596 81177 Rescheduling interrupts
IPI0: 79503 76143 106149 87676 Rescheduling interrupts
with the patch, 32 channel video@25fps:
[root@RK356X:/]# cat /proc/interrupts | grep IPI0; sleep 10; cat /proc/interrupts | grep IPI0
IPI0: 28814 59314 60173 56759 Rescheduling interrupts
IPI0: 28814 59314 60173 56759 Rescheduling interrupts
Change-Id: I0d45a3d999696503124e693e7d6e145df719174a
Signed-off-by: Liang Chen <cl@rock-chips.com>
Enable bus_npu so that we can enable npu@1.0G safely when necessary.
Change-Id: I1a6ce1652aba7bafe91135bc79881cad0d5980ce
Signed-off-by: Liang Chen <cl@rock-chips.com>
RK3568 has 3 pmu io-domain, pmuio0/1/2, but the pmuio0 is 1.8v only, and
pmuio1 is 3.3v only, only pmuio2 support to select 1.8v or 3.3v.
RK3568 also has 7 io-domain, vccio1/2/3/4/5/6/7, but the vccio2
defaultly selected by the FLASH_VOL_SEL(GPIO0_A7).
Change-Id: I55ea1263c641112705b1443ff919c508cb3be2f0
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
We finally decide to set 16 for tx delay in driver, so no need for
dts to set it now.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I642ed3039db5410ca478b255166d07a035e971aa
According to the new test result, set tx delay to 16
by default.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I8e0bacfbf14f8c5db60a4d56a624d63c49e23051
Do sync reset only for PX30/RK1808/RK3308, because the BUG 'fsync
is out of sync' had been fixed on the latest version controller.
Change-Id: Ia4cd711a213cc03221726f7b6e89de3c317dc965
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
rkisp-isp-subdev pad2 to change colorspace and quantization
Change-Id: I077eb9482cd09119c11f2515e848dca203c42357
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
It isn't sticky when link goes down for whatever reason.
If devices want to reset the modules by puting link into D3
state or whatever, we should restore it the. Otherwise devices
cannot access RC's resource even if the link is recovered.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Ie5b5a0b7f6ab03961658b4217c9db2cada0edb93
we find sometimes hdmi will trigger a plugout irq when system
shutdown, but actually it is connected, so when drm core run
a connect->detect callback it will find the hdmi is on connected
state, than run drm_fb_helper_hotplug_event, this drive all
the drm system run again.
But we are on the system shutdwon process, the running
drm core may cause many problem.
So we disable output poll to prevent drm_fb_helper_hotplug_event
when system shutdown.
And also the we should figure out why hdmi driver trigger the
wrong plugout irq at shutdown process.
Requesting system reboot
[ 26.466261] cpu cpu0: min=816000, max=816000
[ 26.476177] dwhdmi-rockchip fe0a0000.hdmi: dw hdmi plug out
[ 26.492452] rockchip_drm_platform_shutdown
[ 26.579331] dw-mipi-dsi fe060000.dsi: [drm:dw_mipi_dsi_transfer] *ERROR* generic write fifo is full
[ 26.580141] panel-simple-dsi fe060000.dsi.0: failed to write dcs cmd: -110
[ 26.581771] dw-mipi-dsi fe060000.dsi: [drm:dw_mipi_dsi_transfer] *ERROR* generic write fifo is full
[ 26.582577] panel-simple-dsi fe060000.dsi.0: failed to write dcs cmd: -110
[ 26.667890] rkisp_hw fdff0000.rkisp: rkisp_hw_shutdown
[ 26.675465] fan53555-regulator 0-001c: fan53555..... reset
[ 26.676891] fan53555-regulator 0-001c: reset: force fan53555_reset ok!
[ 26.677867] mpp_rkvdec2 fdf80200.rkvdec: shutdown device
[ 26.678381] mpp_jpgdec fded0000.jpegd: shutdown device
[ 26.678853] mpp-iep2 fdef0000.iep: shutdown device
[ 26.679288] mpp_vepu2 fdee0000.vepu: shutdown device
[ 26.679745] mpp_vdpu2 fdea0400.vdpu: shutdown device
[ 26.680201] mpp_rkvenc fdf40000.rkvenc: shutdown device
[ 26.680664] mpp_rkvenc fdf40000.rkvenc: shutdown success
[ 26.777723] rockchip_drm_output_poll_changed
[ 26.890773] rockchip-vop2 fe040000.vop: [drm:vop2_crtc_atomic_enable] Update mode to 1080x1920p60, type: 16 for vp1
[ 27.392083] rockchip-vop2 fe040000.vop: [drm:vop2_disable_all_planes_for_crtc] *ERROR* wait win close timeout
[ 27.393012] dw-mipi-dsi fe060000.dsi: [drm:dw_mipi_dsi_encoder_enable] final DSI-Link bandwidth: 880 x 4 Mbps
Change-Id: Ib1454636b1b35bf310252ab9469a107fcbf7e37c
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Fixes: 8c59d20b75 ("drm/rockchip: vop2: Add color key support")
Change-Id: I449f32eb9e69297b2c37feb85611a550310f2304
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
tips:
for rk356x, when image width less than 512, it may occur very
small probability for sram read and write.
Change-Id: I57bdfeb776dc0762870f3d7a3a6d81a1c146240d
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
In order to improve stability for CPU and NPU.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I2934ce2a0ceb9fd8816b0e4711e40c800348f040
1.add EPD_OVERLAY_WHITE mode to support draw white line
2.add EPD_FORCE_FULL mode which can be used under overlay mode
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Change-Id: I6d4d3f12fe4e100904f181588bc51d5147fd8453
kernfs_notify() does two notifications: poll and fsnotify. Originally,
both notifications were done from scheduled work context and all that
kernfs_notify() did was schedule the work.
This patch simply moves the poll notification from the scheduled work
handler to kernfs_notify(). The fsnotify notification still needs to be
done from scheduled work context because it can sleep (it needs to lock
a mutex).
If the poll notification is time critical (the notified thread needs to
wake as quickly as possible), it's better to do it from kernfs_notify()
directly. One example is calling sysfs_notify_dirent() from a hardware
interrupt handler to wake up a thread and handle the interrupt in user
space.
Change-Id: If4983487f6aadecfb2185acbafeff47a1c7bb66f
Signed-off-by: Radu Rendec <radu.rendec@gmail.com>
Acked-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 03c0a9208b)
ctrl->val = ctrl->val * 2 will return
ctrl->val to v4l2 framework, and if next time
set ctrl->val is 2 * previous ctrl->val, will not actually set;
so fix it.
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I965f33f2e592a88ab2b8f6e362ca399260fe98ab
Maybe some people want to use the Ethernet function of evb2,
which is turned on by default so that the Ethernet can work.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I314ac4e0d51804ea3463735d6cc9c90a536d173a
Commit a44f7cb937 ("mmc: core: use mrq->sbc when sending CMD23 for
RPMB") began to use ACMD23 for RPMB if the host supports ACMD23. In
RPMB ACM23 case, we need to set bit 31 to CMD23 argument, otherwise
RPMB write operation will return general fail.
However, no matter V4 is enabled or not, the dwcmshc's ARGUMENT2
register is 32-bit block count register which doesn't support stuff
bits of CMD23 argument. So let's handle this specific ACMD23 case.
From another side, this patch also prepare for future v4 enabling
for dwcmshc, because from the 4.10 spec, the ARGUMENT2 register is
redefined as 32bit block count which doesn't support stuff bits of
CMD23 argument.
Fixes: a44f7cb937 ("mmc: core: use mrq->sbc when sending CMD23 for RPMB")
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20201229161625.38255233@xhacker.debian
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Ic31c6f626b869620a2656cb84ecb01fe03700a4e
(cherry picked from commit ca1219c0a7)
Allow SDHCI drivers to hook code before and after sdhci_request() by
making it externally visible.
Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I3e144e8f597d49479fbed8528519c257f740d3f2
(cherry picked from commit d462c1b474)
Select ION_CMA_HEAP to support cma memory allocated from ion driver.
Change-Id: I9bb44004e8e86e00795f85c31946eb8bb3f12006
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
The ion allocates memory defaultly with memset to zero, userspace should
do cache sync before read/wirte after map.
But the userspace always not to do that.
This patch supports to do force sync for memory allocated first time
from page pools with memset zero.
Change-Id: I8a65b1a3259d315459a0489f9c51ab0855957a70
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
when vp0 and vp1 indenpendent config layer_sel register, this register take effect
time is prone to error, so we add the following measures to workaround this issue:
1. Add commit_lock to make sure vp0 and vp1 config register is mutually exclusive;
2. Make sure layer sel register is take effect when it's update.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ief832e2bf7e18567f4ea663843c77f0afbd21cf7
the fs raw bit will be cleared by vop2_isr() fs irq and lead to
vop2_wait_for_fs_by_raw_status() time out, so we use
vop2_wait_for_fs_by_done_bit_status() to wait done bit from 1 to 0 is
more reliable.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ice35fb9bfe6c2ef7a49496b15b9f58bf93e95d4e
We thought when userspace switch hdmi to hdr mode, it must
give vop a hdr plane, but We meet a case: composer give
vop only one sdr plane, but switch hdmi to hdr mode.
so we don't check the plane number for sdr2hdr_en;
Change-Id: I4804a88321af84328735d6499ac9df610bf2cb85
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
1. limit vmin of cpu/gpu/npu/logic by mbist_vmin.
2. raise vdd_logic when npu run at 1.0GHz or venc run at 400MHz.
3. disable npu@1.0GHz and venc@400MHz by default.
4. reduce vdd_logic for the chips with big leakage.
5. adjust low-temp-adjust-volt table.
Change-Id: If7ce6f010422d20e2dfd643a6894fa7304e6372f
Signed-off-by: Liang Chen <cl@rock-chips.com>
Add support for rk3568 and init opp-table with rockchip_init_opp_table()
so that rockchip_bus can support pvtm and leakage.
Change-Id: Ief17dba8264906f987d4dac93b2e7344c98bc8fa
Signed-off-by: Liang Chen <cl@rock-chips.com>
1. support get pvtm from otp.
2. adjust opp-table by mbist_vmit which is get from otp.
Change-Id: Ie3703873880b65b2af03ae474065d541c7f9d605
Signed-off-by: Liang Chen <cl@rock-chips.com>
Fixes: b25c12a00a ("scripts: add io-domain.sh for rk356x io-domain check")
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: I5b8d8706b48f32a6ba2dbeebabf3a5bd2ba24678
In preparation to enable building SCMI as a single module, let us move
the SCMI protocol registration call into the driver. This enables us
to also add unregistration of the SCMI protocols.
The main reason for this is to keep it simple instead of maintaining
it as separate modules and dealing with all possible initcall races
and deferred probe handling. We can move it as separate modules if
needed in future.
Link: https://lore.kernel.org/r/20200907195046.56615-4-sudeep.holla@arm.com
Tested-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
(cherry picked from commit 1eaf18e35a)
Conflicts:
drivers/firmware/arm_scmi/reset.c
drivers/firmware/arm_scmi/system.c
Change-Id: Iec1dbc42c49367a1fa7299cb359f1214021ada6b
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
