Commit Graph

1064591 Commits

Author SHA1 Message Date
Shawn Lin
d41cbb73cb PCI: rockchip: dw: Reduce establish linking time
We kick probe to a kthread so giving a more generous timing would
not be a problem. But given that it's the same routine for resume,
we need more limited timing.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I382bb07ffa389caf854d725c955220c65366cd36
2021-12-23 22:01:27 +08:00
Alex Wang
7a3681fd28 arm64: dts: rockchip: rk3588-nvr-demo-v10-android: disable sata and hdmi1
Signed-off-by: Alex Wang <alex.wang@rock-chips.com>
Change-Id: I40925ed3b755cbb604bc79b556842b164bacbd44
2021-12-23 21:55:30 +08:00
Wang Panzhenzhuan
d4c3c0d2ea arm64: dts: rockchip: add imx415 dtsi for rk3588 evb2
Add dts for imx415 sensor on rk3588 evb2 board.

Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I71ce4dd5f1fa990abf832d9ed0fa5eb0cc70f5bb
2021-12-23 21:51:17 +08:00
Weixin Zhou
8aa80d1c81 arm64: dts: rockchip: add rk3588s-tablet-rk806-single-v10.dts
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
Change-Id: Icd011b8c1d45707b4714a8fa6ec0b52496c97b69
2021-12-23 21:41:27 +08:00
Weixin Zhou
762807a8b5 arm64: rockchip_defconfig: Enable CONFIG_CHARGER_BQ25890
RK3588s tablet use this feature.

Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
Change-Id: I6fb56940f629530633f5d0acc7fba33350260d8e
2021-12-23 21:41:08 +08:00
Algea Cao
efab7c9ded drm/rockchip: dw_hdmi: SCDC communication is performed only on SCDC supported TV
If SCDC communication is performed on a TV that does not
support SCDC, the I2C bus may become stuck.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I1c1cf926394746dcc198b427a61ffa486ecc99f3
2021-12-23 21:15:44 +08:00
Yu Qiaowei
c398683fd3 video: rockchip: rga2: Fix rotating mmu interruption error.
Since the ARGB format was added without processing the address offset
during rotation, the address offset of mmu was calculated incorrectly.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I6bddd21b50bf60cadf493e73cff10c18210c375c
2021-12-23 21:07:50 +08:00
Jianqun Xu
6a77c1c349 pinctrl: rockchip: rk3588 fix schmitt 8 pins per register
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I756dfd5b42b4fa9e9472a617d68deb4b56ae42a6
2021-12-23 20:19:35 +08:00
David Wu
2c677df5ef ethernet: stmmac: unmap dma buffer after receive data for RX
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Icde5634bfb7d8d71eef08b3ddc20739483cc6316
2021-12-23 20:17:11 +08:00
Algea Cao
b09fc482a2 drm/rockchip: set read only properties immutable
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I22bc515d1605b3bde74f230e96b99cd2ee26dce9
2021-12-23 20:14:38 +08:00
Wyon bi
ce6108c721 drm/rockchip: dw-dp: Use max bpc for color depth limit
Signed-off-by: Wyon bi <bivvy.bi@rock-chips.com>
Change-Id: I2ef8d8ba17af50abb4ad3be54e15b5e933ef1e48
2021-12-23 20:10:43 +08:00
Elaine Zhang
9de1cee0df clk: rockchip: rk3588: remove pclk_gpu_root
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I45f7cc56bafc0594eef7cfb6011b1ad912e3ac2e
2021-12-23 20:10:12 +08:00
Elaine Zhang
8e0cd59532 arm64: dts: rockchip: rk3588: remove pclk_gpu
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I68c453689207b3e25ffcaf91920afce7994c6ce6
2021-12-23 20:10:12 +08:00
Zhen Chen
757826e997 MALI: rockchip: upgrade bifrost DDK to g9p0-01eac0, from g7p1-01bet0
In addition, fix a bug of calling KBASE_KTRACE_ADD() too early.

Change-Id: I843f340526275b50ae7d1ec6a7a68963e081e219
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2021-12-23 19:33:49 +08:00
William Wu
fedba533e2 usb: dwc3: drd: fix device mode for rockchip platform
On some Rockchip platforms (e.g RK3588 EVB2), the USB
interface is Type-A USB 3.0 with vbus always on. In
this case, the USB PHY may fail to send extcon notifier
to dwc3, and the desired_role_sw_mode is uninitialized.
So we need to initialize the desired_role_sw_mode which
depends on the id status during dwc3 probe.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I79074d11773486250cd9ab286eb450826649bfcb
2021-12-23 19:32:33 +08:00
Sandy Huang
3c5901b19d drm/rockchip: vop2: set dsc delay num according to dsc bpp
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I57a2a4a8d07c98ce5fb76aa7364690e171fa2937
2021-12-23 19:08:03 +08:00
Sandy Huang
14b835b916 drm/rockchip: vop2: reset dsc config when exit dsc
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Idfe11a25249ab89b73a752c8f48c6c38bc192885
2021-12-23 19:07:59 +08:00
Shawn Lin
830f920f79 phy: rockchip: naneng-combphy: Renew detect bypass reg
Should use REG_19H instead of REG_DH.

Fixes: e6ae079436 ("phy: rockchip: naneng-combphy: Force detect Rx for RK356X and RK3588 SoCs")
Change-Id: Ifc9484e850955e6a36c30755a7ba1aee65070d0f
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2021-12-23 11:43:56 +08:00
Jon Lin
652b70446f spi: rockchip: clear interrupt status in error handler
The interrupt status bit of the previous error data transmition will
affect the next operation and cause continuous SPI transmission failure.

Change-Id: Ib215d63d8572e3fc8d843652687e1ebfb7ff531e
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-12-23 11:35:20 +08:00
Andy Yan
df5f245c28 drm/rockchip: vop2: Make sure previout zpos update take effect before change it
We have the same LAYER_SEL&PORT_SEL register conflicts
issue as rk356x.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I68bf32499b04bba5b0089df2bb473673d9804b90
2021-12-23 11:07:42 +08:00
Andy Yan
29af993b46 drm/rockchip: vop2: Setup dly for vp even there is no plane
We notice there are many POST_BUF_EMPTY irq when user space
enable a video port but without any attached plane.

Setup dly in this situation can avoid the POST_BUF_EMPTY
irq storm.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I907eb1737ac134dda8b2d237584c9d2f2b917b5e
2021-12-22 20:13:52 +08:00
Andy Yan
f925d936cb drm/rockchip: vop2: swap uv for YUV422 8bit/10bit AFBC
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Iba6af8944093201ba84c8fec5deab9eb29265c9e
2021-12-22 20:10:12 +08:00
Sandy Huang
cf58ab4406 drm/rockchip: vop2: rename and correct supported format
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ie9b78a26446ce8fc413f2595df6414c1454f03f9
2021-12-22 18:54:35 +08:00
Sandy Huang
3023f3acc5 drm/rockchip: vop2: add support YUYV and UYVY for rk3588
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Iecdfa09746389998a9eefef442b2350308c59b14
2021-12-22 16:36:27 +08:00
Yu Qiaowei
e1564ca41b video: rockchip: rga3: Fix rotating mmu interruption error.
Since the ARGB format was added without processing the address offset
during rotation, the address offset of mmu was calculated incorrectly.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I602ebd3bcc9c60fd90103ef50e29e6b9f2a11727
2021-12-22 16:18:33 +08:00
Wang Jie
386d162f92 arm64: dts: rockchip: rk3588s-tablet: fix charger ic output otg current limit problem
At present, the charger ic output otg current limit is 500mA, the
high-current usb device (for example, usb3.0 hard disk) cannot work
normally in Type-C0, such as disconnection and reconnection. According
to the requirements of the usb3.0 protocol, the minimum vbus current
limit is 900mA. We set the charger ic output otg current limit to 900mA,
and the video playback in the usb3.0 hard disk is still unstable.
The rk3588-evb Type-C vbus current limit is about 1.44v, the usb3.0 hard
disk can work stably, so the rk3588s tablet output otg current limit is
configured to 1.5A.

Change-Id: I47bbc6c8f06025504857067d42d780aa783007c6
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
2021-12-22 15:50:58 +08:00
Jon Lin
ec2de31ea9 arm64: dts: rockchip: rk3588: Make PCIe phy power supply always on
Without dynamic adjustment, it is managed by secondary standby.

Change-Id: I425108495ffdc827231d77c79cebaeededeb9150
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-12-22 15:47:07 +08:00
Finley Xiao
3eae38e0c1 nvmem: rockchip-otp: Add support for rk3588-otp
This adds the necessary data for handling otp on the rk3588.

Change-Id: I55a162dfa5735139c2f1d74510b53496decacbb6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2021-12-22 14:59:48 +08:00
Chen Shunqing
dc6c7a9c42 power: supply: cw2015: avoid frequent psy change report
Signed-off-by: Chen Shunqing <csq@rock-chips.com>
Change-Id: I63bedab66cb7c65a54ba10c1c2fb0970d32a9d31
2021-12-22 10:58:41 +08:00
Caesar Wang
325213d280 drm/rockchip: dw_hdmi: improve readability of unknown property
The original set the property error message:
[drm:dw_hdmi_rockchip_set_property] *ERROR* failed to set
rockchip hdmi connector property

This patch will output the useful information as below:
[drm:dw_hdmi_rockchip_set_property] *ERROR* Unknown property
[PROP:198:hdmi_color_depth_capacity]

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: I43762d395ebed5e0fcaa96d1ebc6142a5fe1b068
2021-12-21 20:49:50 +08:00
Tony Xie
0d7b0f59bd arm64: dts: rockchip: rk3588s: add cpu idle node.
Signed-off-by: Tony Xie <tony.xie@rock-chips.com>
Change-Id: I15075903eeb9b17c3dc8d9b55a36df4b6c2c79eb
2021-12-21 19:40:20 +08:00
Huibin Hong
f16ec686d9 arm64: dts: rockchip: enable gicv3 pseudo nmi for rk3588-linux
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Change-Id: Ie61eac26fd61e92dbdcf9f27bc0051596ffdc885
2021-12-21 19:32:47 +08:00
Huibin Hong
3b72eca57c arm64: dts: rockchip: enable gicv3 pseudo nmi for rk3588-android
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Change-Id: Ic1a4e130e5cd0bdc8bf7ce9c08d635cc772e955f
2021-12-21 19:32:47 +08:00
Huibin Hong
8bbdc17821 arm64: rockchip_linux_defconfig: enable ARM64_PSEUDO_NMI
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Change-Id: Ied7ee74d250c8f56c0545a8e2c4a3b480a361b72
2021-12-21 19:32:47 +08:00
Huibin Hong
c87fd4d0d4 arm64: rockchip_defconfig: enable ARM64_PSEUDO_NMI
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Change-Id: I0a765fcf5740353dc1a092cf63604a3cf5099a67
2021-12-21 19:32:47 +08:00
Huibin Hong
58e8ae42ae fiq debugger: support nmi mode
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Change-Id: I1c3b3591d1760eba773a7d754530e70e80118893
2021-12-21 19:32:47 +08:00
Guochun Huang
69622cf227 arm64: dts: rockchip: add route_dsi0/1 for rk3588 evb
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: Ic4c04cc5229a6b7363f690fa84998f3658ca3fd2
2021-12-21 19:10:33 +08:00
Li Huang
3b60b0cbdb video: rockchip: rga3: Fixup wrong r2y csc convert on rga3
Signed-off-by: Li Huang <putin.li@rock-chips.com>
Change-Id: Ic2d3737152268e9c6f6f5504a691289b82c5151e
2021-12-21 19:06:57 +08:00
Jon Lin
c7c9c50b55 arm64: dts: rockchip: rk3588: Set the default value of spi data strength to level1
1.The EVB signal test of this configuration is good.
2.This confitguration is compatible with 16MHz and 50MHz SI test case.

Change-Id: Ie259e2e8229d68013efa13278b0479c5dc73739c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-12-21 18:23:31 +08:00
Jon Lin
6a0b6f63ed arm64: dts: rockchip: rk3588s: remove spi high-speed pinctrl configuration
Change-Id: Ibde8d4498f0bd056803aafdad71a09d925a7927a
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-12-21 18:23:31 +08:00
Jon Lin
88700feb96 arm64: dts: rockchip: rk3588s-evb4-lp4x: remove spi high-speed pinctrl configuration
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Change-Id: I2096aec71a3a6cea31199e832d73d2acbeac843d
2021-12-21 18:23:31 +08:00
Jon Lin
5eb1bc4ab4 spi: rockchip-test: Support more devcies
Change-Id: I6fac8ab28095396aa21f6b696e8cfb2984862b86
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-12-21 18:23:03 +08:00
Finley Xiao
f12b2a431a arm64: dts: rockchip: rk3588: Modify opp table for gpu
Use scmi clk for gpu.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I395baa35afd9719d02c4f70ba428b9bf917a66f8
2021-12-21 18:13:32 +08:00
Finley Xiao
38f95dea72 arm64: dts: rockchip: rk3588s: Add volt-mem-read-margin for gpu
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ib6b50a308321e5940a938d55099673297ec30fb7
2021-12-21 18:13:26 +08:00
Finley Xiao
34af47df70 MALI: bifrost: Implement rk3588_gpu_set_read_margin()
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I02ea2bc1feb987b94832182ee7ea94fd1b4ee6cf
2021-12-21 18:13:20 +08:00
Finley Xiao
b962421460 MALI: bifrost: change BASE_MAX_NR_CLOCKS_REGULATORS to 4
Add a new scmi clk for changing gpu clock rate.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ib2496a528a44a4106e1becf0d99335e207d85667
2021-12-21 18:13:12 +08:00
Finley Xiao
d805bd29b1 arm64: dts: rockchip: rk3588: Modify opp table for cpub
Use scmi clk for cpub.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I08ad60860a14d7bbe4c6f726f66a2eb40db610d6
2021-12-21 15:14:22 +08:00
Finley Xiao
eedb02740c arm64: dts: rockchip: rk3588s: Add volt-mem-read-margin for cpub
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ieb99848f01503da84e1d79f1b1ff4dbdafb55aa1
2021-12-21 15:14:05 +08:00
Finley Xiao
8ee8a15511 arm64: dts: rockchip: rk3588-rk806: Change max microvolt to 1050mV for cpub
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I2a6f5359826e1963e7684598927b539e97b313b7
2021-12-21 15:13:10 +08:00
Finley Xiao
75997fe10d cpufreq: rockchip: Implement rk3588_cpu_set_read_margin()
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I3a15176f783cfc311299dc0e59e718d6c57fefd1
2021-12-21 15:10:39 +08:00