Set system_serial_low/high from eFuse ID.
Serial can read from /proc/cpuinfo.
Change-Id: If412fc5a89a5e5092b510452fc5a126fdd374ac2
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Use a new compatible to match secure interface
when kernel is in no-secure mode.
Change-Id: I3994b2c86bb9e221f102766c2d1a341930628b5d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
This adds the necessary data for handling secure efuse on the rk3288.
Need to use secure interface to access efuse when kernel is in no-secure
mode.
Change-Id: I1979f23ed8f85c9eb248de276b32adcbb165bd79
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Cat ddr frequency from rockchip_ddrclk_scpi_set_rate prior to
rockchip_ddrclk_scpi_recalc_rate, to optimizing running time and reduce
SCPI APIs usage rate.
Change-Id: Iba31d33a5920816b1cc230f639ea3a9503d451c8
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
1. amend return frequency for scpi_ddr_set_clk_rate.
2. add scpi_ddr_dclk_mode function for rk3368.
Change-Id: I0f3c42d74e34ccb740f2a9e68ef12bba98b7aab7
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
The function doesn't get something from dts, it is more appropriate to
rename of_get_opp_table to rk3399_dmcfreq_init_freq_table.
Change-Id: I8c4994d45ff4d0654d034483e091bbb225a1ea61
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
This adds the necessary data for handling dfi on the rk3368.
Access the dfi via registers provided by GRF (general register
files) module.
Change-Id: I96c2b4dcd34d90731b749ebdbe6922f01559d8e6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Add a ddrc clock into clk branches, so we can do ddr frequency
scaling on rk3368 platform in future.
Change-Id: Ie7fd2e8d8bdf8b9ff843ca13e848f772adaa109a
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
On rk3368, let a mcu scaling ddr clock via SCPI (System Control and
Power Interface) APIs.
Change-Id: I95342b876caad991e6d1319c5e4ec793365c7981
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
update some features:
1. rename sip smc function name;
2. add serial hw irq and phyical base address parse;
3. use FIQ_DEBUGGER_TRUST_ZONE for armv7 and armv8.
Change-Id: I920899f30cadf1ec8380a2e70f5d1e0e801ec5c2
Signed-off-by: chenjh <chenjh@rock-chips.com>
This adds fixed below errors when compiled rockchip_defconfig without
CONFIG_RK3368_SCPI_PROTOCOL select:
In file included from drivers/clk/rockchip/clk-ddr.c:23:0:
include/soc/rockchip/scpi.h:89:12: warning:
'scpi_sys_set_jtagmux_on_off' defined but not used [-Wunused-function]
error, forbidden warning: scpi.h:89
scripts/Makefile.build:258: recipe for target
'drivers/clk/rockchip/clk-ddr.o' failed
make[3]: *** [drivers/clk/rockchip/clk-ddr.o] Error 1
Change-Id: I5abc184554dcfc3697be82aede8dec27da2fcdd9
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
GPU and DDR share vdd_logic.
DDR DVFS is not ready yet, to ensure DDR could work stably,
vdd_logic(vdd_gpu) should be higher than 1.05V.
This would be optimized after DDR DVFS is ready.
Change-Id: I2749484c7f6f86dde850f0f85d606e1c1ab85c17
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
DDK integrate_guide says
"not to use core_scaling on r5p0-01rel0 and later."
Change-Id: Ibb3eddac75548bb9f6763dc4dc9bad540746191f
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
Some dependences of mali device driver should be initialized first.
Change-Id: I76f1d8b029345801bf0a68266889ec1c5a28b524
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
Some rockchip platforms (e.g. rk3399, rk3328) xHCI controller
support stream for UASP (USB Attached SCSI PROTOCOL), use of
UAS generally provides faster transfers compared to the older
USB Mass Storage Bulk-Only Transport (BOT) drivers.
Change-Id: I67ce5cdb821413d3c4d018be31c892d20d831470
Signed-off-by: William Wu <wulf@rock-chips.com>
Some rockchip platforms (e.g. rk3399, rk3328) xHCI controller
support stream for UASP (USB Attached SCSI PROTOCOL), use of
UAS generally provides faster transfers compared to the older
USB Mass Storage Bulk-Only Transport (BOT) drivers.
Change-Id: I69e10d3f55c03c411cd9efcef9a7fd9f8ccb9a53
Signed-off-by: William Wu <wulf@rock-chips.com>
This adds move rk3368-mbox related *.h files from linux/rockchip
to soc/rockchip.
Change-Id: I2d57b6baa64d531e89766a5384d8c217cf347ebf
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
When the color depth is 24 bits per pixel video, the CD
field in General Control Packet should be "Color Depth
not indicated", then the colordepth in register vp_pr_cd
& csc_scale should assign to zero.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
BUG=chrome-os-partner:38212
TEST=speedy board, Test with Agilent Technologies U4002A
HDMI Protocal Analyzer
Change-Id: Ifd5767d339fdbff11e234ec0891c8f3df1dd66a5
Reviewed-on: https://chromium-review.googlesource.com/261850
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Tested-by: Yakir Yang <ykk@rock-chips.com>
Commit-Queue: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
The evaluation board using the mpu6050 as the sensor, which
combine a 3-axis gyroscope and a 3-axis accelerometer
Change-Id: Ia41d2c038e38de3cb6d24d81d4b018670935d39a
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
Because of the bad quality of EVB board, its phy will
fail at the GMAC mode. While I have verified the ASUS
tinker, it doesn't have such problem.
Change-Id: I3306b918363dff513e279762482f1ce1eaa30df8
Signed-off-by: Randy Li <randy.li@rock-chips.com>
Add psci v1.0 support to rk3288, support it to call into
secure world through psci APIs.
Change-Id: I1dc98fbdcc544a2bf0ec09544e946756757d2d80
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
fix some bugs:
1, If all connector failed to display, loader logo can't free.
2, if first route failed to display, loder logo free unexpect,
cause iommu crash.
Change-Id: I838c9fd6768a5ac48d8ce4175038b4620a95cd42
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
