The dwc3 wakeup and suspend interrupt handler are not perfect,
and it can't support usb gadget auto suspend function to save
power. For UVC device, the auto suspend function is necessary
and helpful.
With this patch, it enable DWC3_DEVTEN_EOPFEN by default for
software to handle suspend interrupt. And for Rockchip platforms,
they usually power down DRAM when system enter deep sleep, so
this patch disable the dwc3 irq in dwc3_suspend to avoid dwc3
controller access the DRAM for handling dwc3 event if wakeup
from USB Host resume signal.
By default, the gadget wakeup from system suspend is disabled.
The user can add "wakeup-source" property in DTS dwc3 node to
enable it like this:
&usbdrd_dwc3 {
status = "okay";
wakeup-source;
};
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Iaf9d642ae1ef6ed12e66a15158706de6d73d5124
Avoid image data have 0xff 0x00 0x00 lead to disturb bt1120/bt656
EAV and SAV sync signal, so enable yuv clip when bt1120/bt656 output.
Change-Id: I59d802814f3619641516254b88e82adc636c6cde
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Fix some modes that did not set the U/V address and
cause the output error of the YUV format image.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I41abd364576e0a73fd501f3dfc726eeaa6c9b118
Avoid image data have 0xff 0x00 0x00 lead to disturb bt1120 EAV and SAV
sync signal, so enable yuv clip when bt1120 output.
Change-Id: I103615bfecfbf812768b89fb42bfd3859950187b
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
This patch adds uvc_function_suspend and uvc_function_resume
for uvc function. With this patch, if usb bus enter suspend
or resume state, the usb controller driver will call the
uvc_function_suspend or uvc_function_resume to send event
to uvc app.
Change-Id: I9c584aae25298747c5a287243cb3efd71c8adfe6
Signed-off-by: William Wu <william.wu@rock-chips.com>
The spi which's version is higher than ver 2 will automatically
enable this feature.
If the length of master transmission is uncertain, the RK spi slave
is better to automatically stop after cs inactive instead of waiting
for xfer_completion forever.
Change-Id: If99e51d35391b824f48e31a3e4508db036593c8a
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
arch cris & metag have been removed from supported archs.
The dts hard link files should also be removed, or the ctags
tool will give warning.
execute"ctags -R" or "gtags", output:
ctags: Warning: cannot open source file
"scripts/dtc/include-prefixes/cris" : No such file or directory
ctags: Warning: cannot open source file
"scripts/dtc/include-prefixes/metag" : No such file or directory
This patch was override by commit 9820464afd ("UPSTREAM:
devicetree: Move include prefixes from arch to separate
directory"), so apply it again.
Change-Id: I002617cde3f879bc8364f55502839b3c3cd2dd92
Signed-off-by: Liu Changcheng <changcheng.liu@intel.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
(cherry picked from commit 8d14f31ec9)
add rockchip_rt5651_rk628 machine driver to support HDMIIn function
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
Change-Id: I893afca69ba555a3a05751df32aa4461720d3ca4
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
When system restart, there are two rst actions of PMIC sleep if
board hardware support:
- 0b'00: reset the PMIC itself completely.
- 0b'01: reset the 'RST' related register only.
In the case of 0b'00, PMIC reset itself which triggers SoC NPOR-reset
at the same time, so the command: reboot load/bootload/recovery, etc
is not effect any more.
We add a cmd list to check if this reboot cmd is what we expect for 0b'01.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ib87d031a9dc2edc3d0ee2ba5bfb0d647696bf494
if 3dlut enable and 3DLUT_UPDATE = 1,
will start read lut at following case:
1. isp force update
2. frame end
2->1 shouldn't for 3dlut.
Change-Id: I82d03836035bc06e25839fe4d90dba7cd36c2e1a
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
Panel Self Refresh (PSR), originally introduced in eDP v1.3, is an
optional feature for Source and Sink devices.
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I39c357d7caefc087241407a7d6b452e47e16eb9a
1. fix g_mbus_config lane config issues
2. add debug info
3. add r1a version support
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I7ef54d8216597963a90e60d5a57859818c07c929
Data will divide into multi parts to calculating while buffer not
aligned, and crypto BC_CTL/HASH_CTL only be initialized at first
time. Crypto module will be stuck at second calculations if
BC_CTL/HASH_CTL is cleared after every calculations.
Change-Id: I753c4cefbcefcbf38f36f9a6798f406979b4d17d
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
If update too early, the message is always "deep" even mem_sleep
is lite or ultra.
We expect the right message:
"PM: suspend entry (ultra)" or "PM: suspend entry (lite)".
Fixes: 362667b0e3 ("PM / sleep: support mem_lite/mem_ultra mode")
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I15086d04cd05ec9f296c92e2f9adb8c0bfa32f33
