Commit Graph

611185 Commits

Author SHA1 Message Date
Xing Zheng
ff897a86fc arm64: dts: rockchip: rk3308-evb: remove the enabled always loopback
Change-Id: I5dcc509e9c06a402adaefe1d9c4288d04c20b5a0
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-08-30 11:37:16 +08:00
Xing Zheng
e985002208 ASoC: rk3308_codec: limit the loopback grp isn't enabled always
Change-Id: I2475b9c2fa3880ee14cf6d7a42d07433cf4fbe32
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-08-30 11:37:04 +08:00
Xing Zheng
649b02aba5 ASoC: rk3308_codec: Fix the incorrect bits for BIST SINE and CUBE
Change-Id: I96655cfc6cb58ece7b04051b33520b7c8417a3d6
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-08-30 11:35:14 +08:00
Xing Zheng
8db32cdbc4 ASoC: rk3308_codec: Fix the incorrect ADC state during shutdown stream
Dues to the broken ADC state, it may miss reset ADC digital
register and bring long time (~80ms) unstable and invalid
data at next recording.

Change-Id: Ibf516c054cab99536a4fa3b5fd82f52810352420
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-08-30 11:35:03 +08:00
Jianqun Xu
c1601b790d arm64: dts: rockchip: add uart nodes for RK1808
RK1808 support 8 uarts, from uart0 to uart7.

Change-Id: I7fb796c4b068bd6f7f6eaaf2bd243ba8775a9449
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2018-08-30 09:06:25 +08:00
Jianqun Xu
b33201da02 dt-bindings: fix error reg of uart1 in rk1808-cru.txt
1. fix error reg of uart1
2. add rockchip,rk1808-uart

Change-Id: Id08ea2d98869009e8777690a483b372269b92505
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2018-08-30 08:47:04 +08:00
Sugar Zhang
0ed5cc838e ASoC: rockchip: multi_dais: fixup wrong format
This patch fixup wrong format if property missing.

Change-Id: I77a86c97b1526fa11a819ad0f2daca803e22ee7f
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2018-08-29 14:22:52 +08:00
Sugar Zhang
108ca254dc ASoC: rockchip: vad: add vad switch
This patch add the vad switch control for on/off vad function.

/ # amixer contents
numid=47,iface=MIXER,name='vad switch'
  ; type=BOOLEAN,access=rw------,values=1
  : values=off

/ # amixer cset numid=47 1
numid=47,iface=MIXER,name='vad switch'
  ; type=BOOLEAN,access=rw------,values=1
  : values=on
/ #
/ # amixer cset numid=47 0
numid=47,iface=MIXER,name='vad switch'
  ; type=BOOLEAN,access=rw------,values=1
  : values=off

Change-Id: Id50c021cc581a8371c680b9d180e56ac6a12cf4e
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2018-08-29 14:22:52 +08:00
Sugar Zhang
fdb1de7cdc Revert "ASoC: rockchip: vad: enable vad when system suspend"
This reverts commit 6e1f2fba64.

Change-Id: I08fb911dd2b4abbc188af350dd8ad7e9ebcee795
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2018-08-29 14:22:52 +08:00
Jeffy Chen
cab1edc0e8 rtc: rtc-rk-timer: Fix time64 to tick convert
There's an u64 to int convert which may cause overflow.

Change-Id: I7feb46e501828666353506c37a1f35db39ff45f7
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
2018-08-29 14:18:57 +08:00
Siyong Chen
d96ea9d580 video: rockchip: vpu: add soft reset for rkvdec
rkvdec dev status may wrong after irq, this may cause
next frame dec fail. so must add soft reset after irq

Change-Id: I8649206f353f5c3004b09f1255b50258afff1974
Signed-off-by: Siyong Chen <sayon.chen@rock-chips.com>
2018-08-29 09:38:28 +08:00
Jianqun Xu
33cdb0cb52 arm64: dts: rockchip: rk1808 fix compile error
1. fix gmac error clk
2. fix ";" at the end of gmac pinctrl
3. fix error pinctrl for spim0_csn
4. add pull_none_*ma

Change-Id: I42ef3cc09e616c606b5a09ba50481857d95ad6e8
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2018-08-29 09:34:51 +08:00
Jianqun Xu
a3b25912fd clk: rockchip: rk1808: modify RGMI to RGMII
Change-Id: I7b846ecf5c9dd73a08de1b0d38de94943c79dcf4
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2018-08-29 09:34:38 +08:00
Finley Xiao
a7f2aa3d0b arm64: dts: rockchip: px30: Add boost config
Change-Id: I2f82059b0b67eaa17aa94fbfc1b318d480228138
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-08-29 09:16:25 +08:00
Finley Xiao
cf4884abdb clk: rockchip: Add divider for backup pll when boost
Cpu clock rate should be less than or equal to low rate when
change pll rate in boost module.

Change-Id: I53c4e66f06bba1e6a85920df0aaceb80176ab016
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-08-29 09:16:25 +08:00
Finley Xiao
543172cfe3 clk: rockchip: Add support to get boost configure from devicetree
There are some configuration options for cpu boost, such as low
frequency, higt frequency, boost backup pll, and so on.

Change-Id: I35d65f05bbd5ef2a70e4a2e4637e7b4f9f67dda9
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-08-29 09:16:25 +08:00
Elaine Zhang
75c66d931a ARM64: dts: rockchip: add tsadc node for rk1808
Change-Id: I2681192228cc8b4736e9c249f0afc9ba8d29a07b
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2018-08-29 09:15:26 +08:00
David Wu
2bd44ab879 arm64: dts: rockchip: Add spi dts nodes for rk1808
Change-Id: I5c4f6e9fcb24abc47dcbb62284f000df4f421569
Signed-off-by: David Wu <david.wu@rock-chips.com>
2018-08-28 20:19:12 +08:00
David Wu
51ea113fb8 arm64: dts: rockchip: Add gmac dts node for rk1808
Change-Id: I6f98b73b5633ea6c7c12546a8580de676c0cb7d2
Signed-off-by: David Wu <david.wu@rock-chips.com>
2018-08-28 20:19:12 +08:00
David Wu
15a1bfdbe6 net: ethernet: stmmac: dwmac-rk: Add gmac support for rk1808
Add constants and callback functions for the dwmac on rk1808 soc.
As can be seen, the base structure is the same, only registers
and the bits in them moved slightly.

Change-Id: I39a75b89cd17331bb4373b9b249ae206e1420e71
Signed-off-by: David Wu <david.wu@rock-chips.com>
2018-08-28 20:19:12 +08:00
Elaine Zhang
25353ec005 thermal: rockchip: add tsadc support for rk1808
Change-Id: Icc0bb8a076a3fbd5f8ab70db8d7e032165528ae8
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2018-08-28 18:29:26 +08:00
Elaine Zhang
90a51eb7bc dt-bindings: thermal: rockchip-thermal: Support the RK1808 SoCs compatible
This patch set attempts to new compatible for thermal founding
on RK1808 SoCs.

Change-Id: I133218cd958e0aabf711a5d22fe5e5da2fbd59ce
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2018-08-28 18:29:20 +08:00
Tao Huang
2030cda396 rk: ARM: Fix build problem with O=
mkkrnlimg/resource_tool is build from source, don't use $(srctree)
on Makefile.
make modules when $(srctree) == $(objtree) otherwise build will
fail.

Change-Id: I7824d0e9cb60ca40925c4047a203242c6e50505d
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-08-28 18:27:24 +08:00
Tao Huang
197ccb6188 rk: arm64: Fix build problem with O=
mkkrnlimg/resource_tool is build from source, don't use $(srctree)
on Makefile.
make modules when $(srctree) == $(objtree) otherwise build will
fail.

Change-Id: If8461a30d450aef089ae7db5f5851d4837e7c303
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-08-28 17:35:57 +08:00
Jianqun Xu
9b864e79dc arm64: dts: rockchip: fix grf/pmugrf address
1. Correct grf/pmugrf mapping address.
2. Add xin32k node
3. Remove pmucru
4. Modify mapping address length of cru to 0x50000
5. Add sclk for gpio controllers
6. Add clock for sdmmc & emmc

Change-Id: I8d57f569edfd05559fe1719b7cc3d8d16f8b09c2
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2018-08-28 14:47:10 +08:00
Tao Huang
2d48ae5b45 net: wireless: rockchip_wlan: rtl8723ds: Fix build problem with O=
Change-Id: I2f2a83ea635c267a74df48a46ebba9147e56b4a7
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-08-28 14:09:44 +08:00
Tao Huang
05c93810f4 net: wireless: rockchip_wlan: rtl8723bs: Fix build problem with O=
Change-Id: I9d17dbce96b649fd56298f66ff0da2afbdcf3f7e
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-08-28 14:08:47 +08:00
William Wu
d6dc21d7de usb: dwc3: support global Tx/Rx threshold control
According to "TX/RX Data FIFO Sizes and TX/RX Threshold Control
Register Settings" section in the DWC SuperSpeed USB 3.0 Controller
User Guide, for large latency systems, it may cause unnecessary
performance reduction, and having large TX/RX FIFOs alone is not
sufficient, to solve this issue, the controller provides a packet
threshold feature in the host mode.

For example, on rk3399 platforms, if we set aclk_perilp to 100 MHz,
the system usb bus latency is larger than 2.2 microseconds to access
a 1024-byte packet, to avoid underrun and overrun during the burst,
threshold and burst size control must be set through GTXTHRCFG and
GRXTHRCFG registers.

On rk3399 platforms, only a 4-packet TX FIFO and 3-packet RX FIFO
is implemented due to area constraints, so we can program the USB
Maximum TX Burst Size to 13 and the USB Transmit Packet Count to
4 to avoid TX FIFO underrun during an OUT burst. Similarly, set the
USB Maximum TX Burst Size to 10 and the USB Transmit Packet Count
to 2 to avoid RX FIFO overrrun. To enable the threshold control,
add "snps,gtx-threshold-cfg = <4>, <13>" in dts dwc3 node for Tx,
add "snps,grx-threshold-cfg = <2>, <10>" in dts dwc3 node for Rx.

Change-Id: I7535fe72e6527544a20c5921440b4888e1bada22
Signed-off-by: William Wu <william.wu@rock-chips.com>
2018-08-28 11:09:44 +08:00
William Wu
db1b25037e dt-bindings: usb: dwc3: add grx/gtx-threshold-cfg properties
Add snps,grx-threshold-cfg and snps,gtx-threshold-cfg properties
which provide values for global Rx/Tx threshold control.

Change-Id: Id470cdc8a1bcf7fe8048ecaa040f5b5662b8ce05
Signed-off-by: William Wu <william.wu@rock-chips.com>
2018-08-28 11:09:26 +08:00
Elaine Zhang
2e5468ac45 arm64: dts: rockchip: Improve the aclk_perilp0 frequency for rk3399
To improve the performance of dual USB transmission.

Change-Id: Ie20d17029e54d299cddadc7a286d9bf6c96b0fbb
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2018-08-28 11:07:05 +08:00
Jianqun Xu
00af4ed4fd dt-bindings: soc: rockchip: grf add support for rk1808
Change-Id: I59acc2aab6d117c4af96d7e1f57ef2a9b612d0ee
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2018-08-28 10:29:29 +08:00
Zhangbin Tong
b8f16e1421 arm: dts: rk3128x: Change cpu opp-microvolt form one entry to three
Single entry is for target voltage and three entries are for
<target min max> voltages. Change cpu opp-microvolt form one entry to
three entries and set maximum acceptable voltage to a high value so that
regulator device can supply multiple consumers at the same time.

Change-Id: Id74c570afe702e879504a597a3d9fb3754125f2f
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
2018-08-28 10:22:22 +08:00
Wyon Bi
cd8d9f8e04 drm/rockchip: dsi: places the phy to shutdown mode in mipi_dphy_power_off()
Change-Id: Ia6d88237d3045fab135c6be7a4afdadb8b295236
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-08-28 10:19:41 +08:00
Lin Jinhan
ed18e5b57c arm: dts: rk3308-voice-module-v10-aarch32: Enable rng
Change-Id: I7623a0fa6df690cd03e019bd12052e8a7f96599d
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2018-08-28 10:12:43 +08:00
Lin Jinhan
97e17475d2 arm64: dts: rockchip: rk3308-evb-*: enable rng
Change-Id: I2800fa3b5de0bc1e02172bbcad848cf78d320142
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2018-08-28 10:12:25 +08:00
Lin Jinhan
0f9840082f arm64: dts: rockchip: rk3308: add rng node for crypto v2 hwrng
Change-Id: I66432ed414a47dc9f7ff1145564cd696cd93805b
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2018-08-28 10:01:34 +08:00
David Wu
50301b5f0e dt-bindings: net: rockchip-dwmac: Add gmac support for rk1808
This patch adds devicetree support to gmac of rk1808 with proper
devicetree compatible strings.

Change-Id: Id35523a10f987cbb9b9c33ad32ab23cb3c6d4e2b
Signed-off-by: David Wu <david.wu@rock-chips.com>
2018-08-28 09:47:06 +08:00
Jianqun Xu
6e00cbcba1 arm64: dts: rockchip: rk1808 add iomux
Change-Id: I4b84dc830cc65792445d0d05f139025878df634c
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2018-08-28 09:45:19 +08:00
Finley Xiao
1b3dc6cdf9 Revert "Revert "arm64: dts: rockchip: rk3308-evb-v10: Add regulator-early-min-microvolt for core""
This reverts commit 46d3be8026.

This patch add a new 'regulator-early-min-microvolt' property to limit
the minimal voltage of regulator during kernel startup.

Change-Id: I580f0cceda280b9168e7f489f39785830cd28a28
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-08-28 09:43:26 +08:00
Finley Xiao
8726e76f58 Revert "regulator: of: Use regulator-init-microvolt as early minimum"
This reverts commit a4e0323d13.

If uboot needs a high cpu rate, the voltage should be set to a high
value, and the minimal voltage of regulator will also be set to this
value during kernel startup, so it will be failed to set voltage which
is less than this value when consumers change voltage, for example pvtm.

This patch add a new 'regulator-early-min-microvolt' property to limit
the minimal voltage of regulator during kernel startup and it will no
longer be restricted by uboot.

Change-Id: Ia50920b7627f886fab5c9f65a3fc19946debdff2
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-08-28 09:43:26 +08:00
Tao Huang
90cb7171b8 MALI: bifrost_for_linux: Fix build problem with O=
Change-Id: I6fdee0196ed321b23bffc6531f09c6e5885ce0a6
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-08-28 09:35:35 +08:00
Tao Huang
7a799e8df2 MALI: bifrost: Fix build problem with O=
Change-Id: I4f8625523f86b385d72857d06779669261aef6f9
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-08-28 09:24:06 +08:00
Jeffy Chen
30e452a1b0 rtc: rtc-rk-timer: Fix 64-bit counter read
Following arch_counter_get_cntvct_mem() in arm_arch_timer.c

Change-Id: I0d44edcb2cfcf2eb70aceccc57e147fa43eba34d
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
2018-08-27 20:47:36 +08:00
Lin Jinhan
0001ceeba7 arm32: rk3308_linux_aarch32_defconfig: enable HW_RANDOM and HW_RANDOM_ROCKCHIP
Change-Id: Ic6545b6a780958659c947bb2c7319af2223e6469
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2018-08-27 20:12:13 +08:00
Lin Jinhan
3f8333a3b0 arm32: rk3308_linux_aarch32_debug_defconfig: enable HW_RANDOM and HW_RANDOM_ROCKCHIP
Change-Id: Ibc6f559f022ba299d378ec9fc2fb206a095157d6
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2018-08-27 20:12:08 +08:00
Lin Jinhan
75636c57a5 arm64: rk3308_linux_defconfig: enable HW_RANDOM and HW_RANDOM_ROCKCHIP
Change-Id: I05623888fb932e8c93f26888019328bebadf4369
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2018-08-27 20:11:58 +08:00
Lin Jinhan
1f1992c51a hwrng: rockchip - add support for Rockchip HW RNG
Change-Id: Ia14bd624716eb6531ef8674843ccfbada3197d8e
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2018-08-27 20:09:18 +08:00
Lin Jinhan
2a242a1602 dt-bindings: rng: Document the Rockchip HW RNG bindings
This adds documentation of device tree bindings for the Rockchip hardware
random number generator.

Change-Id: I4548f480d5e89499f527a1f37047404b910b6c88
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2018-08-27 20:06:16 +08:00
William Wu
12d14b5959 usb: uas: Add JMicron JMS583 and CHIPFANCIER to unusual device
These two devices give the following error on detection.
Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
xhci-hcd xhci-hcd.5.auto: ERROR Transfer event for disabled endpoint
or incorrect stream ring

The same error is not seen when it is added to unusual_device
list with US_FL_NO_REPORT_OPCODES and US_FL_BROKEN_FUA passed.

Change-Id: Ia1035ea597c65ad7112f68f5cbdd792875ee2995
Signed-off-by: William Wu <william.wu@rock-chips.com>
2018-08-27 19:41:44 +08:00
Wu Liangqing
5e89a41104 arm: dts: rockchip: rk312x: remove PLL_CPLL set in cru
cpll just for display no need to init. init will result in dispaly error
in next-dev uboot

Change-Id: Ie63c8d44aa6b54fb81abfb3a32d71995b8426c7d
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2018-08-27 19:40:36 +08:00