Commit Graph

1060417 Commits

Author SHA1 Message Date
Dingxian Wen
050ba7e86a drm: rockchip: rk628: the combrxphy cable mode wait for clk to stabilize
Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com>
Change-Id: I7502b8f71f4fcc376a925045adbe6148ebdc2d3f
2021-10-19 10:49:46 +08:00
Shunqing Chen
8ba551e60d drm: rockchip: rk628: post_process: recalculate dst clock
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
Change-Id: I93388ba499f0d74c5f5c549decc83f3225ae1b82
2021-10-19 10:49:38 +08:00
Tao Huang
26b711fa00 arm64: rockchip_gki.config: Enable CONFIG_DRM_ROCKCHIP_RK628
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Iedd3a37da2c1bcdd56b29676bf6321388279e29c
2021-10-19 10:37:07 +08:00
Wyon Bi
358218bef5 drm/rockchip: Add rk628 display driver
Change-Id: I7be65c5ed58df2be2cf2cfe819feacf8a610e880
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2021-10-19 10:36:14 +08:00
Shawn Lin
6523be7278 PCI: rockchip: dw: Fix gen switch case when link is up
L0 may be detected just in time if Gen1 training is finished.
But if EP supports higher Gen mode, Gen switch just happen
there but we keep on accessing devices, which leads unstable
link state and fail to detect the device finally.

And a bit more time before accessing devices to avoid this risky
case.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: If7eddce430b4590922b5c8f765be8a240b562d92
2021-10-19 09:54:55 +08:00
Wu Liangqing
89751e3f7d arm64: dts: rockchip: rk3588-evb: add sdmmc/sdhci/saradc
Change-Id: I44235e30b8480dbd1c505595ed5b6de9366beb40
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2021-10-18 18:59:07 +08:00
Jon Lin
2fb4d11d5e mtd: spinand: Support xtx
XT26G01A, XT26G02A, XT26G04A, XT26G01B, XT26G02B, XT26G01C, XT26G02C,
XT26G04C, XT26G11C

Change-Id: I3397f0a1f29c09a10446b3838504dc77d867f124
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-10-18 18:56:19 +08:00
Jon Lin
c691a1418d mtd: spinand: winbond: Support new devices
W25N512GV, W25N02KV, W25N04KV, W25N01GW

Change-Id: If178c6cf7024ec961593b235229a9f7a4366df33
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-10-18 18:56:19 +08:00
Jon Lin
ac2cf3c621 mtd: spinand: Support unim
TX25G01

Change-Id: Ifebf63cc803870602c627c741d1cd51c65977b6b
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-10-18 18:56:19 +08:00
Jon Lin
fce55885fd mtd: spinand: Support silicongo
SGM7000I-S24W1GH

Change-Id: I8bdaa383fd5977b4ee0828a04ddc738a1af0376a
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-10-18 18:56:19 +08:00
Jon Lin
fea785563f mtd: spinand: Support jsc
JS28U1GQSCAHG-83

Change-Id: Idf5062e23ccf1174c4f3096d86ce1975dc6b5c19
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-10-18 18:56:19 +08:00
Jon Lin
96ff56ea58 mtd: spinand: Support hyf
HYF1GQ4UPACAE, HYF1GQ4UDACAE, HYF2GQ4UAACAE, HYF2GQ4UHCCAE, HYF4GQ4UAACBE

Change-Id: I173aa2fbe8275a776fd63eb9c6d29b3589b7fe1c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-10-18 18:56:19 +08:00
Jon Lin
9e2b33c54c mtd: spinand: gigadevice: Support new devices
GD5F2GQ5UExxG, GD5F2GQ4UBxxG, GD5F4GQ6UExxG, GD5F1GQ4UExxH, GD5F1GQ5RExxG,
GD5F2GQ5RExxG, GD5F2GM7RxG, GD5F2GM7UxG

Change-Id: Id2ec65a21bcdfc7687e57896513694609f34c48e
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-10-18 18:56:19 +08:00
Jon Lin
911bb5158a mtd: spinand: Support foresee
FS35ND01G-S1Y2, FS35ND02G-S3Y2, FS35ND04G-S2Y2, fsxxndxxg

Change-Id: Icdff45a209b5aa4dd2827e0e58bd543a84f9d809
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-10-18 18:56:19 +08:00
Jon Lin
205a24e347 mtd: spinand: Support fmsh
FM25S01A, FM25S02A, FM25S01

Change-Id: I7e0ceec39c57dc591d77a4ebde599ad326cf25b7
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-10-18 18:56:19 +08:00
Jon Lin
8506f6e6e7 mtd: spinand: Support etron
EM73C044VCF-0H

Change-Id: Ia61c2f4b20a1590c8208244cc984e1909108b1e1
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-10-18 18:56:19 +08:00
Jon Lin
560380d22f mtd: spinand: Support esmt
F50L1G41LB

Change-Id: I4a42522d775b511e9c049b5481ebc35e00821f95
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-10-18 18:56:19 +08:00
Jon Lin
cead43cc57 mtd: spinand: Support dosilicon
DS35X1GA, DS35Q2GA, DS35M1GA, DS35M2GA, DS35Q2GB, DS35M1GB

Change-Id: I5aeb0219f01dbe98d36b398e66b94ab31b07788e
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-10-18 18:56:19 +08:00
Jon Lin
1f221f71d8 mtd: spinand: Support biwin
BWJX08K

Change-Id: I0e269e47b264190951c19f4315706b40d3b765e5
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-10-18 18:56:19 +08:00
Shunhua Lan
cae7ca5fef ARM: dts: rockchip: rk628: add i2s mclk config and select test_clkout pin as mclk output
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: I32ef6ae68a0ffe6ac42a75de09d7995388815f03
2021-10-18 16:57:26 +08:00
Weixin Zhou
b279cde0ad ARM: dts: rockchip: rk628: Avoid namespace conflicts for pinctrl
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
Change-Id: Ibc14654e8b321daebf5b15d51c0de26acb41df91
2021-10-18 16:57:08 +08:00
Wyon Bi
923c9784a6 ARM: dts: rockchip: rk628: Avoid namespace conflicts
Add a prefix for all clocks to avoid namespace conflicts,
and no functional changes.

Change-Id: I1cf1c868f84b9bee4ba033bdd80c4995876b43f1
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2021-10-18 16:57:02 +08:00
Shunqing Chen
4d66e9d27f clk/rockchip/regmap: rk628: compatible with MCU mode
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
Change-Id: I85f2c97ac23c585fc136eb5efa4e01fde979f883
2021-10-18 16:56:49 +08:00
Wyon Bi
3082499844 clk/rockchip/regmap: rk628: Add support for clk_testout
Change-Id: I71f5ca1d4002d45438ff9d038ccc7eef5a28a857
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2021-10-18 16:56:42 +08:00
Wyon Bi
78c32c6bb6 clk/rockchip/regmap: rk628: Avoid namespace conflicts
Add a prefix for all clocks to avoid namespace conflicts,
and no functional changes.

Change-Id: I6b586ce859ecf084fe6037c10c775d6bcc78baa1
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2021-10-18 16:56:30 +08:00
Wyon Bi
ec8bb8ccf6 clk/rockchip/regmap: divider: Make round to closest divider valid
Change-Id: I6cff98ec7573f6774700bbbd2650b6e3a01b66f0
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2021-10-18 16:56:20 +08:00
Tao Huang
094029e17f arm64: rockchip_gki.config: Enable CONFIG_MFD_RK628
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ife16b13cefc172ea57c48532bfcc7a124631b032
2021-10-18 15:19:59 +08:00
Tao Huang
576a136e12 clk/rockchip/regmap: Add missing MODULE_LICENSE()
Fix build error:
ERROR: modpost: missing MODULE_LICENSE() in
drivers/clk/rockchip/regmap/clk-rockchip-regmap.o

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ic21ad1e5b9c90a91ce5b4538ba24f8b4dcbf55f9
2021-10-18 15:19:59 +08:00
Wyon Bi
52d07dc92b clk/rockchip/regmap: Add rk628 cru driver
Change-Id: Idf8d8a654c6d6d5e382f8bf591e7c9c8135ff1d4
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2021-10-18 14:59:34 +08:00
Wyon Bi
c6a27215cd pinctrl: rk628: Dynamic allocation of GPIOs
Change-Id: I7b6de3d5a1f0866fc18bd3355c44ecc0862ad800
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2021-10-18 14:59:34 +08:00
Weixin Zhou
136c56731b pinctrl: rk628: add rk628 pinctrl driver
Change-Id: If9d0fdcd63e7ceb9a52039f558961c2b67739747
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
2021-10-18 14:59:34 +08:00
Wyon Bi
3b0c20212b mfd: Add rk628 mfd driver
Change-Id: Ibf4334f82f91237bff6a04b24bb390391a5c8130
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2021-10-18 14:59:34 +08:00
Joseph Chen
1df11488e9 mfd: rk808: support power off system in syscore shutdown
For PMIC that power off supplies by write register via i2c bus,
it's better to do power off at syscore shutdown.

Because when run to kernel's "pm_power_off" call, i2c may has
been stopped or PMIC may not be able to get i2c transfer while
there are too many devices are competiting.

This patch effects on PMIC: RK808/RK818/RK816, not including RK805
which power off system by pull up pmic sleep pin in ATF.

The i2c maybe stopped before pm_power_off() is called, which
results in the PMIC power off failure issue.
Moving PMIC power off operation to syscore shutdown is better.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ib43827ebd49059719b8899f90a696b6c32a6ddd1
2021-10-18 14:47:06 +08:00
Tao Huang
270d97f40e drm/rockchip: vop2: make vop2_clk_init() static
Fix the following gcc warning:

drivers/gpu/drm/rockchip/rockchip_vop2_clk.c:304:5: warning:
no previous prototype for 'vop2_clk_init' [-Wmissing-prototypes]

Fixes: 95b6a39dab ("drm/rockchip: vop2: Add support for rk3588")
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ifc892f473a50a9e408e09648c7a6539ffda24039
2021-10-18 14:13:22 +08:00
Wyon Bi
6d06306c63 drm/rockchip: analogix_dp: Add of-alias id support
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: If7f2a6672c5450e0f2cfdd7c387f7fa045d54ba2
2021-10-18 11:20:58 +08:00
Wyon Bi
7e6860ead0 drm/rockchip: analogix_dp: Use formalized struct definition for grf field
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Iddfa5af6e8bfabb58b312661e3fb267008f27045
2021-10-18 11:20:58 +08:00
Jon Lin
0d9e33dc55 drivers: rkflash: Recheck the cache only the spinand devices in need
The operation of reading back flash cache after programing is not
universal. At present, only ESMT devices are found to have this anomaly.

Change-Id: I3ec21eebc4aa7b8a259129ed2c036e1168553f27
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-10-15 19:45:14 +08:00
Sandy Huang
4281b208cb drm/rockchip: vop: add BCSH support function
Change-Id: I17bcd5a07b93b3c68aa892606f886bcd3a7673a0
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-10-15 16:45:51 +08:00
Andy Yan
95b6a39dab drm/rockchip: vop2: Add support for rk3588
RK3588 VOP:
4 Video Ports.
4 Cluster Windows.
4 Esmart Windows.

Can drive HDMI/eDP/DP/MIPI/BT1120/BT656 interface.

Support drive HDMI/DP 8k output in splice mode.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I37df329fcab729cd7fa1de47c4d5faf232bb265f
2021-10-15 16:39:03 +08:00
Ding Wei
472cb33488 video: rockchip: mpp: Use spinlock for queue->running_lock
reason: mpp_iommu_handle is called by irq for iommu, thus it cannot
use mutex which might case sleep, thus use spinlock instead.

Call trace:
[   71.047958 ] Call trace:
[   71.047974 ]  dump_backtrace+0x0/0x160
[   71.047988 ]  show_stack+0x14/0x1c
[   71.048003 ]  dump_stack+0xd0/0x120
[   71.048018 ]  ___might_sleep+0x1f4/0x204
[   71.048032 ]  __might_sleep+0x4c/0x80
[   71.048045 ]  __mutex_lock_common+0x60/0x1028
[   71.048057 ]  mutex_lock_nested+0x28/0x30
[   71.048073 ]  mpp_iommu_handle+0x44/0x1c8
[   71.048088 ]  report_iommu_fault+0x3c/0x198
[   71.048102 ]  rk_iommu_irq+0x2a4/0x3bc
[   71.048117 ]  __handle_irq_event_percpu+0x114/0x3c4
[   71.048131 ]  handle_irq_event+0x5c/0xd0
[   71.048143 ]  handle_fasteoi_irq+0x124/0x220
[   71.048156 ]  __handle_domain_irq+0x9c/0xf4
[   71.048169 ]  gic_handle_irq+0x108/0x180
[   71.048181 ]  el1_irq+0xec/0x1a0
[   71.048194 ]  _raw_spin_unlock_irqrestore+0x3c/0x78
[   71.048209 ]  vop2_crtc_atomic_flush+0x1c78/0x202c
[   71.048223 ]  drm_atomic_helper_commit_planes+0x1a4/0x210
[   71.048238 ]  rockchip_atomic_commit_complete+0x1a4/0x390
[   71.048252 ]  rockchip_drm_atomic_commit+0x22c/0x24c
[   71.048266 ]  drm_mode_atomic_ioctl+0xa18/0xddc
[   71.048280 ]  drm_ioctl+0x2d8/0x46c
[   71.048296 ]  do_vfs_ioctl+0x4dc/0x794
[   71.048308 ]  __arm64_sys_ioctl+0x70/0x98
[   71.048322 ]  el0_svc_common+0xa0/0x18c
[   71.048335 ]  el0_svc_handler+0x28/0x60
[   71.048348 ]  el0_svc+0x8/0xc

Change-Id: Ie8e79995ec4bebf4ccbb509a57306541de861754
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2021-10-15 15:50:06 +08:00
Algea Cao
7fbb80db46 drm/rockchip: dw_hdmi: Allow rk3399 hdmi output yuv420
Fixes: 4035588f0f ("drm/rockchip: dw-hdmi: Add ycbcr_420_allowed to hdmi plat data")
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: If88f499ff15ba599e6749eb94d86ba9b2c234b48
2021-10-14 18:48:43 +08:00
Yakir Yang
1ac95182fa arm64: dts: rockchip: add HDMI DDC pinctrl for RK3399 HDMI
Default to enable the HDMI DDC internal module.

Change-Id: I14e4e3f0b5abb37eb0bb4451e2fcf48bceb3e3b2
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
2021-10-14 18:46:13 +08:00
Guochun Huang
b4a8234b53 drm/bridge: dw-mipi-dsi: make video and cmd mode option
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I6be01c00ddfd10d49aef3f44cb07406f679007ad
2021-10-14 15:40:39 +08:00
Jon Lin
4f59a48ae3 spi: rockchip_sfc: Select ROCKCHIP_MTD_VENDOR_STORAGE
Enable the corresponding vendor driver

Change-Id: Ica177c2d3abc92c560c4c86b9a6f23cffc85e6c1
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-10-14 15:40:04 +08:00
Wu Liang feng
cf58b928de usb: dwc3: fix PM resume error for rockchip platforms
We enable PM runtime auto suspend on rockchip platforms
(e.g. RK3399), it allows the DWC3 controller to enter
runtime suspend if usb cable detached. So if the dwc3
is already in PM runtime suspend, we don't need to do
anything in dwc3_suspend() and dwc3_resume() which
duplicated the same operations as dwc3_runtime_suspend()
and dwc3_runtime_resume().

This patch can help to avoid kernel panic if accessing
the DWC3 registers in dwc3_resume() when the DWC3 is in
PM runtime suspend and it's power domain is power off.

Kernel panic - not syncing: Asynchronous SError Interrupt
CPU: 1 PID: 707 Comm: Binder:236_2 Not tainted 5.10.43 #270
Hardware name: Rockchip RK3566 RK817 TABLET LP4X Board (DT)
Call trace:
 dump_backtrace+0x0/0x1c0
 show_stack+0x18/0x24
 dump_stack_lvl+0xc8/0x104
 dump_stack+0x18/0x5c
 panic+0x14c/0x390
 test_taint+0x0/0x30
 arm64_serror_panic+0x74/0x80
 do_serror+0xd8/0xf8
 el1_error+0x94/0x118
 el1_abort+0x3c/0x60
 el1_sync_handler+0x48/0x84
 el1_sync+0x8c/0x140
 dwc3_phy_setup+0x24/0x50c
 dwc3_core_init+0x50/0xf40
 dwc3_core_init_for_resume+0x64/0x274
 dwc3_resume_common+0x3c/0x274
 dwc3_resume+0x28/0x64
 dpm_resume+0x134/0x568

Change-Id: I63e734f51b05274251d8a88a664eee768568eb7b
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
2021-10-14 15:34:12 +08:00
Marian-Cristian Rotariu
1257643ab1 UPSTREAM: usb: dwc3: ep0: fix NULL pointer exception
There is no validation of the index from dwc3_wIndex_to_dep() and we might
be referring a non-existing ep and trigger a NULL pointer exception. In
certain configurations we might use fewer eps and the index might wrongly
indicate a larger ep index than existing.

By adding this validation from the patch we can actually report a wrong
index back to the caller.

In our usecase we are using a composite device on an older kernel, but
upstream might use this fix also. Unfortunately, I cannot describe the
hardware for others to reproduce the issue as it is a proprietary
implementation.

[   82.958261] Unable to handle kernel NULL pointer dereference at virtual address 00000000000000a4
[   82.966891] Mem abort info:
[   82.969663]   ESR = 0x96000006
[   82.972703]   Exception class = DABT (current EL), IL = 32 bits
[   82.978603]   SET = 0, FnV = 0
[   82.981642]   EA = 0, S1PTW = 0
[   82.984765] Data abort info:
[   82.987631]   ISV = 0, ISS = 0x00000006
[   82.991449]   CM = 0, WnR = 0
[   82.994409] user pgtable: 4k pages, 39-bit VAs, pgdp = 00000000c6210ccc
[   83.000999] [00000000000000a4] pgd=0000000053aa5003, pud=0000000053aa5003, pmd=0000000000000000
[   83.009685] Internal error: Oops: 96000006 [#1] PREEMPT SMP
[   83.026433] Process irq/62-dwc3 (pid: 303, stack limit = 0x000000003985154c)
[   83.033470] CPU: 0 PID: 303 Comm: irq/62-dwc3 Not tainted 4.19.124 #1
[   83.044836] pstate: 60000085 (nZCv daIf -PAN -UAO)
[   83.049628] pc : dwc3_ep0_handle_feature+0x414/0x43c
[   83.054558] lr : dwc3_ep0_interrupt+0x3b4/0xc94

...

[   83.141788] Call trace:
[   83.144227]  dwc3_ep0_handle_feature+0x414/0x43c
[   83.148823]  dwc3_ep0_interrupt+0x3b4/0xc94
[   83.181546] ---[ end trace aac6b5267d84c32f ]---

Change-Id: Iad43f5d46dfd81cabac976f7a65410ecc8a4fcd4
Signed-off-by: Marian-Cristian Rotariu <marian.c.rotariu@gmail.com>
Cc: stable <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20210608162650.58426-1-marian.c.rotariu@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit d00889080a)
2021-10-14 15:34:12 +08:00
Zefa Chen
2dd7f5f53f media: rockchip: cif fix issue for CONFIG_ROCKCHIP_IOMMU=n
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I6914ac32bcef7c56eabe6bef9b9acce68615cbc7
2021-10-14 11:02:24 +08:00
Yiqing Zeng
8164b072b3 media: rockchip: cif: fix pm runtime error
at a high frame rate (120fps), the fast switch test has a higher probability of the following errors:
Failed to get runtime pm, -22

Signed-off-by: Yiqing Zeng <zack.zeng@rock-chips.com>
Change-Id: I6d9fdd86cc69368ba340ab7e43d2b6030a72ce8c
2021-10-14 11:02:17 +08:00
Zefa Chen
816f07cba2 media: rockchip: when cif triggers a reset, redefine the timer after reset
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I3dd12ba2d5f1a6d5a4f77e70b756aba9eaaea98f
2021-10-14 11:02:12 +08:00
Zefa Chen
c3cf62a20e media: rockchip: cif optimized buf rotation
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I2e188e2709e20a31eb060ee752de31653eab99df
2021-10-14 10:57:44 +08:00