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Author SHA1 Message Date
Hu Kejun
06ec79c3ad media: rockchip: phy: Support for RK1808 
Change-Id: I02a27e9c829515fe16876fc228b2107e83603daf
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
 2018-10-16 10:13:07 +08:00
Hu Kejun
c2c26aab99 dt-bindings: media: add rkisp1 for rk1808 
Change-Id: If59a6fbb62dbd03c88e282c925bbb98efc8d8cc0
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
 2018-10-16 10:13:07 +08:00
Hu Kejun
9abbe8e1c6 dt-bindings: media: add mipi rx dphy for rk1808 
Change-Id: I88d7ff22df8bcf722545179f3dd26d094b76bd21
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
 2018-10-16 10:13:07 +08:00
Tao Huang
2de1fc7a45 arm64: rk1808_linux_defconfig: enable PCIE 
Change-Id: Ice1ea0494ceac7c570c38510cce448295696b24c
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
 2018-10-15 18:39:15 +08:00
Ziyuan Xu
ea92b57bc0 clk: rockchip: rk1808: fix mmc clock mux configuration 
The mmc_clk has four selection for parent pll. The original
configuration fix the parent to GPLL that causes the mmc_clk can't
assign to a precision of 400KHz.

[    6.569962 ] mmc_host mmc2: Bus speed (slot 0) = 2320312Hz (slot req
400000Hz, actual 386718HZ div = 3)

Change-Id: Ie3f74de79ac1e5f455e829b1b361200ad8b33db2
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
 2018-10-15 17:56:21 +08:00
Elaine Zhang
237c632223 clk: rockchip: fix up the pr_err for fractional div is not allowed 
This pr_err print has some misunderstandings.
Although fractional div is not allowed,
But may be integer or half-divider can be
precisely assigned to the desired frequency.

Change-Id: Iec5d99edcc2b9e875c1d45b7464881ab389c356e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2018-10-15 14:44:28 +08:00
Huibin Hong
699c56f7ed arm64: dts: rockchip: fix uart pinctrl for rk1808 
Change-Id: Icc4b3c70926db37ef63d9d496958a46ed18a672d
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
 2018-10-15 10:37:54 +08:00
Finley Xiao
6598bfd2a5 arm64: dts: rockchip: rk3308: Modify pvtm voltage selector map table 
Change-Id: I8a10087a758ab1c905d5d6395ddc45ebda53814d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2018-10-15 10:32:03 +08:00
Jianqun Xu
9d63b7363d arm64: dts: rockchip: remove io-domain/pmu-io-domain for rk1808 
RK1808 SoCs support Auto-selection feature, which descript by
PMU_GRF_IO_VSEL1.

Change-Id: I43a240306d95b686b9801d2fe2a2a6f141ec2834
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
 2018-10-15 10:29:37 +08:00
Huibin Hong
d652b183b3 arm64: dts: rockchip: disable uart and spi dma for rk1808 
There is only one dmac of rk1808, but more than 30 peripheral
may use dma, so disable uart and spi dma as default. Enable it
by property below:
dma-names = "tx", "rx";

Change-Id: I67347c1459a1a11efa00b08cf21273175b6028a0
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
 2018-10-15 10:26:41 +08:00
Hu Kejun
83bf424780 media: i2c: add g_frame_interval function 
Change-Id: Iae23985499357d9e544bd94ed779ca4742e49c42
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
 2018-10-15 09:39:14 +08:00
Bian Jin chen
1481e8ff9f arm64: dts: rockchip: rk3326-863-lp3-v10-avb: compatible with emmc and nand. 
Android init will access "/proc/device-tree/firmware/android/boot_devices",
    then create symlinks for fstab:
dev/block/by-name/partition -> dev/block/type/${boot_devices}/by-name/partition

Change-Id: I1573686ea53a5226995b4d65a85636fcdd848dfa
Signed-off-by: Bian Jin chen <kenjc.bian@rock-chips.com>
 2018-10-12 19:16:49 +08:00
David Wu
56850f2349 pinctrl: rockchip: Add spi1/spi2 route select function for rk1808 
Change-Id: I127972134329f4877b8bd456b489c1ae7827eafe
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2018-10-12 19:07:33 +08:00
David Wu
0d9f037d82 picntrl: rockchip: fix pull register offset for rk1808 
Change-Id: Ie7f6c1129e831fed1fad5751039a99e98a493f9e
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2018-10-12 19:06:12 +08:00
Shixiang Zheng
9995649b15 arm64: dts: rockchip: enable rga device node for rk1808-evb-v10 
Change-Id: I466e7b1a7ac7944fa2b63e850c48eadee279f6f1
Signed-off-by: Shixiang Zheng <shixiang.zheng@rock-chips.com>
 2018-10-12 19:02:09 +08:00
Shixiang Zheng
d1df8bb20e arm64: dts: rockchip: add rga node for rk1808 
Change-Id: I526781fc6716276ad0500e8d7615361f77dc031a
Signed-off-by: Shixiang Zheng <shixiang.zheng@rock-chips.com>
 2018-10-12 19:01:41 +08:00
Ziyuan Xu
e919ced3e4 arm64: rk1808_linux_defconfig: disable CONFIG_PHY_ROCKCHIP_EMMC 
The rockchip-emmc-phy driver is used for rk3399, so disable it
for rk1808.

Change-Id: I1642ff07b8749a1487b5515f86dfb1161151409d
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
 2018-10-12 11:54:51 +08:00
Ziyuan Xu
4ef2449889 clk: rockchip: fix wrong mmc phase shift for rk3328 
mmc sample shift is 0 for rk3328 refer to user manaul.
So it's broken if we enable mmc tuning for rk3328.

Change-Id: I863204b94be29842294597b1a1e10b3d7840e8d8
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
 2018-10-12 11:26:49 +08:00
Sandy Huang
ad4dadaa24 drm/rockchip: csi tx: enable irq for debug 
Change-Id: I406abc16268a70ef4e69dbbf434deef103f32149
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
 2018-10-12 11:26:33 +08:00
Jianqun Xu
fb4f9d860b pinctrl: rockchip: fix rk1808_mux_route_data 
Fix rk1808_mux_route_data, support:
i2c2m0_sda
i2c2m1_sda
uart1_rxm0
uart1_rxm1
uart2_rxm0
uart2_rxm1
uart2_rxm2

Tested on RK1808-evb.

Change-Id: Iea221a5cab8a63e336e183d30f3faaffb3a14873
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
 2018-10-12 11:06:38 +08:00
Tao Huang
5b5a08939a arm64: rk1808_linux_defconfig: disable unused ethernet driver 
Change-Id: I7c0f1605c1082b940301ac7aca4e77b6dc00e553
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
 2018-10-12 10:20:31 +08:00
Liang Chen
1b18665d28 arm64: dts: rockchip: rk1808: Add pvtm node 
Change-Id: Ifba22d49d08cea1897a963b4ab1bc43791e78032
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2018-10-12 09:46:22 +08:00
Liang Chen
212bbd910c dt-bindings: soc: rockchip: add pvtm for rk1808 SoCs 
Change-Id: I89c153f98d027e6e0b5d9b1816c70f3ec2c66f6d
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2018-10-11 21:31:28 +08:00
Liang Chen
cae46ca822 soc: rockchip: pvtm: Add support for RK1808 SoCs 
This adds the necessary data for handling pvtm on the rk1808.

Change-Id: Ic283bd854f43a8b46722d28008856005bec3582b
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2018-10-11 21:23:38 +08:00
Liang Chen
0c08c32cae dt-bindings: soc: rockchip: add coregrf compatible string for rk1808 
Change-Id: I55687ca089a43e9b3d8f293717747866e33e77cc
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2018-10-11 21:22:04 +08:00
Sandy Huang
927d98bf4f drm/rockchip: rk1808 vop: update vop raw max input and output 
rk1808 vop raw max input and output resolution is 5120x2880.

Change-Id: Idf6bca98b03c913878ae950e55722b5204958990
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
 2018-10-11 20:57:25 +08:00
Sandy Huang
670d74a8a5 drm/rockchip: csi tx: define mipi csi tx raw format 
Change-Id: Ib3e1202d91a46db88616edfe70be4ba46eb5a721
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
 2018-10-11 20:57:05 +08:00
Liang Chen
bb19e4692c arm64: dts: rockchip: rk1808: Add watchdog node 
Change-Id: I1986d09ab35c5c0b7cb5ec77a1a5b767325ca03b
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2018-10-11 20:49:39 +08:00
Shixiang Zheng
0fb4dd2ca8 video/rockchip: rga2 && rga add debug nod and some auto check case and combine rga version 
add rga debug node rga1: d/rga_debug/rga rga2: d/rga2_debug/rga2
auto check case :align check,scale check,memory check.
combine rga version from kernel 3.1 and 4.4 into one version by macro definition.

Change-Id: I97f7d9c670f81ae13768029126f7dbd6976c79f1
Signed-off-by: Shixiang Zheng <shixiang.zheng@rock-chips.com>
 2018-10-11 20:40:00 +08:00
David Wu
93bdae5de9 arm64: configs: Enable ethernet for rk1808_linux_defconfig 
Change-Id: Icf1ac7b0584598fd2885112837711a9057360d0b
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2018-10-11 20:38:11 +08:00
David Wu
c9b578b5cc arm64: dts: rockchip: Add gmac support for rk1808-evb 
Change-Id: Iba573b78dfe46d7278d6a425da56dd2d35114e32
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2018-10-11 20:37:47 +08:00
David Wu
865e382104 arm64: dts: rockchip: Change the gmac tx drive strength to 8ma for rk1808 
Change-Id: I094517b037b8c814923e65613f7830ee7fd7b2bd
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2018-10-11 20:37:31 +08:00
Cai YiWei
a4bb4f5d2c media: rockchip: isp1: fix cplanes address calculation error 
for multiple cplane:
cplane 0 addr: Y addr + Y size
cplane 1 addr: cplane 0 addr + cplane 0 size
and cplane size refer to xysubs

Change-Id: I50dbb0175f04452c62dd327f73ede1ca4a2d2ad7
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2018-10-11 18:42:42 +08:00
Ziyuan Xu
10dbf59d3f iio: light: vl6180: add something initialization from vendor 
Change-Id: I77ca2c836c998be5158e222909834bda8bb24245
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
 2018-10-11 18:36:09 +08:00
Ziyuan Xu
b2950611bb arm64: configs: rk1808_linux: enable CONFIG_SND_SOC_RK817 
Change-Id: I23c5619e8d9b1b4366eb11ffb262f7b73e50c7e8
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
 2018-10-11 18:27:25 +08:00
Ziyuan Xu
faa5c25228 arm64: configs: rk1808_linux: update form savedefconfig 
Change-Id: Ie7ff945938fdad3a4ba1b565eb899afd224e36fa
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
 2018-10-11 18:27:25 +08:00
Wyon Bi
b9c21ec37c drm/rockchip: lvds: check PLL lock state before enable tx 
Change-Id: I299d93f89ec52d3778bc2b18cb9105f9910dd5fc
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
 2018-10-11 16:18:38 +08:00
Tao Huang
f125bf6b07 soc: rockchip: remove default y for CPU_RK3308 
Change-Id: I79330a302596e6c1a433a2b6db0e4d141975fa59
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
 2018-10-11 15:12:13 +08:00
Tao Huang
3bd8e047d3 soc: rockchip: remove default y for CPU_RV110X 
Change-Id: Ib423c7c60502c566da1e5c36fb6712f508c8b9b5
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
 2018-10-11 15:07:25 +08:00
Tao Huang
b47bc74541 soc: rockchip: remove default y for CPU_RK1808 
Change-Id: I637197b927a243e9403719ccdcad426e61f0db34
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
 2018-10-11 15:06:48 +08:00
Tao Huang
29f42eb299 ARM: rk3308_linux_aarch32_debug_defconfig: enable CRYPTO_LZ4 
Keep support lz4 compression for zram

Fixes: 30a850bbf1 ("UPSTREAM: zram: delete custom lzo/lz4")
Change-Id: I0f2bd3404b2532ead9340ee6bf4ad66fc0309ba2
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
 2018-10-11 14:36:45 +08:00
Tao Huang
5e2493f821 ARM: rk3308_linux_aarch32_defconfig: enable CRYPTO_LZ4 
Keep support lz4 compression for zram

Fixes: 30a850bbf1 ("UPSTREAM: zram: delete custom lzo/lz4")
Change-Id: I79170f53ab92d17586af9226e4472e20f6894ee5
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
 2018-10-11 14:36:45 +08:00
Wyon Bi
b0c9700602 drm/bridge: analogix_dp: remove dead codes 
Change-Id: I8ec07028d911d48756fd5ce59ca4fd6e544230b5
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
 2018-10-11 14:13:47 +08:00
Wyon Bi
289059c61b drm/bridge: analogix_dp: rework hpd gpio detection 
Change-Id: I0d62201095ab82f5ed0ddcfd53abaef6089a2e9d
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
 2018-10-11 14:13:07 +08:00
Tao Huang
828b971fb0 soc: rockchip: remove default y for CPU_RK3366 
Change-Id: Idfca39cc6261c951b87a50366334e6cda2aafa63
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
 2018-10-11 14:08:53 +08:00
Wyon Bi
357b22cca8 drm/bridge: analogix_dp: Fix AUX CH not work properly when disabled the rockchip logo 
Fixes: 44f714e435 (drm/analogix: dp: remove some function which cause loader logo flash)
Change-Id: Ia4d999ce4287e75fd23c4920e1b4e07e7004f4aa
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
 2018-10-11 12:13:59 +08:00
Wyon Bi
e82ecb98b4 drm/bridge: analogix_dp: Fix unbalanced phy_power_on 
Change-Id: I25b6967f651e2eab9a10029f4b241b8ed8d50b59
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
 2018-10-11 12:13:45 +08:00
Wyon Bi
77ec03b5af drm/rockchip: edp: Fix unbalanced power status 
Change-Id: I85f2c9b051a0933a13a709ad8eb27bc2c4a2b990
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
 2018-10-11 12:13:14 +08:00
Lin Huang
0ab00aeb46 UPSTREAM: drm/bridge: analogix_dp: Move enable video into config_video() 
We need to enable video before analogix_dp_is_video_stream_on(), so
we can get the right video stream status.

We needed to increase the delay in the timeout loop because there is
random "Timeout of video streamclk ok" message happen when debug edp
panel, this time do not define in the spec.

Cc: 征增 王 <wzz@rock-chips.com>
Cc: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180423105003.9004-2-enric.balletbo@collabora.com

Change-Id: I46ed11886a0e82a7d61bdb968ff1ea357a662d0a
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(cherry picked from commit 93cba9dab1)
 2018-10-11 12:11:58 +08:00
Sylwester Nawrocki
836ec984e2 UPSTREAM: drm/bridge: analogix: Remove unreachable code from analogic_dp_core.c 
This patch removes an unreachable code found by the SVACE static
analysis:

UNREACHABLE_CODE: This statement in the source code might be unreachable
during program execution.
[unreachable] unreachable at drivers/gpu/drm/bridge/analogix/analogix_dp_core.c:787
retval != 0 is always false because at this program point the variable retval
is always equal to 0 at drivers/gpu/drm/bridge/analogix/analogix_dp_core.c:786

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20171212112037.13107-1-s.nawrocki@samsung.com

Change-Id: Ia96459ce8bdd5062f7c51921837462c84586d0cf
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(cherry picked from commit c4712f27be)
 2018-10-11 12:11:58 +08:00