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Author SHA1 Message Date
Cai Wenzhong
121d6e9be0 media: i2c: maxim: driver version v3.07.00 
Signed-off-by: Cai Wenzhong <cwz@rock-chips.com>
Change-Id: Idfd53c2055d8496efd4624f1aaaa6fda0397cfcf
 2024-07-02 18:57:05 +08:00
Cai Wenzhong
c7c244ff39 media: rockchip: vicap fixes set stream order error when suspend 
1. suspend: sditf sensor off, then terminal sensor off
2. resume: terminal sensor on, then sditf sensor on

Signed-off-by: Cai Wenzhong <cwz@rock-chips.com>
Change-Id: I762a2b66e17f4d4016e9d4fd8f0289a3c287f519
 2024-07-02 18:57:05 +08:00
Cai Wenzhong
f2d24b9d54 gpio: nca9539: suspend and resume using SET_LATE_SYSTEM_SLEEP_PM_OPS 
Signed-off-by: Cai Wenzhong <cwz@rock-chips.com>
Change-Id: I5dc1d2ad9b80d5aa5245866759902328d805f531
 2024-07-02 18:57:05 +08:00
Cody Xie
907e477376 gpio: nca9539: Add Runtime PM APIs 
Change-Id: If4c20ead4a2273ec281f8ea69ed5306f18e72f5d
Signed-off-by: Cody Xie <cody.xie@rock-chips.com>
Signed-off-by: Cai Wenzhong <cwz@rock-chips.com>
 2024-07-02 15:02:18 +08:00
Damon Ding
b054d2c768 arm64: dts: rockchip: rk3568: disable lvds1_in_vp1/lvds1_in_vp2 by default 
Fixes: 5f0fc285ff32 ("arm64: dts: rockchip: add dual lvds support for rk3567/rk3568")
Change-Id: Ie2c7ea76bdfcc29c5a28ed373ead0a00dde911a1
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
 2024-07-02 09:26:15 +08:00
Xueman Ruan
cdc9ee0588 video: rockchip: mpp: fix iep2 page-fault issue 
The issue occurs when mode is I1O1T in 1080p.

Change-Id: I3ac5167d1bf0eb13dd4b48056f38bee3cf0dedf1
Signed-off-by: Xueman Ruan <xueman.ruan@rock-chips.com>
 2024-07-01 09:53:24 +08:00
Elon Zhang
8449b4d2c2 crypto: rockchip: fix asn1 files dependence error 
rk_crypto_v2_akcipher.c require asn1 files but not rk_crypto_ecc.c,
avoid compile errors like below:

drivers/crypto/rockchip/rk_crypto_v2_akcipher.c:21:10: fatal error: rk_sm2signature.asn1.h: No such file or directory
   21 | #include "rk_sm2signature.asn1.h"
      |          ^~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
make[5]: *** [scripts/Makefile.build:250: drivers/crypto/rockchip/rk_crypto_v2_akcipher.o] Error 1
make[4]: *** [scripts/Makefile.build:500: drivers/crypto/rockchip] Error 2
make[3]: *** [scripts/Makefile.build:500: drivers/crypto] Error 2

Fixes: 743c5b92ab ("crypto: rockchip: add ECC/SM2 support")
Signed-off-by: Elon Zhang <zhangzj@rock-chips.com>
Change-Id: Id28fa9fdc21ea9cd56a73ece2baef512dc304925
 2024-06-29 18:55:04 +08:00
Sandy Huang
db7fd2993d drm/rockchip: vop2: fbc vir height should aligned as block height 
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I144728c4a98b64709aaf5ccb5fda9dd43062204b
 2024-06-28 20:08:39 +08:00
Lin Jinhan
743c5b92ab crypto: rockchip: add ECC/SM2 support 
Add support for the following algorithms:

    1. ecdsa-nist-p192
    2. ecdsa-nist-p224
    3. ecdsa-nist-p256
    4. sm2

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: Id58c7755a78293ccb6bfba2a781587922876d5bc
 2024-06-28 17:04:49 +08:00
Mingwei Yan
0426bfc39b media: rockchip: vpss: fix switch scl params irq wrong 
Signed-off-by: Mingwei Yan <mingwei.yan@rock-chips.com>
Change-Id: I68bdd03f6bff412a131099eaba8d160e89a0b6fa
 2024-06-28 17:04:49 +08:00
Finley Xiao
b04747085f arm64: dts: rockchip: rk3576: Change opp table for cpu gpu and npu 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I433b5b8189fb542a5a73298f4db80ed40e5131a6
 2024-06-28 17:04:49 +08:00
Finley Xiao
b7e25db5d0 MALI: bifrost: Add set soc info for rk3576 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I6d6d617a0be67c80e6119fcb291710161497b187
 2024-06-28 17:04:48 +08:00
Finley Xiao
a911fef70d driver: rknpu: Add set soc info for rk3576 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ifc31a47c9c75e72ea2cc09fcd2c1a70ab664d1c8
 2024-06-28 17:04:48 +08:00
Finley Xiao
0af1954a8d cpufreq: rockchip: Add set soc info for rk3576 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ifbaa8d8f2f40ef1828e3844e8e9897ab65eda92e
 2024-06-28 17:04:48 +08:00
Finley Xiao
404d56f2e0 soc: rockchip: opp_select: Implement rockchip_opp_set_low_length() 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I17b57fe52bd764deec1400c88ac49a24b25ccaeb
 2024-06-28 17:04:48 +08:00
Finley Xiao
a89ecfeca2 arm64: dts: rockchip: rk3576: Change ddr and logic voltage 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I20010a5874130865989f61bb58f1f581cc4af107
 2024-06-28 17:04:48 +08:00
Yifeng Zhao
238ecdec05 scsi: ufs: rockchip: modify MPHY configuration based on signal testing 
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I6ec2bbf2e33279c3451ff91a55a8312da6d1c4c5
 2024-06-28 17:04:48 +08:00
Algea Cao
85ebb3a26d drm/rockchip: dw-hdmi-qp: Fix crash caused by excessive memory usage when resume 
Each time edid is parsed, all resolutions are added to
connector->probed_modes. drm_connector_list_update() must
be called, it will remove useless modes. Otherwise
connector->probed_modes will continue to expand.

Change-Id: Ie61db721fa34e1cabc20209d87273e1b578ed36f
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
 2024-06-27 17:27:28 +08:00
Algea Cao
70fc302a5b drm/rockchip: dw-hdmi-qp: Fix hpd irq mute after resume 
Change-Id: I027005f7978b8a2e2f8e2eada97b7f6e6a0adb18
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
 2024-06-27 17:27:28 +08:00
Wang Panzhenzhuan
ad3c91351d arm64: dts: rockchip: rk3399-evb-ind-lpddr4-android: add gc8034 config 
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I99e44cd0212e2a7d3a3e74ec528dae379f3930b5
 2024-06-27 15:33:13 +08:00
Wang Panzhenzhuan
99ada5d52a media: i2c: vm149c: fix compile error 
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I12cb08d62125eedafe6a37505e76d14e2a0cd6c7
 2024-06-27 15:32:27 +08:00
Wang Panzhenzhuan
955676e81e arm64: dts: rockchip: rk3399-evb-ind-lpddr4-android: remove unused sgm3784 
rk3399-evb-ind board's gpio is not connected to control sgm3784,
so remove it

Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I6e874c94fc5db82daa3b9f67adc5f5da51731390
 2024-06-27 14:43:47 +08:00
Lin Jinhan
4ec4520de8 arm64: dts: rockchip: rk3576-evb: default enable crypto module 
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: I574407779de900962757332f80ab6b7c0dd06df6
 2024-06-26 16:17:21 +08:00
Lin Jinhan
2fde6adc97 crypto: rockchip: Optimized the exception handling of clock enable failure 
[    1.951687][    T1] rk-crypto 2a400000.crypto: invalid resource
[    1.951972][    T1] Failed to prepare clk 'aclk': -95
[    1.951989][    T1] rk-crypto 2a400000.crypto: failed to enable clks -95
[    1.952221][    T1] ------------[ cut here ]------------
[    1.952231][    T1] clk_pka_crypto_ns already disabled
[    1.952272][    T1] WARNING: CPU: 0 PID: 1 at drivers/clk/clk.c:1040 clk_core_disable+0x88/0x220
[    1.952295][    T1] Modules linked in:
[    1.952308][    T1] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 6.1.75 #1956
[    1.952321][    T1] Hardware name: Rockchip RK3576 EVB1 V10 Board (DT)
[    1.952331][    T1] pstate: 604000c5 (nZCv daIF +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[    1.952344][    T1] pc : clk_core_disable+0x88/0x220
[    1.952358][    T1] lr : clk_core_disable+0x88/0x220
[    1.952371][    T1] sp : ffffffc00a48b740
[    1.952380][    T1] x29: ffffffc00a48b740 x28: 0000000000000001 x27: ffffffc009704780
[    1.952398][    T1] x26: 0000000000000001 x25: ffffffc00a25d838 x24: ffffffc009704dd0
[    1.952415][    T1] x23: ffffff80c0368000 x22: ffffffc00a3ef000 x21: ffffffc00a3ef000
[    1.952432][    T1] x20: ffffff80c0172e00 x19: ffffff80c0172e00 x18: ffffffc00a4650c0
[    1.952449][    T1] x17: 0000000000000013 x16: ffffffffffffffff x15: 0000000000000004
[    1.952466][    T1] x14: ffffffc009f8d6e0 x13: 0000000000003fff x12: 0000000000000003
[    1.952483][    T1] x11: 00000000ffffbfff x10: c0000000ffffbfff x9 : 0c33c05c11861400
[    1.952500][    T1] x8 : 0c33c05c11861400 x7 : 205b5d3133323235 x6 : 392e31202020205b
[    1.952517][    T1] x5 : ffffffc00a3c0617 x4 : ffffffc00a48b477 x3 : 0000000000000000
[    1.952533][    T1] x2 : 0000000000000000 x1 : ffffffc00a48b4e0 x0 : 0000000000000022
[    1.952551][    T1] Call trace:
[    1.952560][    T1]  clk_core_disable+0x88/0x220
[    1.952573][    T1]  clk_core_disable_lock+0x9c/0x130
[    1.952586][    T1]  clk_disable+0x20/0x2c
[    1.952597][    T1]  clk_bulk_disable+0x2c/0x48
[    1.952613][    T1]  rk_crypto_release+0x24/0x40
[    1.952626][    T1]  rk_crypto_register+0x1b0/0x2b8
[    1.952638][    T1]  rk_crypto_probe+0x398/0x3f4

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: I34c41cea4844fdac28051401c472358c9e8042ea
 2024-06-26 16:17:09 +08:00
Rimon Xu
3a151492f1 video: rockchip: vtunnel: return error when no unused buffer 
When the number of queue buffer operations greatly exceeds the number
of deque buffer operations, the available buffers in the pool may be
exhausted, resulting in queue buffer or cancel buffer failures. However,
this error was not intercepted previously, leading to a crash.

Change-Id: Iad6f4146bf6d2685f7534185835ebc512117da4e
Signed-off-by: Rimon Xu <rimon.xu@rock-chips.com>
 2024-06-26 10:37:25 +08:00
Wang Panzhenzhuan
54233dfbc5 media: i2c: ov08d10: add delay to fix probability reg write failed 
1. add delay in setting to fix probability reg write failed
2. remove duplicate global register setting.

Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I8381c9b03480de4119abe225e1ef561a51dec59b
 2024-06-25 16:58:36 +08:00
Yifeng Zhao
75dfde714b mmc: sdhci-dwc: Fix SDHCI_RESET_ALL for CQHCI for rk35xx 
For rockchip sdhci controllers, SDHCI_RESET_ALL resets also CQHCI registers.
Normally, SDHCI_RESET_ALL is not used while CQHCI is enabled, but that can
happen on the error path. e.g. if mmc_cqe_recovery() fails, mmc_blk_reset()
is called which, for a eMMC that does not support HW Reset, will cycle the
bus power and the driver will perform SDHCI_RESET_ALL.

So whenever performing SDHCI_RESET_ALL ensure CQHCI is deactivated.
That will force the driver to reinitialize CQHCI when it is next used.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Iee491501ff7e32e347303f5389f22eef9f8f658b
 2024-06-25 10:04:56 +08:00
Shunhua Lan
95d65f02d0 arm64: dts: rockchip: rk3588-evb: add sleep property for pa control 
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: I4652bf8e47ce7528a6545263634ddcd45793b1d2
 2024-06-24 21:29:53 +08:00
Shunhua Lan
6e52c0b64a arm64: dts: rockchip: rk3576-evb: add sleep property for pa control 
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: Ia77cb684ef69a642be62be3f291fe3a43e0ee4c2
 2024-06-24 21:29:53 +08:00
Shunhua Lan
e6f3623149 ASoC: rockchip: multicodecs: add sleep time for pa gpio control to depop 
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: I5f6fe5f5727734caf5b6c58935dc3bd131380ae7
 2024-06-24 21:29:52 +08:00
Shunhua Lan
568481a10e ASoC: rockchip: multicodecs: move PA control operation from supply to speaker/headphone widget 
The dapm power sequences is

static int dapm_up_seq[] = {
    [snd_soc_dapm_supply] = 3,
    [snd_soc_dapm_dac] = 8,
    [snd_soc_dapm_hp] = 12,
    [snd_soc_dapm_spk] = 12,
};

static int dapm_down_seq[] = {
    [snd_soc_dapm_hp] = 4,
    [snd_soc_dapm_spk] = 4,
    [snd_soc_dapm_dac] = 7,
    [snd_soc_dapm_supply] = 13,
};

We should enable PA power after dac on and disable before dac off

Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: Ie5b7d5736496061e8f7551bf7d40ffba83015144
 2024-06-24 21:29:52 +08:00
Zhang Yubing
4ad8ea9a7a clk: rockchip: rk3588: support more pll frequency for display 
Change-Id: I24a246f798a4e8bfe9f346e553cfeb2b168edcf3
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
 2024-06-24 21:29:52 +08:00
Shunhua Lan
4389dbd8ec ASoC: es8323: Add a switch for dapm route to control "Speaker/Headphone Power" widgets 
"Right Mixer" -> "Right Out 1" -> "OUT1" -> "ROUT1" -> "Speaker Power"
"Left Mixer" -> "Left Out 1" -> "OUT1" -> "LOUT1" -> "Speaker Power"

Change-Id: I31b8dc4e3ae0cfe7d28c5ad811851912914c2aca
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
 2024-06-24 14:24:12 +08:00
Mingwei Yan
ce5b90cdcc media: rockchip: vpss: fix proc access register when clk off 
Signed-off-by: Mingwei Yan <mingwei.yan@rock-chips.com>
Change-Id: Ic018bf13051b65a366a3b2ef8e5ca918169d0dd3
 2024-06-24 10:27:15 +08:00
Zefa Chen
fa4e216c8c arm64: dts: rockchip: rk3576 test1: add flexbus cif 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I06ae1fe9c0e67b7c0eb1099e74e233e6f91cc4a5
 2024-06-22 16:42:16 +08:00
Zefa Chen
39843a9d3a arm64: dts: rockchip: rk3576: Add flexbus cif 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: If5af8f3815a691abb1d17e8d50dbbe9dd8eaf38f
 2024-06-22 16:40:59 +08:00
Zefa Chen
ae51ee3043 media: rockchip: add flexbus cif driver 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I1335abf6bb590d145acaccfaf31bcc663b8da92a
 2024-06-22 15:12:39 +08:00
Chaoyi Chen
34c17d0724 drm/rockchip: vop2: Support invalid phy id for vop2_plane_id_to_string 
ROCKCHIP_VOP2_PHY_ID_INVALID has a value of -1 that is out of range
for vop2_layer_name_list. Convert it to "INVALID".

Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
Change-Id: I0aaa36c5a51ef0227847567ca1b495d16470ee1b
 2024-06-21 19:28:35 +08:00
Mingwei Yan
233f1cf947 media: rockchip: vpss: online support 8k 
Signed-off-by: Mingwei Yan <mingwei.yan@rock-chips.com>
Change-Id: I363cc1d0dfc5296ec88db0e283ae1cd067ee36e3
 2024-06-21 19:28:22 +08:00
Sandy Huang
df37f6e8e0 arm64: dts: rockchip: rk3576: enable VOP aclk auto cs 
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ied57a55b5094962a6c7373723a547ab31f4c12f4
 2024-06-21 17:31:23 +08:00
Sandy Huang
a9cd753a9e drm/rockchip: vop2: add support dynamic adjust vop aclk auto cs div 
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ia8cfc3748f7f3914f1a8c387ef50d3af02a620af
 2024-06-21 17:30:48 +08:00
Damon Ding
a7620fa846 drm/rockchip: analogix_dp: add support for color format yuv444/yuv422 
The detailed changes as follows:
1.Add flag max_bpc and format_yuv to check whether the
  platform support 10 bit per component and YUV444/YUV422.
2.Add exact bpp related to output format in bandwidth
  calculation, which is fixed to 24 before the patch.
3.Add .atomic_get_input_bus_fmts() and .atomic_get_output_bus_fmts()
  to get the supported input and output bus formats.

Change-Id: I78ef43d19b3a2970a961b0f668a75ef857951dfe
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
 2024-06-21 17:30:34 +08:00
Yu Qiaowei
f019bedaa1 video: rockchip: rga3: modify workaround for RK3576 issue 
reset core_clk on every frame

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I9158fe1fc550fc3a96b8268e4102fccb674fbb43
 2024-06-21 15:34:33 +08:00
Tao Huang
3305069c0a pinctrl: rockchip: Fix iterator 'j' not incremented in rk_iomux_set() 
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I7f659bdcc491ac3bdde5163231b789cf00c0162a
 2024-06-21 14:09:47 +08:00
Weixin Zhou
21dad904b5 input: touchscreen: ft5726: Fix abnormal sleep power 
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
Change-Id: If52037a97e141b1f777a93fbab8f0af5f6a09724
 2024-06-21 14:08:43 +08:00
Tao Huang
b8e6944e4f drm/rockchip: vop: Fix mixing irqsave and irq in vop_crtc_atomic_flush() 
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I4be4ad6728cf77f9f49d6824eed10f7b91d04815
 2024-06-21 14:08:23 +08:00
Jianwei Fan
fa4c12dab8 media: i2c: rk628: fix YUV format color range detect 
Signed-off-by: Jianwei Fan <jianwei.fan@rock-chips.com>
Change-Id: Ifac5d10823b7b5a0da875032cb4ff8c8492762c0
 2024-06-21 14:05:41 +08:00
Cai YiWei
bc1fe92fa9 media: rockchip: isp: add stats log for isp21 and isp30 
Change-Id: I5562b78ce87d4773c08ffbe85f4e0bef351344da
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2024-06-20 19:09:48 +08:00
Zhihuan He
983b142f79 arm64: dts: rockchip: rk3576: add dsmc device 
Change-Id: I57fc6826004dc6014f6fa69f12a29cc08ab5d0b1
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
 2024-06-20 19:09:11 +08:00
Zhihuan He
555d39b979 memory: rockchip: dsmc: modify node get 
Change-Id: I2f8951da7fa878c6d34b9c9587fb3b4262799e8c
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
 2024-06-20 19:09:11 +08:00