Enable the xfer in the last card init stage to fix the config
failed on set_tdm_slot/set_fmt.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ie456b08d11eef5356036a431f5fd6117e0df3823
XFER must be placed after all registers sync done,
because a lots of registers depends on the XFER-Disabled.
Use regcache_sync_region to spilt the sync operation to address
the XFER in the final step.
And also fix for system suspend/resume by using the force one.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I4c5c48496940b2f20edf7a5fa65ad004a5ac9a55
Should be placed after pm_runtime_enable to do
rpm_resume at the moment. otherwise, it will make sense
at the next pm_runtime_get.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I759e5c8c0602b380c7f50d80d8f564316beea632
When i2c drivers probe failed, unregister_restart_handler() should be
done before leave probe().
Fixes: 497e7bd6e1 ("i2c: rk3x: Make sure the i2c transfer to be finished before system reboot")
Change-Id: I6587bd15b63315c173339c26dccf4388741d4286
Signed-off-by: David Wu <david.wu@rock-chips.com>
In normal case, dsc power domain will enable when crtc enable and
disabled when crtc disable. When enable dsc in uboot to show logo,
the dsc in kernel driver can't know the real power domain status,
which will trigger something wrong when disable/endale dsc power
domain.
To avoid this issue, we check the dsc power domain status when
vop_initial. the dsc power domain get in vop_initial function
is enabled only when dsc is enabled in uboot and enter into kernel
driver. It need to update dsc power domain status in this case.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I9641373c2c8facc17ff90d4141909bcc3ac6b13d
after close dsc pd, the following function will set vop enter standby
immediately, this will lead to dsc pd close failed, so we use
vop2_power_domain_put_sync() instead of vop2_power_domain_put().
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I9120e46ec2047e8358b28a3f153b54b4825a5e60
vop_dump_list* is no longer used and this patch removes this structure.
Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I9f32dfd707a1b7633479f2f2f8fee12ad69a96b1
1. for rfbc/afbc format we need to dump all buffer at fb even userspace
set src buffer offset;
2. optimize dump buffer name, so we can get buffer info correctly from
file name, the following is an example of a dump file:
old file name: video1920_1080_NV12.bin
new file name:
Cluster0-win0_fb-1920x1088_stride-1920_offset-0x0_act-1920x1080_NV12_0.bin
Cluster0-win0_fb-3840x2160_stride-5760_offset-0x0_act-3840x2160_YU08_AFBC_1.bin
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I96c3af65fdbe37629d408bb09a8ee9aed78a7f7f
modifier_to_string() maybe used by vop/vop2/rockchip_drm_debugfs.c
and rename modifier_to_string() to rockchip_drm_modifier_to_string()
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I427d5f499d98315632bb91c56da37d9c014df75d
This patch deprecates the plane list record method used in the
previous plane buffer dump. There is no need to record these
information additionally now, as they are already accessible in DRM.
Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
Change-Id: I965f42cc7372c4314aa8cd4de2a8a811b41badaf
This patch deprecates the plane list record method used in the
previous plane buffer dump. There is no need to record these
information additionally now, as they are already accessible in DRM.
Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
Change-Id: Iaebf639bcc0759b0f1aa3c9a3888b964a8a6f35b
This patch deprecates the plane list record method used in the
previous plane buffer dump. There is no need to record these
information additionally now, as they are already accessible in DRM.
Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
Change-Id: Id638a7309ab2ae3f7820d1779e922d008cba7e6d
1. suspend: sditf sensor off, then terminal sensor off
2. resume: terminal sensor on, then sditf sensor on
Signed-off-by: Cai Wenzhong <cwz@rock-chips.com>
Change-Id: I762a2b66e17f4d4016e9d4fd8f0289a3c287f519
The issue occurs when mode is I1O1T in 1080p.
Change-Id: I3ac5167d1bf0eb13dd4b48056f38bee3cf0dedf1
Signed-off-by: Xueman Ruan <xueman.ruan@rock-chips.com>
Add support for the following algorithms:
1. ecdsa-nist-p192
2. ecdsa-nist-p224
3. ecdsa-nist-p256
4. sm2
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: Id58c7755a78293ccb6bfba2a781587922876d5bc
Each time edid is parsed, all resolutions are added to
connector->probed_modes. drm_connector_list_update() must
be called, it will remove useless modes. Otherwise
connector->probed_modes will continue to expand.
Change-Id: Ie61db721fa34e1cabc20209d87273e1b578ed36f
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
rk3399-evb-ind board's gpio is not connected to control sgm3784,
so remove it
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I6e874c94fc5db82daa3b9f67adc5f5da51731390
When the number of queue buffer operations greatly exceeds the number
of deque buffer operations, the available buffers in the pool may be
exhausted, resulting in queue buffer or cancel buffer failures. However,
this error was not intercepted previously, leading to a crash.
Change-Id: Iad6f4146bf6d2685f7534185835ebc512117da4e
Signed-off-by: Rimon Xu <rimon.xu@rock-chips.com>
1. add delay in setting to fix probability reg write failed
2. remove duplicate global register setting.
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I8381c9b03480de4119abe225e1ef561a51dec59b
For rockchip sdhci controllers, SDHCI_RESET_ALL resets also CQHCI registers.
Normally, SDHCI_RESET_ALL is not used while CQHCI is enabled, but that can
happen on the error path. e.g. if mmc_cqe_recovery() fails, mmc_blk_reset()
is called which, for a eMMC that does not support HW Reset, will cycle the
bus power and the driver will perform SDHCI_RESET_ALL.
So whenever performing SDHCI_RESET_ALL ensure CQHCI is deactivated.
That will force the driver to reinitialize CQHCI when it is next used.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Iee491501ff7e32e347303f5389f22eef9f8f658b
The dapm power sequences is
static int dapm_up_seq[] = {
[snd_soc_dapm_supply] = 3,
[snd_soc_dapm_dac] = 8,
[snd_soc_dapm_hp] = 12,
[snd_soc_dapm_spk] = 12,
};
static int dapm_down_seq[] = {
[snd_soc_dapm_hp] = 4,
[snd_soc_dapm_spk] = 4,
[snd_soc_dapm_dac] = 7,
[snd_soc_dapm_supply] = 13,
};
We should enable PA power after dac on and disable before dac off
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: Ie5b7d5736496061e8f7551bf7d40ffba83015144
