Firstly we amend some wrong register definitions and add proper
clock and DLL control for rockchip platform. And we also remove
admac desc hook since we don't need this now.
Change-Id: Ib0b12f127c4d506fb92f27c84d97246e070fc864
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
This patch refactor the combphy_reg so that we can init
PCIe/USB3.0/SATA/QSGMII separately.
Change-Id: I8febce777a5b29948acdb66a1640245983cfe6cd
Signed-off-by: William Wu <william.wu@rock-chips.com>
Add regulator-init-microvolt for driver to init the regulator
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: Ie967a0cccf63b3ff6966caedecdc58d469f08d2d
It should be in DWCMSHC_EMMC_DLL_TXCLK instead of
DWCMSHC_EMMC_DLL_RXCLK.
Change-Id: I24ffad485b64378cda42845c81f99698dd2b2edf
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Acorrding to the latest TRM, the offset of DWCMSHC_EMMC_DLL_STATUS0
is 0x840. So fix it.
Change-Id: I85e4b04b0d68654c988df26f29f03cfe4301831b
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
ERROR: could not get clock /dmac@fe550000:apb_pclk(0)
Change-Id: Id1852b5c74009ae3b3d0db6889465214ba9cffd5
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This patch adds feature unit descriptor for f_uac1 and f_uac2,
and supports volume control and mute control for capture and
playback.
By default, the volume and mute feature unit descriptors are NOT
add in the UAC descriptor. The user can define whether the UAC1/
UAC2 shall support volume and mute functionality via the attributes
c_feature_unit/p_feature_unit in the UAC function directory.
For example, user can add the volume and mute feature unit descriptors
for UAC1 capture and playback:
echo 1 > /config/usb-gadget/gadget/functions/uac1.name/c_feature_unit
echo 1 > /config/usb-gadget/gadget/functions/uac1.name/p_feature_unit
This patch also adds uevents for volume and mute functionality. The
user can complete the real volume and mute control functionality in
the user space depends on these new uevents (like the uac_app in the
RV1126/RV1109 SDK).
Change-Id: I76d447a19fd69e038851040cd73e6c7d420f467d
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c:3499
vop2_plane_create_name_property() warn: should '1 << (win->win_id)'
be a 64 bit type?
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: If4d46563519dabb18792c27bf4069f037de20879
1. Add x mirror + y mirror mode.
2. Support rotation and mirror configuration at the
same time.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: If958e620633e17101495631acf3751a67953b19f
RKISP_NORMAL_MERGE_EN default 1 to enable this function
Change-Id: Iccb33ba372baa90306329998fd64f872063b7609
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
Switch is just a function of switching. There is no voltage setting
function. Voltage getting is the supply voltage.
Fixes: 3fc99e38fd ("regulator: resolve supply after creating
regulator")
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I22ff04b59b9b051052348420f25999dae424d4ac
Switch is just a function of switching. There is no voltage setting
function. Voltage getting is the supply voltage.
Fixes: 3fc99e38fd ("regulator: resolve supply after creating
regulator")
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: Iee08b78b0f4361b7f8b18bea5b851050edb636fa
Switch is just a function of switching. There is no voltage setting
function. Voltage getting is the supply voltage.
Fixes: 3fc99e38fd ("regulator: resolve supply after creating
regulator")
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I83f487908931f40bbeb4323ad671d3a446247377
The AP1511A is different from the BA6208.
ENB: low-active enable
FBC: Forward/Backward control
ENB FBC OUT1 OUT2
H X L L
L H H L
H L L H
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: Ieba00ed509b8d886dc22d8f0018a8282f3c73040
Fix warning:
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c:542: warning: Function
parameter or member 'phys_id' not described in
'vop2_find_win_by_phys_id'
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c:542: warning: Function
parameter or member 'vop2' not described in 'vop2_find_win_by_phys_id'
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c:3503
vop2_plane_create_name_property() warn: should '1 << (win->win_id)' be a
64 bit type?
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c:3509
vop2_plane_create_name_property() warn: should '1 << (win->win_id)' be a
64 bit type?
Fixes: efe0578ec8 ("drm/rockchip: Add support for vop2")
Change-Id: Ia52eac3fcf2ddeff825b5fdaa26adcf26c71a7af
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
The ISP and CMA need the operating system must not active the region.
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
Change-Id: Id27f453f8f1734d992d0e5ae9c38a01b0f7686fe
Rockchip vop2 build on a unified architecture with
multi video output ports support.
For RK3568:
* 3 Video Port, every video port can drive a display timing independently.
* 6 graphic window: Cluster win x 2, Esmart win x 2, Smart wind x 2.
* 6 windows can be divided into 3 groups for independent overlay for
3 Video Ports.
* RGB/eDP/HDMI/MIPI get display timing from 1 of the 3 Video Ports.
+----------+ +-------------+
| Cluster | | Sel 1 from 6| +--------------------+
| window0 | | Layer0 | |n from 6| |
+----------+ +-------------+ | |Video Port0|
+----------+ +-------------+ |Overlay | |
| Cluster | | Sel 1 from 6| +--------+-----------+
| window1 | | Layer1 |
+----------+ +-------------+
+----------+ +-------------+
| Esmart | | Sel 1 from 6|
| window0 | | Layer2 | +--------------------+
+----------+ +-------------+ |n from 6| |
+----------+ +-------------+ | |Video Port1|
| Esmart | | Sel 1 from 6| |Overlay | |
| Window1 | | Layer3 | +--------+-----------+
+----------+ +-------------+
+----------+ +-------------+
| Smart | | Sel 1 from 6|
| Window0 | | Layer4 | +--------------------+
+----------+ +-------------+ |n from 6| |
+----------+ +-------------+ | |Video Port2|
| Smart | | Sel 1 from 6| |Overlay | |
| Window1 | | Layer5 | +--------+-----------+
+----------+ +-------------+
Change-Id: I4c42d655f75903066888b6aea92e926192b000c2
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Pixel blend modes represent the alpha blending equation
selection, describing how the pixels from the current
plane are composited with the background.
Adds a pixel_blend_mode to drm_plane_state and a
blend_mode_property to drm_plane, and related support
functions.
Defines three blend modes in drm_blend.h.
Changes since v1:
- Moves the blending equation into the DOC comment
- Refines the comments of drm_plane_create_blend_mode_property to not
enumerate the #defines, but instead the string values
- Uses fg.* instead of pixel.* and plane_alpha instead of plane.alpha
Changes since v2:
- Refines the comments of drm_plane_create_blend_mode_property:
1) Puts the descriptions (after the ":") on a new line
2) Adds explaining why @supported_modes need PREMUL as default
Changes since v3:
- Refines drm_plane_create_blend_mode_property(). drm_property_add_enum()
can calculate the index itself just fine, so no point in having the
caller pass it in.
- Since the current DRM assumption is that alpha is premultiplied
as default, define DRM_MODE_BLEND_PREMULTI as 0 will be better.
- Refines some comments.
Changes since v4:
- Adds comments in drm_blend.h.
- Removes setting default value in drm_plane_create_blend_mode_property()
as it is already in __drm_atomic_helper_plane_reset().
- Fixes to use state->pixel_blend_mode instead of using
plane->state->pixel_blend_mode in reset function.
- Rebases on drm-misc-next.
Change-Id: I021908dc42aef01e4b7c70f99904ccabffa4adfe
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Lowry Li <lowry.li@arm.com>
Signed-off-by: Ayan Kumar Halder <ayan.halder@arm.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/245734/
(cherry picked from commit a5ec8332d4)
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
