Add the dt-bindings header for the rk3328, that gets shared between
the clock controller and the clock references in the dts.
Add softreset ID for rk3328.
Change-Id: I8e6301fd854fe5c9a820fe76d7826db2c1c08b4e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
camera will query this property, this is historical issue!!!
Change-Id: Ida221e9f5781dcc5562cad69e2ac437290b946bb
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
Add an ethernet0 alias for the RK3288 mac interface so
that u-boot can find the device-node and fill in the mac address on
boards that support a wired network interface.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: Ie8c4e0d90b62278485446f614fce0c95145432d9
(cherry picked from commit 85ef8d611f)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
In order to use Wake-on-Lan on RK3288 integrated MAC, we need to wake-up
the CPU on the PMT interrupt when the MAC and the PHY are in low power mode.
Adding the interrupt declaration.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Change-Id: Iec2637cc0448b6d93b895ca8f4176bab0a1f2dfb
(cherry picked from commit d5bfbeb809)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
The mipi controller node does contain an unused reg property as well as
unnecessary #address-cells and #size-cells properties for subnodes
not using addresses, so remove those to also make dtc happy.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
Change-Id: I48166c93f7746fa88fe2b35c3a040048926cadf7
(cherry picked from commit 6b241fcccb)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
The MIPI controllers are part of the VIO power domain so add the
necessary property to indicate this for the controller we support.
Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I1d51ba1b91dcacb4dfbd6a23d3e609cb66b9426e
(cherry picked from commit 1946a201b3)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
In order to be standard to manage for rockchip SoCs, move the thermal
data into rk3288 dtsi, we needn't to add a new file for thermal.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I2b11b46d1cfb9b70882d1062dedc5b8ff1bd5adf
(cherry picked from commit f87305fa00)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
The power-domain sub-nodes do have reg properties, but so far are
missing the expected unit names. So add the missing ones.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
Change-Id: I03d82afdc2f170c7ecce9685e15b418ca5d30d5a
(cherry picked from commit 95cface95b)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
The usbphy subnodes do have a reg property but no unitname, add them.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
Change-Id: I5b48e289b332397ab7c383b839b875aeefa9f114
(cherry picked from commit a8f0fa2764)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
The usb-phy is fully enclosed in the general register files (GRF).
Therefore as seen from the device-tree it shouldn't be a separate
platform-device but instead a sub-device of the GRF - using the
simply-mfd mechanism.
As the usb-phy is part of the kernel for some releases now, we keep
the old (and now deprecated) binding for compatibility purposes.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Change-Id: I747a18fba361d6c6f161b6572e43955e18593a34
(cherry picked from commit a0da445aab)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
The displayport-phy is fully enclosed in the general register files (GRF).
Therefore as seen from the device-tree it shouldn't be a separate platform-
device but instead a sub-device of the GRF - using the simply-mfd mechanism.
The driver entered the kernel in the current merge-window, so we can still
adapt the binding without needing a fallback, as the binding hasn't been
released with a full kernel yet.
While the edp phy is fully part of the GRF, it doesn't have any separate
register set there, so doesn't get any register-area assigned.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Change-Id: I44a857051be195386fc888b2c713bedc948d5c95
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
(cherry picked from commit 0311c76e47)
IO-domain handling is part of the general register files, so should live
under the grf directly. This change allows the grf to be a simple-mfd and
the io-domains fetching the syscon regmap from that parent-node.
The old binding is of course preserved, though deprecated.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Change-Id: I562e293fc96283edc868771851f15dba0e80d3bc
(cherry picked from commit bc19b9a81d)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
The rk3288 usbphy is completely enclosed in the general register files
and the updated binding allows it to be a subnode of the GRF now.
So move the node appropriately.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I85ca27786da0cd388ef6b4fddb11747761a579a3
(cherry picked from commit 546a3521f2)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
io-voltage control is actually part of the grf, so move the node under the
newly available grf simple-mfd.
To minimize duplicate code, the core node and compatible property
gets placed in the core rk3288.dtsi while the individual boards
now only need to enable it and add the necessary supply properties.
cherry picked from commit 4b91545072)
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Conflicts:
arch/arm/boot/dts/rk3288-miqi.dts
arch/arm/boot/dts/rk3288-rock2-som.dtsi
Change-Id: I4f5ecc16524c52e8ac6f04cf8b9cdc0e1b7d937f
(cherry picked from commit 3445b2fae5)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
The edp-phy control is a part of the General Register Files and
with a recent patch in 4.6 the phy driver can now also handle this
correctly, so move the dts node under the GRF as well.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I6be6270739520f758dbe388cdbd50896c1d7d6f1
(cherry picked from commit 4b91545072)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Similar to the pmu, the general register files contain a lot of different
setting bits grouped into general registers, but also some somewhat special
entities like the controls for some phy-blocks or the io-voltage control.
To be able to move these blocks under the grf node where they actually
belong, make it a simple-mfd.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I2c7f9d6f4411ea05520515a45acbaa689814c872
(cherry picked from commit 6e38e6b26e)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Now vpu driver support both drm and ion allocator. And have
test on rk3399-mid(drm android 7.1), rk3399-mid(ion android
6.0), rk3288(linux mini arm) platform.
Change-Id: I0096c3928849b1f11a62378675f4559b4f101445
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Randy Li <randy.li@rock-chips.com>
The return value of iommu_map_sg is size_t, it's unsigned
Change-Id: Ib06f61c020510673bc513e1a8fde6fd3980a7ca3
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Since (cacb6f5 FROMLIST: drm/rockchip: Use common IOMMU API to attach
devices), rockchip drm use common IOMMU API, the boot logo buffer
mapping need change to new api.
Change-Id: Ifa2c886e05d2de65de53a868458c56859519a0f2
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Some bootloader will check the reboot mode to take different action, so
we treat unrecognized reboot mode as normal mode to prevent the system
run into abnormal case.
Change-Id: I88063a5b41e4e645443229fa490b2b55db5ccf27
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
in drm mode ion is not support dma fd, in order
to support drm fd rga driver need fix, and user
also need set the buf type by the macro
Change-Id: I3d0eaf7fbefda5aaf715772649d972b9a9d5c06d
Signed-off-by: Zikim,Wei <wzq@rock-chips.com>
In current code, the connect status will be set to connected state when
reset interrupt occur and change to disconnected state in disconnect
interrupt.
But the usb charger may bring about reset signal in accident if we
connect and disconnect quickly. In this case, the dwc3 controller will
change link state and set to connect status, yet not change to
disconnected state when disconnect. So the dwc3 controller suspend
fail and result in a mistake when quick reconnect.
This patch set connect status to connected state when transfer complete
to make sure that usb is connect to PC exactly.
Change-Id: I8e5894d2e08b88bb5434222100d8f5c91c9f1a9d
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
DWC3 controller still need to read or write memory after dwc3
rockchip receive disconnect notify, the dwc3 controller will not
suspend immediately and the clock is still enabled even if we put
dwc_rockchip sync. So if we reconnect to PC quickly, the transer
will start before dwc3 rockchip receive connect notify and the dwc3
controller will reset during normal transer which result in the gadget
function break.
In order to suspend dwc3 controller and disable clock when transfer
finish immediately, this patch wait for usage_count of dwc3 controller
change to 1 and disconnect interrupt occur then suspend dwc3 controller
and disable clock, make the dwc3 continue transfer after dwc3 rockchip
receive connect notify, otherwise do not reset and get or put dwc3
controller if timeout.
Change-Id: If65344557d77370e9b6cf4bfea84175c37f00057
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Floating charger is a kind of special USB charger that
dp/dm not shorted, which is incompatible with BC1.2 spec.
However, we need to support this floating charger, and
consider that the max charge current of floating charger
is the same as standard USB charger (dp/dm is shorted),
so we set the charger type as DCP for floating charger.
Change-Id: Ifaca7269a3d4660ac095c59776d7e935fe6126df
Signed-off-by: William Wu <wulf@rock-chips.com>
gslxxxx wrong irq number with the same vopb, may cause vopb abnormal.
ts->irq is gpio number, gslxxxx irq number is ts->client->irq
ts->client->irq = gpio_to_irq(ts->irq)
Change-Id: Ic1f6a46437a2a185f3218d3f0406deeddd9d670a
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
The newly added OTG support has an obvious uninitialized variable
access that gcc warns about:
drivers/phy/phy-rockchip-inno-usb2.c: In function 'rockchip_chg_detect_work':
drivers/phy/phy-rockchip-inno-usb2.c:717:7: error: 'tmout' may be used uninitialized in this function [-Werror=maybe-uninitialized]
This replaces the use of the uninitialized variable with what
the value was in the previous USB_CHG_STATE_WAIT_FOR_DCD
state.
Change-Id: Ibeed4872e1168e135a332a0978d85a4e48083267
Fixes: 0c42fe48fd23 ("phy: rockchip-inno-usb2: support otg-port for rk3399")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: William Wu <wulf@rock-chips.com>
(cherry picked from git.kernel.org kishon/linux-phy next
commit dd796e921e)
The linestate change interrupt may occur during suspend if port is
not connected. This patch pull down dp/dm when suspend.
Change-Id: I31e992727ea63efbda4ecec7ad3af02626eceb44
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
On the rk3288 USB host-only port (the one that's not the OTG-enabled
port) the PHY can get into a bad state when a wakeup is asserted (not
just a wakeup from full system suspend but also a wakeup from
autosuspend).
We can get the PHY out of its bad state by asserting its "port reset",
but unfortunately that seems to assert a reset onto the USB bus so it
could confuse things if we don't actually deenumerate / reenumerate the
device.
We can also get the PHY out of its bad state by fully resetting it using
the reset from the CRU (clock reset unit) in chip, which does a more full
reset. The CRU-based reset appears to actually cause devices on the bus
to be removed and reinserted, which fixes the problem (albeit in a hacky
way).
It's unfortunate that we need to do a full re-enumeration of devices at
wakeup time, but this is better than alternative of letting the bus get
wedged.
Change-Id: I3120a38a7f646a9d244f04bd2dcfef7474a4a6d1
Signed-off-by: Randy Li <ayaka@soulik.info>
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
(am from https://mail-archive.com/linux-kernel@vger.kernel.org/msg1254059.html)
The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288
has a hardware errata that causes everything to get confused when we get
a remote wakeup. We'll use the reset that's in the CRU to reset the
port when it's in a bad state.
Note that we add the reset to both dwc2 controllers even though only one
has the errata in case we find some other use for this reset that's
unrelated to the current hardware errata. Only the host port gets the
quirk property, though.
Change-Id: I472d33fb1db8b1a6b0c4fcea9ab31fd85b61af40
Signed-off-by: Randy Li <ayaka@soulik.info>
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9324169/)
The opp who contains a opp-suspend property will be configured
during suspend or reboot.
Change-Id: I6b2eede43216435f568db6959127a6e84c8cd4c8
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Sometimes all cpus of big cluster are closed and its frequency
keep a high value, in order to reduce power and reset normally,
set frequency to a specific value after close all the cpus.
Change-Id: I88bce25812d1b0ff3f78a898cb161642a65cc523
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
We need to put the power status of HEVC IP into IDLE unless
we can't reset that IP or the SoC would crash down.
rockchip_pmu_idle_request(dev, true)---> enter idle
rockchip_pmu_idle_request(dev, false)---> exit idle
Change-Id: I76733efd2de4f7ee183c1b6bd1545d60038ee31b
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Randy Li <randy.li@rock-chips.com>
When mapping buffers through the PRIME DMA-buf mmap path we might be
given an offset which has to be respected. The DRM GEM mmap path already
takes care of zeroing out the fake mmap offset, so we can just make the
IOMMU mmap implementation always respect the offset.
BUG=chrome-os-partner:56615
TEST=graphics_GLBench
Change-Id: Iec83e720b24ddd35a92f3df8312015bc5af798f0
Signed-off-by: rjan Eide <orjan.eide@arm.com>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/386477
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Randy Li <randy.li@rock-chips.com>
When mapping external DMA-bufs through the PRIME mmap call, we might be
given an offset which has to be respected. However for the internal DRM
GEM mmap path, we have to ignore the fake mmap offset used to identify
the buffer only. Currently the code always zeroes out vma->vm_pgoff,
which breaks the former.
This patch fixes the problem by moving the vm_pgoff assignment to a
function that is used only for GEM mmap path, so that the PRIME path
retains the original offset.
BUG=chrome-os-partner:56615
TEST=graphics_GLBench
Change-Id: Iec6e996707b0fe7e95a019423a944d98c80beaab
Signed-off-by: rjan Eide <orjan.eide@arm.com>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/381332
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Randy Li <randy.li@rock-chips.com>
When converting the driver to use shmem-backed GEMs for IOMMU-enabled
systems, we forgot to add calls to drm_gem_object_release(), which gave
us a quite nice memory leak. This patch adds the missing calls.
Fixes: f11d5f0 ("FROMLIST: drm/rockchip: Do not use DMA mapping API if
attached to IOMMU domain")
BUG=chrome-os-partner:57158
TEST=while true; do backlight_dbus_tool --set --percent=0 && sleep 8 &&
backlight_dbus_tool --set --percent=100 && sleep 3 ; done
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/385456
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Conflicts:
drivers/gpu/drm/rockchip/rockchip_drm_gem.c
Change-Id: I3c7b21ed22cfb38f512150f76fced3b0cc2b296d
Signed-off-by: Randy Li <randy.li@rock-chips.com>
