This reverts commit 3cf189f222.
VOP only supports the negative polarity of vsync/hsync on rk3588.
Change-Id: I67ea19f04213739149e245fa1aa5a556e92b5698
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
This patch allow driver to stop controller in shutdown flow.
A clean stage is safety to reboot. otherwise, there maybe
a risk to hang on DMAC-AXI-I2S state.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I7d04d7a128004ef371cf94bec04aedc895370cd6
As saradc is disabled, so adc-key is disabled default.
To enable adc-key, add saradc as follow:
&saradc {
status = "okay";
vref-supply = <&vcc_1v8>;
};
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: Ia111f503ed187432ca13dd9a6d37cc000ac25d2b
The pd without devices also will power off when release keepon.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I3e37d5909b6fbc28400320959f448f3c92116e17
rockchip_rk3588_pll_round_rate will return a -EINVAL for
a too low or too high freq, which will make the clk framework
auto round up to a higher freq.
So there is no need to do this at clk driver.
static long rockchip_rk3588_pll_round_rate(struct clk_hw *hw,
unsigned long drate, unsigned long *prate)
{
if ((drate < 37 * MHZ) || (drate > 4500 * MHZ))
return -EINVAL;
else
return drate;
}
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I3f521e07b1a7639d44efbe12bdc05c4b88621a6e
drm_bridge require a display mode which pass through by calling
mode_set hooks, but mode_set only be called after setting mode_changed
flags, so call bridge->funcs->mode_set once in advance during kernel
logo which will not setting mode_changed flags.
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I81a9c0f05f42dd68a376b669af823c6130462df3
configure dsi host in bridge->funcs->pre_enable/enable which is
called to enable the bridge instead of in bridge->funcs->mode_set
which should be called to set the given mode on the bridge.
Change-Id: Ic242064f0b8433f8bbe8975cc7e35e1f26bf8079
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
There are two identical lines for cw2015_battery.
Fixes: 93120310c3 ("power: battery/charger: move battery/charger drivers to power/supply")
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I1af6546464a248534dbc71ef51e5585bff15c5ff
aclk_vop->aclk_vop_root (1:1) by default.
aclk_vop->aclk_vop_div2_src->aclk_vop_root (1:2) for special case.
Fixes: af14a79ae3 ("rk3588: support aclk_vop_sub_src set parent to aclk_vop_div2_src")
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: Ica7ae4d614a4b0bb49d047fe0e20d9b7104df759
This patch fix pdm hang on case PD-OFF-ON. It make sense for
controller type-RK3308 which require once clear when PD on.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I802e9b8349bb3c760dcbb6f3d788aa745411c20a
The virtual address of allocated __GFP_HIGHMEM pages is not mapped,
Using kmap_atomic to build it, or it will failed like:
Unable to handle kernel NULL pointer dereference at virtual address 00000000
pgd = (ptrval)
[00000000] *pgd=00000000
Internal error: Oops: 17 [#1] SMP ARM
Modules linked in:
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I5f337ed9684c5769d90aadb7bf23aae0db9968e8
Make sure the job is no longer in use before releasing the job.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I6a63c2b94fc9004bb460279e7a940ffa0f57c682
This patch allow mclk shift around +/- 1ppm compared to
requested freq.
we could not always achieve the precise freq as required,
e.g. request: 98304000, but got: 98303999
there is no big deal and any side effect on the above case,
so, we allow a tiny shift for mclk.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I8da91e467cfc0306fa9069ab30079d5ddf1c0336
The virtual address of allocated __GFP_HIGHMEM pages is not mapped,
Using kmap_atomic to build it, or it will failed like:
Unable to handle kernel NULL pointer dereference at virtual address 00000000
pgd = 50ec00c8
[00000000] *pgd=00000000
Internal error: Oops: 817 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 3 PID: 67 Comm: rkflash Not tainted 4.19.111 #67
Hardware name: Generic DT based system
PC is at memcpy+0x50/0x330
LR is at 0x61640a68
Change-Id: I0cde9012d29e49d9ba751cb019ccfa784c01b7c7
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Fixes: 266443eda9 ("media: i2c: sc200ai support get config from cmdline for thunderboot")
Signed-off-by: Yongzhen <yuyz@rock-chips.com>
Change-Id: I9624bd9f36795e1fd6802990b17173c68be63bb7
The RK3588 USB2 PHY provides CLK12MOHCI and CLK48MOHCI to
OHCI controllers, and the two clocks are turned off upon
PHY reset, therefore it shouldn't access OHCI Controller
if USB2 PHY in reset. However, during the system PM resume,
the current USB2 PHY power on sequence with PHY reset
operation has potential risk that reset PHY accidentally
when OHCI platform resume access OHCI Controller, and
cause system hung.
The reason is EHCI/OHCI controllers resume ordering on
RK3588. In outline form, the hcd_bus_resume() of EHCI
and the ohci_resume() of OHCI operating concurrently on
different CPUs perform the following actions:
CPU 0 CPU 1
---------------------------- ---------------------------------
async_resume()
usb_resume()
hcd_bus_resume() -- EHCI
usb_phy_roothub_resume()
phy_power_on()
rockchip_usb2phy_power_on() ohci_platform_resume()
rockchip_usb2phy_reset() ohci_resume()
assert phy reset ...
udelay(10); ohci_readl or ohci_writel
This patch fixes USB2 PHY reset during power on for RK3588,
only do USB2 PHY reset for RK3588 USB OTG0 and OTG1, because
their 'common_on_n' bit can be set to 1'b1 (aka REFCLK_LOGIC,
Bias, and PLL blocks are powered down) in PM runtime process.
And keep the 'common_on_n' to 1'b0 for RK3588 USB2 HOST0 and
HOST1, thus we don't need to do PHY reset during power on for
them.
This patch doesn't increase the USB2 PHY power consumption,
because the USB2 HOST0 and HOST1 don't support PM runtime
management, so actually the PHY PLL blocks of USB2 HOST0 and
HOST1 are always powered on.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Ia0121a7c49bef4f0f3a1fb11a810e4ef95b29982
diff rv1103g_bat_ipc_demo_v11 with rv1103g_bat_ipc_demo_v10
1. camera sensor use SC3338
2. remove WiFi's PA
3. control lux_en(GPIO3_A2) inversely
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I57b9dd35a7cddc5869d385412d47112c3b9a6222
Make sure do drop the reference taken to the companion device
during probe/remove/resume.
Fixes: 68850661b5 ("usb: host: ehci-platform: Add device_link between the ehci and companion")
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I0bbfe77987a1c11bfaa5006d98a56480ff16224f
This introduces specific definitions for vendor Rockchip and its
associated tiled format modifier. This modifier is used for the
output format of the Video/JPEG Decoder, that can be imported
directly with the VOP2.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I03c1a51af5fd8bc0702209ae216c4706b4101c49
