The data-sync is enabled by default, so we don't need
this property.
Change-Id: I3cfbb051368a2065cf6db5d0bcc91b8e77e77d10
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
According to IC designer:
For RGB screen: The data-sync should enabled to get better SI.
For MCU screen: The data-sync must bypassed, otherwise the mcu signal
can't output.
Because we use much more rgb screen than MCU screen, so it's better
to enable data-sync by default. And for MCU screen, add the
data-sync-bypass property to bypass data-sync.
Fixes: c8f3ab90c0 ("drm/rockchip: rgb: Allow to configure data sync from DT")
Change-Id: Iacb0f7813ea038a210c2bbb88126356381509bf6
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
1. clean rockchip_linux_defconfig for kernel 4.19.
2. update codec configs:
add configs:
CONFIG_ROCKCHIP_MPP_RKVDEC
CONFIG_ROCKCHIP_MPP_VDPU1
CONFIG_ROCKCHIP_MPP_VDPU2
CONFIG_ROCKCHIP_MPP_VEPU1
CONFIG_ROCKCHIP_MPP_VEPU2
3.enable CONFIG_ROCKCHIP_VENDOR_STORAGE_UPDATE_LOADER
4.enable CONFIG_REGULATOR_TPS65132
Enable TPS65132 regulator driver to support dual output power
supply used in LCD panels for RK3399 M series tablet board.
5.add FIQ_DEBUG and RK_CONSOLE
CONFIG_FIQ_DEBUGGER_TRUST_ZONE=y
CONFIG_RK_CONSOLE_THREAD=y
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: I1de5e663541987e166b661b7c43b4c9b00e4233f
spelling mistake cause hdmi phy configure error, now correct it
Change-Id: I548d76dd44e8d39e35b95138ec3d25b358cf3376
Signed-off-by: xuhuicong <xhc@rock-chips.com>
To rewrite the same id with the data size large than first alloc size,
it`s will write fail. This commit will support realloc new memory
for rewrite.
Change-Id: I3345fc9e4a12d0f61f88cfb944b7efc5a4b5e215
Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>
The CLK_SET_RATE_PARENT flag make the parent clock and the child clk is 1:1.
If the DCLK frequency is too low, the PLL frequency will be very
low, which will affect the output waveform quality of PLL, and PLL
locking may be abnormal, so add a new COMPOSITE_DCLK clock-type to handle
that.
Change-Id: If9bee9ebf157fcf034aed246b3aa1cff503ef9cf
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Sometimes Image is not ready when build Image.gz. Do not know why.
Fixes: 6bec2128bb ("rk: arm: support build Image.gz and Image.lz4")
Change-Id: Iafa7a7cd138d7169f5f198977be0c9d01765a5fc
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
not all win full can support 10bit yuv format, so use formats_win_full
and formats_win_full_10bit to distinguish.
Change-Id: I2ed500a21c072ec79fa6c581bfdc30a7e4474251
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
According to the Android 10 Go edition Device Configuration Guide 1.0.
Change-Id: Ibd9adb2ad2a000f0332bca6524bf427710572459
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
According to the Android 10 Go edition Device Configuration Guide 1.0.
Change-Id: I5514042d984ed54ed62799a5ebd49cd7d0c2a5f3
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
for link mode, several tasks are running at the same time.
so, it need a list to manage these.
Change-Id: Iff4c208d066342a60ecee589dcf5df3831fc3e38
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
fix exposure and gain control issues && adjust register settings
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: Ia7198cfd60d21689811f789eaf559ae187c644a9
vop driver need to backup the last plane info for dump buffer cmd,
but the kmemleak tool will identify as a memleak buffer, so store the
planelist to rockchip_plane_state, and kfree the planlist at next frame
update or disable.
Change-Id: I6e95bfb9740a0ff4ad9033bbe3a34c28e1114c3d
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Enabling zero-cross without AGC, it's may cause loss some
data when start capturing.
Change-Id: I57fcf2cdfc0f67b54700639c4a73bf6c92ac254a
Reported-by: XiaoTan Luo <lxt@rock-chips.com>
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
This patch fixes the following panic when use uvc function and
do reboot during uvc preview.
Unable to handle kernel NULL pointer dereference at virtual address 000001fd
pgd = 85dd55c1
[000001fd] *pgd=00000000
Internal error: Oops: 17 [#1] PREEMPT SMP ARM
Modules linked in: galcore(O)
CPU: 0 PID: 716 Comm: xc:RkAiqCoreThr Tainted: G W O 4.19.111 #18
Hardware name: Generic DT based system
PC is at usb_gadget_deactivate+0x0/0x6c
LR is at usb_function_deactivate+0x54/0x74
It's because that do reboot operation will call configfs_composite_unbind()
to set cdev->gadget to NULL.
Change-Id: I6fbfe9b58f865113d04ca7ce0b74b00f8d89227c
Signed-off-by: William Wu <william.wu@rock-chips.com>
Fractional frequency divider to do integer frequency divider does not
need 20 times the limit.
Change-Id: I98e413230a237fc5aafebabb9c0696d0ce51281a
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
1. support wifi6
2. support sta/ap coex for Android P
3. support sta/ap coex for Linux Connman(Connection Manager)
notice:
As the new drivers are unstable, the vendor suggests to maintain
two sets of drivers, and delete them after the new drivers are stable.
Signed-off-by: Yao Xiao <xiaoyao@rock-chips.com>
Change-Id: I6c98e6e031aee1d619a7f1f4a357b09975237d80
add mclk and amp amplifier control for rockchip soc
using extcon notifier for headset detect
Change-Id: I5984a60f3e64682a669779cd99def8f423b6dd0d
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
rk312x use virtual tsadc, there is no need poweroff when overheat,
just limit the frequency.
Change-Id: Id43c76ca6876a5c38ced9e0c07511ee57dd53691
Signed-off-by: Liang Chen <cl@rock-chips.com>
This updates the rockchip_pvtm.c file to use SPDX-License-Identifier
instead of more verbose license text.
Change-Id: I9f89999e0668269ff7d9283e90710bf0b06bde7f
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
If the system doesn't save the PMIC_POWER_EN OTP, we don't have to write
it back.
Fixes: c0570888f0 ("mfd: rk808: Set only resetting pmic register for 817&809.")
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I3cb391202a2967060b79f5bd7af1ebbcc82e9d9a
Fixed the panic reloads when there are multiple thermal devices.
Change-Id: Ia08b0bfec940be089440b9246cc1abf9626c19a7
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
We know that under the condition of even frequency division,
if the numeratoris greater than 4, the duty cycle may not be
equal to 50%.
In the case, weneed to keep the original numerator(<4) and
denominator.
Change-Id: I8cd08199df4e3d27d5697ce80370224a6f267e26
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
ov8858 camera module used by rk3368 xikp board
Change-Id: Id8380b997c9fe042957a3ba5284e5cf3cc799c37
Signed-off-by: Wu Jingchen <oven.wu@rock-chips.com>
This DWC2 driver has handled the unaligned DMA address problem
for urb->transfer_buffer and split in transfer. But it still
has problem to handle the isoc out transfer with unaligned DMA
address.
I test an USB Audio device which supports 24bits 96KHz 3LE format:
usb 1-1: new full-speed USB device number 2 using dwc2
usb 1-1: New USB device found, idVendor=21b4, idProduct=0083, bcdDevice= 1.06
usb 1-1: New USB device strings: Mfr=1, Product=2, SerialNumber=3
usb 1-1: Product: AudioQuest DragonFly Black v1.5
usb 1-1: Manufacturer: AudioQuest
usb 1-1: SerialNumber: AQDFBL0100023815
When play 24bits 96KHz WAV file, noise occurs.
The rootcause is that the DWC2 controller use internal DMA to
transfer USB audio data, and the DMA address of data buffer must
be 4 bytes aligned, otherwise, the dwc2 will fail to transfer the
data. In this test case, the USB audio may transfer 572 bytes or
582 bytes in one usb transaction. And one URB contains multiple
usb transactions, if the DWC2 transfer the 582 Bytes in the middle
of the URB, the DMA address will not be 4 bytes aligned.
This patch allocates new aligned buf for isoc out transfer with
unaligned DMA address.
For isoc split out transfer, this patch sets the start schedule at
the 2 * DWC2_SLICES_PER_UFRAME to transfer the SSPLIT-begin OUT
transaction like EHCI controller. Without this patch, the SSPLIT-begin
OUT transaction starts in the seventh microframe, and this makes the
USB HUB unhappy. This patch sets the the SSPLIT-begin OUT transaction
starts in the first microframe.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I251ccf804e062312f9bd348552493f3bab504beb
Change-Id: I89cc058f597d1f408da9367e859e855f7e79f8bf
Fixes: 1d1a1f03f3 ("mmc: dw_mmc: add xfer timer for avoid DTO without actual data payload")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Get dst->clock from sclk_rate before it changed to avoid one div
operation.
Change-Id: I33a51fd8b9cef5c3e73fc4db436fe8c1dcc57306
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
