Commit Graph

406048 Commits

Author SHA1 Message Date
Alpha Lin
44a10edbee IEP: re-caculate the uv address when 4k video input in iommu enable case.
In above case, old code will generate a fault address for
uv address if 4k video input or output.

Change-Id: I22e9793fbaa2da250097ba69a3fd4fdf58585b78
Signed-off-by: Alpha Lin <alpha.lin@rock-chips.com>
2015-09-23 18:13:18 +08:00
alpha.lin
0eb015892d VPU: Support both syscon and virtual address while access to grf resource.
If CONFIG_MFD_SYSCON macro define but no grf resource
define in dts will cause a error before this revision.

Change-Id: I70432530fba9c7a5d0b8f5a0c996d67237eb8198
Signed-off-by: alpha.lin <alpha.lin@rock-chips.com>
2015-09-23 18:09:36 +08:00
Huang Jiachai
7fde8d2fb3 video: rockchip: lcdc: 3288: update for VOP YUV420 to HDMI
Change-Id: I3dbe2208e10318acf99b66e858d853c3d4efab04
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2015-09-22 19:03:41 +08:00
Huang Jiachai
db350252e2 video: rockchip: lcdc: 3288: delele some special config for vop full v1.0
Change-Id: Iec4db13e5cde5567d9c9a96f3e063ceb3656b256
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2015-09-22 14:37:45 +08:00
Huang Jiachai
5f87823a49 video: rockchip: lcdc: 3288: update CABC config
Change-Id: I88dd84335943580cf81850cffe530ba73190fa7e
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2015-09-22 14:37:17 +08:00
Wu Liang feng
591df7e27b usb: gadget: accessory: add compatibility ioctl
Change-Id: I301c1f2f17c906d0a3912248fa16bc20b4a32b3c
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
2015-09-22 11:42:59 +08:00
Zheng Yang
9ce6f6b608 video: rockchip: hdmi: 3288/3368: set ddc clock to 50KHz.
Change-Id: I00ba32eb9115fe63606b6ccb441ca3b7e3378880
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2015-09-21 11:04:18 +08:00
Huang Jiachai
d90ec2f74e dtsi: lcd-F402: update cabc gamma lut
Change-Id: I799d6f607b953912755a4a6517b89a0bd659e6cc
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2015-09-21 10:23:30 +08:00
Huang Jiachai
662c3e55e3 video: rockchip: fb: vop driver struct select depend on lcdc id from extent screen
Change-Id: Ied1a53b86ee2e524707a017ba65cd5e648e93bae
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2015-09-21 10:23:29 +08:00
Huang Jiachai
4242177a79 video: rockchip: fbsys: add node to display a picture
1. su & stop;
    2. copy the picture bin to /data/fb0.bin;
    3. echo "n xsize ysize format" > /sys/class/graphics/fb0/dsp_buf;

    ps:
	a. n is the number of picture
	b. xsize and ysize is the picture resolution
	c. format:
	     RGBA=1,RGBX=2,RGB=3,YUV420_SP=17

Change-Id: Id256bee73958b6ab6250a17a723b0b73e7197874
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2015-09-21 10:23:15 +08:00
Chen Liang
f1eb385d72 rk3228: add dts file for sdk
Change-Id: I628f67408e84974d88645363140f77b887143658
Signed-off-by: Chen Liang <cl@rock-chips.com>
2015-09-18 10:01:08 +08:00
Huibin Hong
812c5163e7 rk3368.dtsi: fiq debug baud rate comment, change 115000 to 115200
Change-Id: I55fe0e8f5cae2d5aa16952e9612331ecc928335d
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2015-09-17 19:04:26 +08:00
Chen Liang
8446bec195 rk3228: initialize platform data
Change-Id: Id7fd0d98ef70641a62bd8520b72214141b5cf199
Signed-off-by: Chen Liang <cl@rock-chips.com>
2015-09-17 18:54:55 +08:00
Huang Jiachai
6631b869a9 video: rockchip: lcdc: 3288: add support yuv420 output
Change-Id: Id1cdc222774b37594eec3ed15633f9c138e6e9b1
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2015-09-17 16:43:12 +08:00
Huibin Hong
7498ed6627 fiq debugger: driver update
1. Change fiq debugger trigger mode, enter “fiq” instead of
F5 with SecureCRT

Change-Id: I3b52ad435af3211675a8416c6e016147886def8d
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2015-09-16 19:45:54 +08:00
Zheng Yang
dbb4cc8d6e video: rockchip: fb: recalculate logo offset to match new screen size
Change-Id: I9f62088f4d0868a9284d1794718da8f5a044f24a
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2015-09-16 10:33:06 +08:00
Zheng Yang
44bc4fd736 video: rockchip: lcdc: 3288/3368: read screen regs in uboot mode
Change-Id: I36db50471140d041fd0220283bc4e6ce59ec9d74
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2015-09-16 10:31:42 +08:00
Tang Yun ping
52f8f5cff0 rk3368 ddr: add configure ddr timing function
1.add the function of configure ddr timing such us sr_idle, pd_idle, odt
disable frequency, dll bypass frequency, odt strength, driver strength in dts.
2.make sure commit 8be554a502 ("rk3368 dts: add ddr timing node in
rk3368.dtsi" add ddr timing node in dts that user can configure ddr timing in
dts file.) was merged.
3.bl30 must update to rk3368bl30_v2.11.bin.

Change-Id: Ie8ae559c8128eb01788271a4333c465e21954ab1
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2015-09-15 16:30:38 +08:00
Xiao Feng
1a1394ca73 dvfs: rockchip: modify the pvtm_info of RK3368_v0
Change-Id: If3216b4d8d220411e0c54a657357187315a5d4b5
Signed-off-by: Xiao Feng <xf@rock-chips.com>
2015-09-15 15:51:18 +08:00
zhangqing
cccf1792d7 pmic: rk808: slove set voltage error
rk808 setting voltage had a overshoot question
so we set voltage must step by step.
support 12.5mv/step.

Change-Id: Idfce7b57d6717e51afaff2c170eff7bd16de23af
Signed-off-by: zhangqing <zhangqing@rock-chips.com>
2015-09-15 15:49:20 +08:00
Chris Zhong
0f3661b46e ARM: dts: fix some code style issues
Change-Id: I3f1f5637729171079ca7d108ba59521018c9561d
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
2015-09-15 15:09:36 +08:00
Zheng Yang
f4859250d6 video: rockchip: hdmi: 3368: support vesa dmt mode
Change-Id: Ic2a910cd50beb9b49baff7bd732f6c1bdd78790f
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2015-09-15 14:10:01 +08:00
Zheng Yang
ae4c2644f3 video: rockchip: hdmi: 3288/3368: phy pll support more vesa dmt clock
Change-Id: I7382e5554664f2014bb5aa579a2524bf1738d971
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2015-09-15 14:09:08 +08:00
Zheng Yang
f6656c7c7f video: rockchip: hdmi: support some vesa dmt mode
Change-Id: I28e935c717ae69fb2b48a7c243f8ce3cc7101a86
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2015-09-15 14:08:46 +08:00
Chris Zhong
7650349d79 ARM: dts: add a alias for rockchip_suspend
Since we need overwrite this rockchip_suspend node in sub dts file,
sometimes. Add a alias for before it.

Change-Id: I6d951d1c0bfff1cde619906eb9f11256d057a9fe
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
2015-09-15 10:09:52 +08:00
Huang, Tao
4d732be448 media: camsys_soc_priv: use cpu_is_rk3288 instead of soc_is_rk3288
Change-Id: If54087f71e0b6c923a11a6a37a4420ba86211070
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2015-09-15 10:03:00 +08:00
Zheng Yang
22a5135d56 video: fbdev: Add additional vesa modes
Change-Id: I485601d679687db9a655f06b48929e66883bdadd
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2015-09-15 09:19:01 +08:00
Chris Zhong
cbf1d23ba5 pinctrl: rockchip: fix rk3288 gpio0 configuration
On rk3288, for gpio bank 0, the registers which configure pull-up,
iomux, and drive strength don't implement the enable bits in the upper
half of the register, unlike the other gpio configuration registers,
and so the kernel must perform a read-modify-write of the register to
update a particular gpio in that bank.

Change-Id: I4a6953839307e3a75b2ac554aac3dc865583617d
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
2015-09-14 20:01:03 +08:00
Zheng Yang
92e7da2818 video: rockchip: fb: resize uboot logo if screen size is changed
If hdmi is inserted or removed before android is launched, screen
size is changed and uboot logo is showing on wrong screen position.

For example, screen size is 720x576 in uboot, hdmi is inserted during
kernel is booting, screen size is changed to 1920x1080, logo size
is still 720x576 and shown on left-top.

This case is occurred on box, mid has no problem. So we need to resize
uboot logo to new screen size.

Change-Id: I6247bf8e77d181687986815c960ec72d4c59a757
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2015-09-14 16:56:39 +08:00
Xiao Feng
31b19d3c43 ddrfreq: rockchip: read the parameters of auto-freq from dts
Change-Id: I50ff96bc66d929009da99b53c39d4b95567ad100
Signed-off-by: Xiao Feng <xf@rock-chips.com>
2015-09-11 18:23:24 +08:00
Xiao Feng
2c97b647f3 arm64: rockchip: rk3368: dts: add the parameters of auto-freq in dts
Change-Id: I8b19961a8a93b1ceb4378b1100d3f4cc8a5a9baa
Signed-off-by: Xiao Feng <xf@rock-chips.com>
2015-09-11 18:22:59 +08:00
Huang zhibao
4b51721783 ARM: dts: rk3368 box add xz3216 dcdc support
Change-Id: I91fab0816784bbdec36b2347f3e911fd402bc83e
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
2015-09-11 18:20:18 +08:00
Huang zhibao
59b68fcc39 dcdc: add xz3216 dcdc support
Change-Id: I887e96c981af0cfffdb1c08784c52c774bb16fab
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
2015-09-11 18:19:50 +08:00
Huang Jiachai
0b2621acc9 video: rockchip: rb: return error value to user when an exception is configed
Change-Id: I81697f24c6914f07f8facad4e23ad4fb6824190c
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2015-09-11 15:52:37 +08:00
Meiyou Chen
a51927d3ac of/device: Fix platform_device.name point to an freed memory after
dev_set_name()

When we use of_device_add() to create platform_device and add it to device
hierarchy, the platform_device.name and device's name will point to the same
memory.

Later we use dev_set_name() to change the device's name, it will alloc new
memory to store name and free old device's name. After it, the
platform_device.name will point to an freed memory, access platform_device.name
 maybe lead to unpredictable exceptions.

So, we alloc new memory for platform_device.name in of_device_add()

Change-Id: I59bf0941ee4e094053971d41d386206e47fddcaa
Signed-off-by: Meiyou Chen <cmy@rock-chips.com>
2015-09-11 10:42:53 +08:00
Tang Yun ping
8be554a502 rk3368 dts: add ddr timing node in rk3368.dtsi
Change-Id: Ib1887e65567c76fc93b0a23ba143f9ad7e80b99f
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2015-09-10 18:39:44 +08:00
Tang Yun ping
9ec5a8f5fd rk312x ddr: fix get bandwidth error
1.Using 64bit width variable to cached the read and write data bandwidth
because it may overflow when calculating read and write data bandwidth.
2.Get ddr burst length to calculating bandwidth because lpddr2's burst
length may be bl4 or bl8.

Change-Id: I28db1793e411fc3e18edc3b6421ab3d397d92aa5
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2015-09-09 17:37:18 +08:00
zhangqing
357ed913b7 Pmic: rk808: Move regulator init parameters from rk808.dtsi to board dts
Move rk808 regulator init parameters to the rk3xx-xx.dts
Convenient for different products setting and modify

Change-Id: I03673f4dbd478df0630e6b982e72597ade14d810
Signed-off-by: zhangqing <zhangqing@rock-chips.com>
2015-09-09 16:15:54 +08:00
Zheng Yang
36bb74a56e video: rockchip: hdmi: 3368: enable detect phy pll lock status
Phy PLL may be unlock under electro-static test. The higher the
electro-static voltage, the more likely the PLL will be lost.
If PLL is unlock and irq is triggered, we will reset registers
to make it lock on correct frequency.

Change-Id: I86eaa660e837e8c2e59c8e39e3ce083bb89c1bac
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2015-09-08 18:06:50 +08:00
Chris Zhong
83e9a56bb1 rk808: fix a err when no sleep pin in dts
Rk808 will data abort if it has not sleep gpio in dts, and there is no
pmic_sleep_gpio for some board, add a validity checking before
gpio_request can fix this data abort.

Change-Id: Ic2b40f7bfb00e95d283dce72a33dd844cc2c7e27
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
2015-09-08 17:05:42 +08:00
Shen Zhenyi
927209616e tve: rk1000: modify process, make it more reasonable
Change-Id: I021682c0da4e3096ceadf7b8e320a7391c55208b
Signed-off-by: Shen Zhenyi <szy@rock-chips.com>
2015-09-08 09:24:30 +08:00
Tang Yun ping
c8b7badad6 rk3368 DDR: using unified smc call and get trust firmware version function
Change-Id: I81d5fae0a3679081d35d137500e20d5dd705eb15
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2015-09-07 21:30:42 +08:00
David Wu
577f1219dd rk3288: pwm: rkpwm use same interrupt, voppwm would not use capture mode
Change-Id: Ic4d27adeb800406efa1efa5b34fc78677b4def72
Signed-off-by: David Wu <wdc@rock-chips.com>
2015-09-06 19:42:42 +08:00
Jianhong Chen
358babe384 dtsi: rk312x-sdk: update rk818 battery node
Change-Id: I1d0dd1b005e94281cff0792e6380deb3f02efaaf
Signed-off-by: Jianhong Chen <chenjh@rock-chips.com>
2015-09-06 19:39:48 +08:00
Jianhong Chen
e8f3a0f1a7 dts: rk3288-tb: update rk818 battery node
Change-Id: I4a76e7ac0ff3af791839ab5e5f9656ce72612dd1
Signed-off-by: Jianhong Chen <chenjh@rock-chips.com>
2015-09-06 19:39:13 +08:00
Jianhong Chen
231c34138e power: rk81x-battery: fix charge termination voltage define error
the charge termination voltage configration is like bellow:

	000: 4.05v, 001: 4.10v, 010: 4.15v
	011: 4.20v, 100: 4.25v, 101: 4.30v
	110: 4.35v, 111: 4.35v

Change-Id: I17c7df5952c3913eaf509ae2603f2d96d7ea96c8
Signed-off-by: Jianhong Chen <chenjh@rock-chips.com>
2015-09-06 19:37:42 +08:00
Wu Liang feng
288180cba4 usb: dwc_otg_310: gadget: stop current transfer on dequeue
If the request being dequeued is already started, disable endpoint
to stop the transfer and then call dwc_otg_request_done().
Endpoint will be re-enabled on next call to dwc_otg_ep_start_transfer().

TEST=use RK3128/RK3288/RK3368 board, adb root and then adb reboot,
check if usb_req->buf is used after free.

Change-Id: I8c9304f29c578f679ad0841350920f1350bd32df
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
2015-09-06 15:53:33 +08:00
Zheng Yang
468345a502 video: rockchip: hdmi: introduce vic flag HDMI_UBOOT_NOT_INIT
If uboot_vic has HDMI_UBOOT_NOT_INIT flag, it means uboot just
pass the preset vic value, registers has not been set in uboot.
If not, hdmi has been power up in uboot, should not operate phy
register again.

Change-Id: I64f48bd878ec124a94f25a752a74dc9bae502b2b
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2015-09-06 08:53:15 +08:00
Huibin Hong
3acd23a8a0 rk3368 tb: enable fiq debugger and disable the original uart console
Change the device from ttyS2 to ttyFIQ0

Change-Id: Ibc2ab1c9adf1dd5d1718c3c2d80fe578725b409a
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2015-09-02 18:06:54 +08:00
Huibin Hong
cd7a3b318c rk3368: add fiq debugger node in rk3368.dtsi
Change-Id: Iecbfd409d18b5a963bacbbc277e4d7157fe20fb7
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2015-09-02 17:45:23 +08:00