In order to have better compatibility with the Android build method,
the configurations for Bifrost and Valhall GPUs for GKI build
are respectively deployed in the aforementioned config files.
Change-Id: Id99944e8fa17c986e585855d86b3c8eddec3b906
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
This is in coordination with the modification of commit
"MALI: rockchip: Add separate src directory for Valhall driver from DDK g28p0-00eac0".
The configs related to Bifrost and Valhall GPUs are designed to be configured
in the SoC-level config files.
Therefore, for some SoCs, the kernel compilation command line needs to be adjusted.
Change-Id: Ida29d2f6dba9b9ea7f39e8b5f7995214b346d1dc
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
Previously, Valhall and Bifrost GPUs shared a single driver source directory (drivers/gpu/arm/bifrost).
However, starting from DDK r52 (g27), Bifrost GPUs are no longer supported.
As a result, the Valhall GPU driver from DDK r53 (g28) must use a separate source directory
(drivers/gpu/arm/valhall).
There are also modifications in some header files outside of drivers/gpu/arm/.
In addition, the configs related to Bifrost and Valhall GPUs have been removed
from the defconfig file like rockchip_linux_defconfig,
which does not reflect the current SoC.
Instead, these configs have been migrated to the .config files
such as rk3576.config, whose file names can reflect the current SoC.
Therefore, for some SoCs, the kernel compilation command line needs to be adjusted.
Change-Id: I0c4384212b4b679a728401f7f89ae839530f002b
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
* commit '74328f507f2dbb19aa456d8bbf64ce41bc8984d0':
drm/bridge: synopsys: dw-hdmi-qp: support hdmi2.0 when get modes is not from edid
thermal: rockchip: Don't adjust bias for rv1126b
arm64: dts: rockchip: rk3588-vehicle-evb-v23-audio: fix BT card format
arm64: dts: rockchip: rv1126b: set low-temp-min-volt for dmc
arm64: dts: rockchip: rv1126b: Add rockchip,cru for isp and aisp pvtpll
clk: rockchip: clk-pvtpll: Add support to disable pvtpll for rv1126b
drm/rockchip: dsi: transfer WMS/WMC packet use HS DCS long write command
Change-Id: I192809f30a9a60b22812209afc4a99b57d7f84e1
1.system update no wait framedone under overlay mode
2.fast mode to normal mode use part glr16 if fast mode not complete
3.support setting enable waveform fix
4.support setting force temperature
Change-Id: I63355e094f56f055022bdb6688270cee3f09b705
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
DSI works in command mode, using long packet DCS commands WMC and WMS
to send video signals at high speed.
Change-Id: Ib95e9e2228d6393f85f7d3e53918d538f34d9b72
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
If the CONSOLE_LOGLEVEL_DEFAULT is over 6, there should be the
related log:
......
[ 69.489746][ T300] rockchip-dp 27dc0000.edp: Enter panel self test mode
......
Change-Id: I256933ef2cff20716715c5850948a85e4c8fad07
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
The LCH should always be accessed under lock protection to avoid
race conditions that could lead to null-pointer dereference.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I26ef5467c4d79236e1d52806fec7d60c0c34136f
The transferred bytes are calculated by subtracting first_lli.base from
current position (cur_pos). However, cur_pos remains 0 until the first
burst transfer completes, which could result in a negative value.
This leads to incorrect byte count reporting.
Fix the overflow by clamping the calculated bytes to 0 when negative,
ensuring the reported transfer position matches hardware state before
the first burst completion.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ie9d14f514d2ebfe068b535b2f9892b319cb8a41b
When all layers are rgb, the post-csc input color encoding
is fixed to rgb full, and the value of input_color_encoding
has no actual utility. If there are any yuv planes, value
of post-csc input_color_encoding selects the value of the
yuv plane with the largest area.
Change-Id: If624730e93a5ac03fc334890074883b9e6b828eb
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Merge made by the 'ours' strategy.
* commit 'adb3aba20382510c199c55aad189de8924f86f90':
usb: typec: tcpm: fix panic when pd disabled in dt
Change-Id: I2ca3e90fbb6afce217ad5a25bdfbe28125f523ab
* commit '559aa0ed870d95d91c14d3471747aa5979d7655a': (27 commits)
pwm: rockchip-test: Add demo for updating both period and duty in wave generator mode
pwm: rockchip: simplify to one wave_table configuration instead of duty_table and period_table
media: rockchip: vicap support get data type form sensor driver
include: rk-camera-module: add cmd of RKMODULE_GET_SPD_RATIO
include: rk-camera-module: add cmd of RKMODULE_SET_BLC
include: rk-camera-module: add cmd of RKMODULE_SET_WB_GAIN
ASoC: codecs: rk_dsm: Fixed the configuration in multi codec sound was modified by capture stream
drm/rockchip: vop2: Set post-csc input range limited when vp is yuv overlay
clk: rockchip: rv1126b: fix hclk_rkrng_ns parent
gpio: rockchip: Fix debounce clock management and refcount handling
driver: rknpu: Fix missing misc_deregister() on dma heap open failure
media: rockchip: isp: default to NO_HDR if sensor Unimplemented RKMODULE_GET_HDR_CFG
video: rockchip: mpp: rkvdec2: fix vdec IP stuck issue
ARM: dts: rockchip: update the init values of the ili9881d screen for all platforms that use it
arm64: dts: rockchip: rv1126bp-evb: update dsi panel configuration
media: rockchip: isp: fix isp35 bls3
video: rockchip: vehicle: fix generic sensor read data error
arm64: dts: rockchip: rk3576-vehicle-evb: close dmc default
arm64: dts: rockchip: rk3588-vehicle-evb: close dmc default
media: i2c: rk628: fix get range when hdmirx detect default range
...
Change-Id: I5cc37283e174e07d6ad42f4523ce4aa74845de8e
For wave mode, the duty and period share memory to update, so it is
sufficient to config &rockchip_pwm_wave_config.wave_table and set
&rockchip_pwm_wave_config.duty_*/&rockchip_pwm_wave_config.period_*
for the update of duty and period.
Change-Id: Ide133377991a9a6c2c26c4de4cb91040f6a7eadd
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Also, the setting of rk_dsm_set_clk() is only in the playback stream.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Change-Id: I142091151f94cc62b4b22f4079d3ab03f9dce57f
When dci is not enabled and vp is yuv overlay, the input
range of csc is limited.
Fixes: c08d820f80 ("drm/rockchip: vop2: Support post csc color range convert")
Change-Id: I53064bcbb46f8d2fda70eb71577e79ea32399690
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Platform: RV1126B
Err log:
mpp_rkvdec2 22140100.rkvdec: session 94 task 47772 timeout 1 abort 0 force_deq0
mpp_rkvdec2 22140100.rkvdec: resetting...
mpp_rkvdec2 22140100.rkvdec: reset timeout
mpp_rkvdec2 22140100.rkvdec: reset done
mpp_rkvdec2 22140100.rkvdec: resend task 47773
mpp_rkvdec2 22140100.rkvdec: resend task 47774
Err case:
When the zap mmu is issued, it causes the mmu to issue an additional
table fetch command. The data returned by this additional table fetch
command happens to fall during the clock-off period of the reset,
resulting in an incomplete final bus.
Solution:
The software should not zap the MMU while the hardware is operating.
Instead, the 1126B can rely on its built-in hardware MMU zap
functionality.
Change-Id: I1d7df42305edf910c1f39686832f856ccc26bc6d
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
Modify the delay value of the screen wake-up from sleep mode
register from 0 to 150 ms
Modify the delay value of the screen display enable register
from 1 to 20 ms
The reason for the modification：
When the U-Boot display feature is disabled, the default
configuration may cause screen display failures
Change-Id: Icfdca35d9262b640ac0b26b2f9adab04e7a960b0
Signed-off-by: Hongming Zou <hongming.zou@rock-chips.com>
Modify according to the values provided by the screen manufacturer
solved the problem that the rkipc vo probability is not displayed
Change-Id: I7a74c8827e37071f3c3708c4de9711b9d97bb28d
Signed-off-by: Hongming Zou <hongming.zou@rock-chips.com>
