Introduce a new power supply type "Charge Pump" under the power_supply
class. Also, add power supply properties corresponding to power supply
type charge pump.
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: Ib51bfd7c69b549cad4a254bd0c3f50629ea211a3
no-map property added in rtos reserved memory will cause
kernel can not boot up issue.
Fixes: 60dbf2d80a ("ARM: dts: rv1106-thunder-boot: reserve 256KB~512KB for hpmcu")
Signed-off-by: Elon Zhang <zhangzj@rock-chips.com>
Change-Id: I24f588a54e88d7c546cd3e53bd7aa5a0f5a46476
The inclusion of the internal kernel/cgroup/cgroup-internal.h header
broke some androidci builds.
Bug: 233047575
Fixes: 1590a0e8e1 ("ANDROID: GKI: include more type definitions in vendor hooks")
Signed-off-by: Todd Kjos <tkjos@google.com>
Change-Id: I3139b63e5bea277c6687ce1c3c69db35059f3825
After 7b26719a77c4 ("ANDROID: GKI: use internal type definitions in
vendor hooks") we stopped providing a forward declaration of 'struct
uclamp_se' and instead relied on pulling its definition from
linux/sched.h. the 'uclamp_se' structure is conditionally defined based
upon CONFIG_UCLAMP_TASK therefore causing a build error to show up for
the android_rvh_uclamp_eff_get trace point.
Fix this by providing a forward declaration of 'struct uclamp_se' like
before.
Fixes: 7b26719a77c4 ("ANDROID: GKI: use internal type definitions in vendor hooks")
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
Change-Id: Iaa803d149150c1703435f9cfa52ea1406a9521fd
If waiting for wait_ctrl.complt_irq times out, clear the IRQ and stop the MCU by
sip_smc_dram(DRAM_POST_SET_RATE). Prevent the complt_irq which blocked from responding
in the next DDR frequency conversion flow.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I771ac2471dd1ef388f249c367d4f875ea0502e6c
The cif/isp drivers depends on videodev_init() to *video_register_device*.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: Ifc6d8c3e8a90ac045b68e3299537fec8d17f477f
The HPMCU life cycle maybe go so far as to linux kernel, resever it
until thunder-boot had been done.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I6994e035bad24e910be7b7572fb85fbbcebec487
Add rk3588-evb7 that have single PMIC hardware design scheme
for customers to choose.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: Ia99fda8f73ad3bf7a3d4cb2a7763c2453176d10d
check_sync() checks for whether device driver DMA sync sg list entry count equals to map sg list entry count, but in struct dma_buf_ops, there has below interface:
int (*begin_cpu_access_partial)
int (*end_cpu_access_partial)
When vendor implement these interface in dma heap to support dma-buf partial cache sync for performance improvement, in dma_buf_ops of heap, we copy a sgtable from orginal sgtable but with necessary nents, it will less then nents used in map attachment, in the way, the following warning had occurred:
DMA-API: device_xxx: device driver syncs DMA sg list with different entry count [map count=5] [sync count=1]
Call trace:
check_sync+0x6d8/0xb40
debug_dma_sync_sg_for_cpu+0x114/0x16c
dma_sync_sg_for_cpu+0xa0/0xe4
So need change check conditation in check_sync to support dma-buf partial cache sync.
Bug: 236343688
Signed-off-by: Mingyuan Ma <mingyuan.ma@mediatek.com>
Signed-off-by: Yunfei Wang <yf.wang@mediatek.com>
Change-Id: I2f4db3b156e752eeb022927957f77a3fa534a573
(cherry picked from commit d61fe3ad4bab3f4bc040e7ac0c7ec919b50e8a43)
When fe and the next frame of fs arrive at the same time,
processing the fs of the next frame first will cause the
timestamp of the current frame to be wrong.
There is only one timestamp variable of fs, which is not
stored in a ping-pong manner.
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Ic76bdb67bf0debc11006df1195ffafa7540ca2d7
Added mipirx retry mechanism to prevent abnormal display of individual resolutions.
Make global symbols static.
Signed-off-by: Lei Chen <lei.chen@rock-chips.com>
Change-Id: I3a97ab6590fab6f2cada92231d2ce790325806d4
DP need precise clock rate, so the display mode should be filterled
when the precise clock rate can't be get.
When connector connect to DP monitor, it will get the display mode
and do mode valid work. However, the output type is not set in this
case. It need to set all the possible crtcs' output type as DisplayPort
to filter the display mode that clock rate can't be config precisely.
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I18f4e63f311ff1f589249f63ac5639e620ef0f86
For DP and HDMI, if the request clock rate for a display mode
can't be precise get, filter it.
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I6f323cfbafd4822f3cc5aac6c27b0c409d063368
Rockchip RK3588 rkvdecs use sram as part of buffer, then reserve the
iommu iova for the rcb. This patch changes the iova range close to 4G
to make the iova space more contiguous for the future.
With this patch, the iova reserve as following:
[ 1.619149] mpp_rkvdec2 fdc38100.rkvdec-core: rcb_iova 0x00000000fff00000
[ 1.630537] mpp_rkvdec2 fdc48100.rkvdec-core: rcb_iova 0x00000000ffe00000
Fixes: 707f4713a1 ("arm64: dts: rockchip: rk3588s: Add soft-ccu mode for rkvdec2")
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I2ec03a6a68c7fe87a0e3966e773991d024e58d20
Change system sram address from 0xFD600000 to 0xFF000000.
0xFF000000 support cpu cache.
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I990c53fcae67ab80795a77e8c6d1d1851d9f18e8
