When RGA2_USE_MASTER_MODE is 1, master mode is used, when it is 0,
slave mode is used.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I0b8356e02f58b5fadcec41dd310bd55192d2aa47
When in ABB mode, ovlap needs to enable top/bottom alpha read enable
at the same time.
Because ovlap_offset is not 16 aligned, the bottom will be read in
16*16 blocks. If alpha reading is not enabled at this time, this part
of the alpha channel will be lost.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Id18328e4385064d6be7e0574e344cc5413d20df0
When dwc3_gadget_ep_cleanup_completed_requests() called to
dwc3_gadget_giveback() where the dwc3 lock is released, other thread is
able to execute. In this situation, usb_ep_disable() gets the chance to
clear endpoint descriptor pointer which leds to the null pointer
dereference problem. So needs to move the null pointer check to a proper
place.
Example call stack:
Thread#1:
dwc3_thread_interrupt()
spin_lock
-> dwc3_process_event_buf()
-> dwc3_process_event_entry()
-> dwc3_endpoint_interrupt()
-> dwc3_gadget_endpoint_trbs_complete()
-> dwc3_gadget_ep_cleanup_completed_requests()
...
-> dwc3_giveback()
spin_unlock
Thread#2 executes
Thread#2:
configfs_composite_disconnect()
-> __composite_disconnect()
-> ffs_func_disable()
-> ffs_func_set_alt()
-> ffs_func_eps_disable()
-> usb_ep_disable()
wait for dwc3 spin_lock
Thread#1 released lock
clear endpoint.desc
Fixes: 2628844812 ("usb: dwc3: gadget: Fix null pointer exception")
Cc: stable <stable@kernel.org>
Signed-off-by: Albert Wang <albertccwang@google.com>
Link: https://lore.kernel.org/r/20220518061315.3359198-1-albertccwang@google.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 3c5880745b)
Change-Id: I15ad3eab4b946f4db6e52035c5dd0d6b3435472e
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
When dma_buf_stats_setup() fails, it closes the dmabuf file which
results into the calling of dma_buf_file_release() where it does
list_del(&dmabuf->list_node) with out first adding it to the proper
list. This is resulting into panic in the below path:
__list_del_entry_valid+0x38/0xac
dma_buf_file_release+0x74/0x158
__fput+0xf4/0x428
____fput+0x14/0x24
task_work_run+0x178/0x24c
do_notify_resume+0x194/0x264
work_pending+0xc/0x5f0
Fix it by moving the dma_buf_stats_setup() after dmabuf is added to the
list.
Fixes: bdb8d06dfe ("dmabuf: Add the capability to expose DMA-BUF stats in sysfs")
Signed-off-by: Charan Teja Reddy <quic_charante@quicinc.com>
Tested-by: T.J. Mercier <tjmercier@google.com>
Acked-by: T.J. Mercier <tjmercier@google.com>
Cc: <stable@vger.kernel.org> # 5.15.x+
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1652125797-2043-1-git-send-email-quic_charante@quicinc.com
(cherry picked from commit ef3a6b7050)
Change-Id: Ie282a36291072b2c6c374f8c1924030ff85d29c6
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
The flag was missing which makes i2s5/6 src clock rate can't be changed.
Change-Id: I3ad5f39e8a2826d0b18d554c3a53b55f219028d8
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
1. support ACPI
2. support 'clock-names' from dt nodes
3. driver works without pinctrl device
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I6eb520632f27ea9ad84f3ee616c631be5d028cf5
According to the datasheet rev1.05 Table 5-1:
SDC_N is 1 for HBR/HBR2.
However datasheet wasn't correct.
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I1cf6d573a6e886a32999dbf1b0e2ad43c5cdc30c
Configured CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP=y in rv1106-tb.config,
for kmpp/rockit built-in
Signed-off-by: Wang Xiaobin <xb.wang@rock-chips.com>
Change-Id: Ib3a2265870ec78ece785d2c6152c6aa612f2d14d
Generally, DMICs require some delay to wake up to NORMAL state
after clk enabled (WAKE-UP Time), and it varies per dmic chips,
we should ignore the dirty data in this duration.
This patch introduce "start/filter-delay-ms" to skip the pop noise
in the duration, and export this delay to allow user to change it.
* PDM Start Delay Ms
a necessary delay for dmics wake-up after clk enabled, and drop the
dirty data in this duration.
* PDM Filter Delay Ms
after xfer start, a necessary delay for filter to init and will drop
the dirty data in the trigger-START late.
e.g.
/# amixer -c 3 contents
numid=4,iface=PCM,name='PDM Filter Delay Ms'
; type=INTEGER,access=rw------,values=1,min=20,max=1000,step=1
: values=20
numid=3,iface=PCM,name='PDM Start Delay Ms'
; type=INTEGER,access=rw------,values=1,min=0,max=1000,step=1
: values=20
/# amixer -c 3 cset numid=4 30
numid=4,iface=PCM,name='PDM Filter Delay Ms'
; type=INTEGER,access=rw------,values=1,min=20,max=1000,step=1
: values=30
...
Signed-off-by: XiaoTan Luo <lxt@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I1b22de7c73cc181d2acd756ee2e32b8361db7822
