In hdmi2.0 resolution, the phase of D2 lane is probabilistically
ahead of other lanes. Set phy deskew FIFO works on shared pointer
to fix this problem.
According to vendor, this patch is also available for frl mode.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ic6f5111ede5a553fb6d6511bd340d4f2010f3fe7
If a ring has a number of TDs enqueued past the dequeue pointer, and the
URBs corresponding to these TDs are dequeued, then num_trbs_free isn't
updated to show that these TDs have been converted to no-ops and
effectively "freed". This means that num_trbs_free creeps downwards
until the count is exhausted, which then triggers xhci_ring_expansion()
and effectively leaks memory by infinitely growing the transfer ring.
This is commonly encounted through the use of a usb-serial port where
the port is repeatedly opened, read, then closed.
Move the num_trbs_free crediting out of the Set TR Dequeue Pointer
handling and into xhci_invalidate_cancelled_tds().
There is a potential for overestimating the actual space on the ring if
the ring is nearly full and TDs are arbitrarily enqueued by a device
driver while it is dequeueing them, but dequeues are usually batched
during device close/shutdown or endpoint error recovery.
Link: https://github.com/raspberrypi/linux/issues/5088
Change-Id: I858a32e6bcbb525cccff3a6d07fe77d2be67f5e7
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
Because to support half duplex, change the default queue to 1, otherwise
half duplex is not supported.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Ice6c045dd70f8a41d44696b734ff4bccd511a4f0
The original error check message:
drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c:371 midgard_kbase_devfreq_init() error: 'kbdev->devfreq' dereferencing possible ERR_PTR()
Modifications here are based on corresponding codes in drivers/gpu/arm/bifrost/.
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
Change-Id: I6d74d39b92ce89e72814f3a0749b79140338b229
The protection range of spin lock is optimized to prevent
competition conditions.
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: I6d3dd088fc5e5c0046df12184108b9e176ac26a7
Just like some 3D mode, the mode->crtc_* parameter will be recalculate
according the mode->flag, and we use the mode->crtc_* parameter to config
to VOP register, so we need use crtc_* parameter to do plane size check.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I0b8a7de251707bf4737b107b167be73270fe63bc
TRCM require TX/RX enabled at the same time, or need the one
which provide clk enabled at first for master mode.
It is quite a different for slave mode which does not have
these restrictions, because the BCLK / LRCK are provided by
external master devices.
So, we just set the right clk path value on TRCM register on
stage probe and then drop the trcm value to make TX / RX work
independently.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I104f168d75787d79625ca7765a1bda1e77cdde12
The USB3.0 OTG1 interface support Dual-Role Device (DRD)
features, it means that supports either device or host
operation separately, not simultaneously. In most application
scenarios, the OTG1 is used as host mode. But there are
some scenarios that need two USB devices at the same time
on the RK3588 platform, in this case, it needs to set both
the OTG0 and OTG1 in device mode. In order to improve the
OTG1 USB3.0 device performance and stability, this patch
disable the u1 and u2 state for OTG1, like what the OTG0
has done.
Change-Id: Iec3249227d7b767e7dc0904fea0424c14ae00670
Signed-off-by: William Wu <william.wu@rock-chips.com>
Support kernel read and write non-protected oem zone
in secure otp, It dependent on tee driver, Confirm that
the tee drive is open.
Change-Id: I31936256f5535bf7a6fb63a9ec52eec70c054423
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
If have RTL9010A ethernet, need enable CONFIG_REALTEK_PHY config
Change-Id: I935a638a3ce480046a71ce74bfe048410b5893ed
Signed-off-by: Shaoxing Chen <csx@rock-chips.com>
Reading register that do not require dclk enable to
check whether hdmi is enabled in uboot.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I951efabf3271246f2e68a4550ec166428c9cc10c
The rk3562_robot.config is specifically for robotic by
- tuning for performance, energy senseless
- removing unused modules like screen, charge, mouse, ethernet
- removing features are not for rk3562
Change-Id: I6a80bac8a0e9a9db1fc2d4ee00d6d90d5e6b00e4
Signed-off-by: Michael Zheng <zhengsq@rock-chips.com>
Modify the micorvolt of vdd_arm to support the new hardware.
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I6251a1b872241936da413f06671cb96afdc83ecd
RK3588 platform may crash if the CPU and MCU access the DFI/DMC
registers at same time.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I6912f72aff09f7db6d696f4a5b15ccc06f68ba04
vehicle v20 evb, VCCIO is 3V3, So limit sdio clk to 50M for wifi.
when system suspend keep vcc_3v3_s0 on avoid wifi chip crash.
Change-Id: I1310b7a3ca0d7e6e7f1ccc6d8d3183091db83506
Signed-off-by: Xu Xuehui <xxh@rock-chips.com>
Make sure the voltage of vdd_arm is greater than 0.9V when low temperature.
$ size drivers/soc/rockchip/rockchip_system_monitor.o
text data bss dec hex filename
9391 332 136 9859 2683 drivers/soc/rockchip/rockchip_system_monitor.o
Signed-off-by: Liang Chen <cl@rock-chips.com>
Change-Id: If7792c85b7c2fa9b3dfac6ce17e6cdcaa1ae5d96
Enable the lontium lt7911d fb notifier driver used on RK3588 vehicle.
Change-Id: I06e7de1817db9fe007ffe1107aa8602538173d09
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Panel model MV2100UZ1 using IC NT57900, which supports
2280x2280 resolution and 2 slice dsc.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I8be3758920c10fd837a634ad9cc2542121a10c2a
