shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-08 03:40:35 +09:00
Code Issues Packages Projects Releases Wiki Activity
860,822 Commits 55 Branches 2,486 Tags
984eef772778ae10b034eb76151db0942ae31e62
Commit Graph

860822 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Wang Panzhenzhuan
984eef7727 media: i2c: add gc02m2 sensor driver 
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I9103cf16c09c4c74243ce2a2084b60f6c87016e6
 2020-12-28 09:52:00 +08:00
Ren Jianing
9ae3574797 arm64: dts: rockchip: rk3568-nvr: fix usb host support 
We let phy-supply regulator always on to support all usb host port.

For dwc3 host port, which only works at high speed, combphy1_usq
should be deleted at dwc3 node and add 'rockchip,dis-u3otg1-port'
attribute.

Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: I3623de2f76ee27ea34fe2a94481319a3ccb7b23b
 2020-12-28 09:49:10 +08:00
Jon Lin
1d93776778 spi: rockchip: Support SPI_CS_HIGH 
Change-Id: I899bce8d9418ee99c784726bb56534aaed27c00b
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2020-12-28 09:48:04 +08:00
Zefa Chen
63c0270850 media: i2c: jx_f37 support mirror/flip 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Ibc876b49b76055396d4ee64a583b13965d76f344
 2020-12-28 09:37:31 +08:00
Shawn Lin
b3f78165e5 phy: rockchip: naneng-combphy: Reset phy if not being used 
Change-Id: Ia62481ebf5aa5684c359fd00a3933bb02e2caaff
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2020-12-28 09:36:01 +08:00
Shawn Lin
1a3cf4f5c2 PCI: rockchip: dw: Don't de-init driver in signal test mode 
Change-Id: I0e98b334cd488cc44ece9719ca8f6bab2a06ea99
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2020-12-28 09:32:15 +08:00
Shawn Lin
4da47ef026 PCI: rockchip: dw: Add compliance test mode support 
Change-Id: I93d2f84d6376221a296c747954acae2593c41d50
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2020-12-28 09:32:15 +08:00
Shawn Lin
62d3dd22e5 arm64: dts: rockchip: Correct PCIe node for rk3568-evb2-lp4x-v10 
Change-Id: I5da9046a833c9dede1b7359761aecf6ff731b215
Fixes: 99e10612ff ("arm64: dts: rockchip: add rk3568-evb2-lp4x-v10 for rk3568 evb2")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2020-12-28 09:28:44 +08:00
Wu Liangqing
1a514e6425 arm64: dts: rockchip: rk3368-evb1: i2c2 pinctrl set to i2c2m1_xfer 
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
Change-Id: If5cb0f90a0a47b94f67f3f9f39a41ffd0a5633ce
 2020-12-25 17:26:57 +08:00
Andy Yan
f6ae3448e0 Revert "arm64: dts: rockchip: set ACLK_VOP to 500M for rk3568" 
ACLK_VOP is assigned by cru now.

This reverts commit de0105f86b.

Change-Id: I9b9390c444d215eaf940053d8617f28b3632e6a9
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
 2020-12-25 17:23:01 +08:00
Hu Kejun
61b8e8b0d8 arm64: dts: rockchip: rk3566/rk3568: add iq feature property in rkisp 
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Change-Id: I147672d5a788b54f08060b5071bb2d505ab646d4
 2020-12-25 15:10:32 +08:00
Hu Kejun
cd941afca7 media: rockchip: isp: support iq feature setting 
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Change-Id: I870a6f5a54495eb537f32515aec28dfd8ec52f3d
 2020-12-25 15:10:20 +08:00
Alex Zhao
39c34fb4bc arm64: dts: rockchip: rk3568-evb: remove unused code 
Signed-off-by: Alex Zhao <zzc@rock-chips.com>
Change-Id: I50bc54580292478713f7979889e63b82e89861bf
 2020-12-24 17:50:36 +08:00
William Wu
138fd489e3 usb: dwc3: core: add async probe for rockchip dwc3 
The default autosuspend delay of PM runtime is 5000ms,
it's too long. For Rockchip DWC3 controller, if it supports
PM runtime management, e.g. RK3568 OTG port, then we expect
to put the DWC3 controller in runtime suspend at the end of
probe as soon as possible. This can fix the issue that race
condition between power down the DWC3 in runtime suspend and
access the DWC3 in dwc3_gadget_pullup() by userspace.

This patch uses pm_runtime_put_sync_suspend() instead of
pm_runtime_put if enable PM runtime. And according to the
commit f2a2b34e45 ("usb: dwc3: rockchip: use async_schedule
for initial dwc3"), we do pm_runtime_put_sync_suspend() in
async schedule to avoid increasing the boot time.

Change-Id: I378e57d272382d444f1ac52ea2961736e472e713
Signed-off-by: William Wu <william.wu@rock-chips.com>
 2020-12-24 17:31:35 +08:00
Allon Huang
e8fba342ae arm64: dts: rockchip: rk3566-evb1-ddr4-v10: links ov02k10 with vicap by mipi split mode 
Signed-off-by: Allon Huang <allon.huang@rock-chips.com>
Change-Id: I8547af9aa5d956b2105390bb5cbb962fa9552f7a
 2020-12-24 17:17:25 +08:00
Allon Huang
8378430a70 arm64: dts: rockchip: rk3568-pinctrl: separate cam pins as two groups for using independently 
Signed-off-by: Allon Huang <allon.huang@rock-chips.com>
Change-Id: Ib4bc4ebcfc9aa42aad96aae6229b0a761e3efd90
 2020-12-24 17:13:59 +08:00
Allon Huang
61428a76bf arm64: dts: rockchip: rk3568: Temporarily add csi_dphy1 
To support split mode.

Signed-off-by: Allon Huang <allon.huang@rock-chips.com>
Change-Id: I15f986c680901d7519ebdbeca1aab7fe552f5e96
 2020-12-24 17:11:01 +08:00
Allon Huang
2f31e5fcc3 media: i2c: ov02k10: support rk3566 evb1 
Signed-off-by: Allon Huang <allon.huang@rock-chips.com>
Change-Id: I46bbef1506bc8ecb8eb288582d88093b5b6f9589
 2020-12-24 16:27:59 +08:00
Allon Huang
15594c3311 media: i2c: gc5025: support rk3566 evb1 
Signed-off-by: Allon Huang <allon.huang@rock-chips.com>
Change-Id: Ib1e89ae63756660651803180b53c6fb2827857d4
 2020-12-24 16:27:37 +08:00
Allon Huang
9cb5128ee0 phy: rockchip: mipi-rx: support rk3568 mipi dphy rx 
Signed-off-by: Allon Huang <allon.huang@rock-chips.com>
Change-Id: I47dd414b518f8b79f60c36fe47223cc636ed774d
 2020-12-24 16:15:39 +08:00
Jason Song
1a4a5312b2 arm64: dts: rockchip: rk3566-rk817-tablet-rkg11: update dts file. 
fix hp speaker camera sleep lcd config.

Signed-off-by: Jason Song <sxj@rock-chips.com>
Change-Id: I2cbf73f3d39b3416989bd68ccec8d35fbb4fe188
 2020-12-24 16:10:52 +08:00
Jason Song
0c18a2d9d1 input: touchscreen: focaltech: fix bootup and suspend i2c transfer error 
Lcd and touch use same power, so we must open uboot logo, turn on power
before touch init. When device enter suspend, power will be hold until
touch suspend.

Signed-off-by: Jason Song <sxj@rock-chips.com>
Change-Id: Ifae24073e982bec9d8cd1f1150c2e18c395930e4
 2020-12-24 16:10:37 +08:00
Wu Liangqing
f33ac42bfe arm64: dts: rockchip: enable dsi uboot logo display for rk356x evb 
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
Change-Id: Iac2bc0eef65262798dd3c6b61ffc9711bee58597
 2020-12-24 14:59:26 +08:00
Sandy Huang
187e0965d1 arm64: dts: rockchip: rk356x: move uboot logo config position 
Change-Id: Icf43c0bbb8da3c8e20406557ef9d2d5f5025af47
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
 2020-12-24 14:57:12 +08:00
Cai YiWei
8d5c287ddb media: rockchip: isp/ispp to version v1.3.0 
Change-Id: I27d24dcdea7eeefba4287ffa71c7ca509fd2e194
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2020-12-24 11:48:51 +08:00
Ding Wei
909b0f0559 video: rockchip: mpp: rkvdec2: add perf sel val 
Tips: The sel val read via VAL0_BASE VAL1_BASE VAL2_BASE.

Change-Id: Ida4eee44f4e4cd6a51ca81eeb28e39091433edf2
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
 2020-12-24 11:43:16 +08:00
Cai YiWei
0be314b390 media: rockchip: isp: config dmatx to valid buf addr 
Change-Id: I6e74e3a8e7d298c5620f6e4fab47c615f0b6b30c
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2020-12-24 10:10:08 +08:00
Yiqing Zeng
1290aeebda media: i2c: sc200ai: fix set hflip/vflip failed bug 
Signed-off-by: Yiqing Zeng <zack.zeng@rock-chips.com>
Change-Id: I07f140b403076063f91b3b8fb976363ab689aa0b
 2020-12-24 09:26:51 +08:00
Finley Xiao
279021a5f1 arm64: configs: rockchip_linux_defconfig: enable CONFIG_COMMON_CLK_SCMI 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I4d142133125a1ebafe4f946afc5b3f239d97ab70
 2020-12-23 20:36:29 +08:00
Finley Xiao
059ef88dd2 arm64: configs: rockchip_linux_defconfig: enable CONFIG_ARM_SCMI_PROTOCOL 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I89f736d105ac4119d26e243f66e31711de5b6adf
 2020-12-23 20:36:23 +08:00
Shunqing Chen
3a7686e976 power: rk817-battery: fix dsoc falling slowly 
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
Change-Id: I412bfc93a7645a6b0faf1b0128bdeefa848142ab
 2020-12-23 20:19:20 +08:00
Sandy Huang
3c2317b25b arm64: dts: rockchip: enable dsi uboot logo display for rk3566-rk817-tablet 
Change-Id: I3e643fc34569244931d18e25ab8d97af2a0ae302
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
 2020-12-23 20:10:24 +08:00
William Wu
bc10ef2673 arm64: dts: rockchip: add dis_u2_susphy_quirk for RK3566 OTG 
The RK3566 OTG port supports USB 2.0 only, and make the internal
2.0 utmi clock to be routed as the 3.0 (pipe) clock. We find
that if the ACLK_PIPE is set to 400MHz, the DWC3 controller may
suspend the USB 2.0 PHY due to some unknown reason during usb
enumeration, and the utmi clock will be gated off, it makes the
DWC3 controller to work abnormally.

This patch adds dis_u2_susphy_quirk for RK3566 OTG to avoid USB
2.0 PHY enter suspend mode if the suspend conditions of DWC3
controller are valid. And the USB 2.0 PHY suspend mode can be
controlled in the PHY driver.

Change-Id: I5b00e8da8e5865d78cd706fe00476773aef8f8d5
Signed-off-by: William Wu <william.wu@rock-chips.com>
 2020-12-23 19:46:07 +08:00
Sandy Huang
fd2ad3366c arm64: dts: rockchip: rk3568-android: add support uboot logo 
Change-Id: Iec6c6e9dce55f959aae9c013bf46a1b5bc77ded3
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
 2020-12-23 19:45:39 +08:00
Wang Panzhenzhuan
b72893bf2d media: i2c: add soi jx_h62 sensor driver 
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I9d66babd0be2a5564f2bf158dda3e954ec8abda8
 2020-12-23 18:08:26 +08:00
Allon Huang
324e202bc0 media: rockchip: cif: extend line to fix merge bypass bug for isp20 
sync with isp commit:Ia1ed6a885cffd55859dcec5ad35f22b99d506336

Signed-off-by: Allon Huang <allon.huang@rock-chips.com>
Change-Id: I62660a8a7f8a69e9d89b884bf17f0a489c051117
 2020-12-23 16:02:04 +08:00
Allon Huang
dc2948f279 media: rockchip: cif: add dvp sof 
Signed-off-by: Allon Huang <allon.huang@rock-chips.com>
Change-Id: Ibda8e3de56baaa32cb74fa179c3706c5d3a87d96
 2020-12-23 16:02:04 +08:00
Andy Yan
ae112b461e drm/rockchip: vop2: Update hdr10 register 
Change-Id: Iffcd3d07ab29ddac6c48ff250880daf4db39a9ab
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
 2020-12-23 15:47:22 +08:00
YouMin Chen
e057a8cecb arm64: dts: rockchip: add rk3568 ddr relate node 
Change-Id: I56ea14c5356ace1a2a479c0c0dac3b9d885b7c6c
Signed-off-by: YouMin Chen <cym@rock-chips.com>
 2020-12-23 12:54:27 +08:00
YouMin Chen
47a2ca382c clk: rockchip: rk3568: add sclk_ddrc for dmc 
Change-Id: I900cb986ce1ee3e8e212636e621c29e73c437217
Signed-off-by: YouMin Chen <cym@rock-chips.com>
 2020-12-23 12:53:59 +08:00
YouMin Chen
19f9ea4b8e dt-bindings: clock: rk3568-cru: add clock ID SCLK_DDRCLK 
Change-Id: Ie029065bda4de0fb764acf328c058c545c4176d6
Signed-off-by: YouMin Chen <cym@rock-chips.com>
 2020-12-23 12:53:49 +08:00
Cai YiWei
2679d1c2f5 media: rockchip: cif: vb2 dma sg for iommu enable 
Change-Id: I06049142d51f4137683a6e871d42cf1b0e3c3fc5
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2020-12-23 12:46:26 +08:00
Cai YiWei
0d8540d244 media: rockchip: ispp: vb2 dma sg for iommu enable 
Change-Id: If54554daf86b481bbadca636427ffb52c3ca4e67
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2020-12-23 12:46:21 +08:00
Cai YiWei
fd37c931a3 media: rockchip: isp: vb2 dma sg for iommu enable 
Change-Id: I50199da38b31a7d9b29673626ed9a0c07be5a94f
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2020-12-23 12:46:16 +08:00
William Wu
265c90374d usb: dwc3: gadget: set in eps maxpacket limit to 1024 if en fifo resize 
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Icd8a56f49895690b8aaa6eefa212656ca070b566
 2020-12-23 12:43:41 +08:00
XiaoDong Huang
3df1a47a05 arm64: dts: rockchip: add scmi node for rk3568 
Change-Id: I7e07abbec0d75d45ed693c82c7f16e7aaa1fa41b
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2020-12-23 11:31:13 +08:00
Algea Cao
8fa1516479 drm/bridge: synopsys: dw-hdmi: Support dw-hdmi does not serve as a connector 
If dw-hdmi is not used as the final output port, it is
only used as a bridge but not a connector.

Change-Id: Ie730f47d6075db74c0c54374849fd938c13f5ba8
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
 2020-12-23 11:28:11 +08:00
Algea Cao
6d1fbe5b3d drm: rockchip: rk628: post_process: Enable y2r when input mode clk is 594Mhz 
Because hdmirx phy only support yuv420 when input mode is 4K-60Hz,
y2r should be enabled.

Change-Id: I1eca2c6783c63e07cb13b617bb32ff81f2229c7d
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
 2020-12-23 11:28:11 +08:00
Algea Cao
c0a543e874 drm: rockchip: rk628: Add rk628 hdmirx driver 
Change-Id: If4d9fefeada220430f9b6a5b3a35a20239461d3e
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
 2020-12-23 11:28:11 +08:00
Algea Cao
92ae0beb2b drm: rockchip: rk628: Add rk628 combrx-phy driver 
Change-Id: I0fbcca09e05c9876ae7e87000d1fa5b72a061077
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
 2020-12-23 11:28:11 +08:00