Commit Graph

1059461 Commits

Author SHA1 Message Date
Tao Huang
98fb0e705a arm64: rockchip_gki.config: Enable CONFIG_DRM_RK1000_TVE
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I78e90cf50712f518ad49ec611ebcb230a6bdbd54
2021-08-24 18:54:28 +08:00
shengfei Xu
611e60519e arm64: dts: rockchip: enable the suspend default config for rk3568-linux
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I6fefa1d37cf7e1d7bade038f2b909a62417ec254
2021-08-24 18:24:27 +08:00
shengfei Xu
f580b4b2ac arm64: dts: rockchip: enable the suspend default config for rk3568-android
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I9581ce931162012ecf508c6d14990b98e8466361
2021-08-24 18:24:27 +08:00
Tao Huang
74e91e56e1 arm64: rockchip_gki.config: Enable RK630
+CONFIG_DRM_RK630_TVE=m
+CONFIG_MFD_RK630_I2C=m

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I859dd45dab1db387ccf9fa6cdb92ba73c8a5a2bd
2021-08-24 18:02:49 +08:00
Algea Cao
c929c6a749 mfd: rk630: Avoid build fail when building as module
ERROR: modpost: "rk630_tve_regmap_config" [drivers/mfd/rk630-i2c.ko] undefined!
ERROR: modpost: "rk630_cru_regmap_config" [drivers/mfd/rk630-i2c.ko] undefined!

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ida6b17db91c97a2749f2e59629353a89e5303e10
2021-08-24 18:02:13 +08:00
Shawn Lin
75d88fe4bb arm64: dts: rockchip: rk3588s add sdmmc and sdio node
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Iac1fe3671d241c0ca2581f01b3e3861dbcac3693
2021-08-24 16:37:17 +08:00
Simon Xue
eeccdd466a arm64: dts: rockchip: rk3588s: add partial iommu nodes in bulk
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Change-Id: Ic89b94237b1232104681eee374e13163dd69f763
2021-08-24 16:34:38 +08:00
Tao Huang
c368f13e79 arm64: rockchip_gki.config: Enable CONFIG_CPU_RK3588
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I9519523120dcd703d7deba1d4d4a5bb912f31172
2021-08-24 16:31:39 +08:00
Finley Xiao
96b08211be arm64: dts: rockchip: rk3588: Add pmu device node
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: If620857222678d2dd90163887aa7197f1bdf1a5b
2021-08-24 16:23:22 +08:00
Elaine Zhang
6cc51b89d6 soc: rockchip: power-domain: Add a meaningful power domain name
Add the power domains names to the power domain info struct so we
have meaningful name for every power domain.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210417112952.8516-10-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 0a69452e03)
Change-Id: I254ce440ee8560515300745911627006d521b3ac
2021-08-24 15:56:53 +08:00
Algea Cao
deeec05202 drm/bridge: support rk1000 tv encoder
RK1000 is a digital-analog mixed chip which has tve output function.
RK1000's registers can be written and read through I2C interaface.
Because RK1000's I2C need dclk and mclk, RK1000 TVE should be registered
after RK1000 CORE.

Change-Id: I65b40826bd1dbf07d4fa94ecdf8c75005008731f
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2021-08-24 14:54:15 +08:00
Algea Cao
4c61ce641f mfd: rk1000: Add rk1000 core driver to kbuild
RK1000's control register block need mclk for i2c communication.
So mclk should be enabled in advance.
RK1000's control register block should be registered before RK1000
TVE.

Change-Id: Iba9a2a410fe927666072f8d246995462a860ec3a
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2021-08-24 14:52:46 +08:00
Algea Cao
87cf222c18 drm/bridge: rk630: Add RK630 tve driver
Change-Id: I80180ca55d1eda0dd63dc8399d5196ae8d4e9f57
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-08-24 14:33:30 +08:00
Algea Cao
ba120ad91d mfd: Add RK630 mfd driver
Change-Id: I03c127df4ec2ad80cbaf4b0d4ad540cb5b32a245
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2021-08-24 14:33:27 +08:00
WeiYong Bi
4e28fd7626 arm64: dts: rockchip: rename mipi to dsi for rk3399
Change-Id: I6c6fb4e0399b805dfa012cc5562ad71103aa85e9
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
2021-08-24 11:21:50 +08:00
Zhen Chen
0b37ea6440 MALI: utgard: select DEVFREQ_GOV_SIMPLE_ONDEMAND when MALI_DEVFREQ enabled
MALI_DEVFREQ is enabled by default.

Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
Change-Id: I8fdbcc2c45bba35c514ca6ddc58b0e9c6a38cf2c
2021-08-24 11:01:01 +08:00
Zhen Chen
dff8b42544 MALI: midgard: select DEVFREQ_GOV_SIMPLE_ONDEMAND when MALI_DEVFREQ enabled
MALI_DEVFREQ is enabled by default.

Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
Change-Id: I1b86565fc72ab6678c0252ddba0d7098e4997bd3
2021-08-24 11:01:01 +08:00
Zhen Chen
c8999a3e17 MALI: bifrost: select DEVFREQ_GOV_SIMPLE_ONDEMAND when MALI_BIFROST_DEVFREQ enabled
MALI_BIFROST_DEVFREQ is enabled by default.

Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
Change-Id: I25b8af723f33d6d262bbaa30c69c16377eaaa3a4
2021-08-24 11:01:01 +08:00
Jianqun Xu
53997ece58 arm64: dts: rockchip: rk3588s add pinctrl support
RK3588S SoC has 5 gpios, from gpio0 to gpio4.

Change-Id: Ic9b6e620aa4ba06223724edd8da3ec35d47d91da
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-08-24 08:21:43 +08:00
Finley Xiao
2320712025 soc: rockchip: power-domain: add power domain support for rk3588
This driver is modified to support RK3588 SoCs.

Change-Id: I69aa0607ccac7256d40a5e6c89c8ba5d2155eb53
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2021-08-23 19:17:45 +08:00
Finley Xiao
df686df9b1 dt-bindings: add power-domain header for RK3588 SoCs
According to a description from TRM, add all the power domains.

Change-Id: I0ab9442b3310b04a8dc8e1a10c30d6754ca3e8f9
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2021-08-23 19:17:37 +08:00
Elaine Zhang
958d13f841 arm64: dts: rockchip: rk3588: fix up the clocks
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I4136922bea4e4e47e580a644593f7b98310623e7
2021-08-23 19:16:56 +08:00
Elaine Zhang
a545faf078 arm64: dts: rockchip: rk3588: add firmware\optee\scmi node
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: Iaafea568783ca140717e8cde02c59775576c769e
2021-08-23 19:12:37 +08:00
Kever Yang
b2c551debe arm64: dts: rockchip: Add rk3588-evb2 board
Here is the evb2 peripheral interface list:
1. 3xUSB30(HOST)+1XUSB(HOST)
2. 1XUSB20
3. 1XSATA
4. 1XHDMI2.1 TX
5. 1XHDMI2.0 RX
6. 1XWIFI6(sdio)
7. 1XeDP
8. 1XDP
9. 1XVGA
10.1X10/100/1000 RJ45(pcie)
11.1xPCIE30X4
12.1X10/100/1000 RJ45(rgmii)
13.2X4LANE mipi csi connector(B TO B 80 PIN)----For CAMERA OR ARRAY MIC
14.2x4Lane Mipi D-PHY RX Connector (B TO B 80Pin) ----For CAMERA
15.1X4Lane Mipi D-PHY TX Connector  (FPC 30 Pin)----For MIPI LCD
16.TF CARD
17.1xIR Receiver
18.1xPHONE+2XSPK(ES8388+TT8642)
19.1xRecovery + reset+pwr+(vol+)+(vol-)+esc+boot key
20.1xRS232+1XRS485+1CAN
21.Debug Uart(UART)+JTAG
22.Support ARRAY MIC+LOOPBACK

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I9992751b5e4fe6a700c42a1cb7f3da4b3c6e1a4d
2021-08-23 18:57:29 +08:00
Kever Yang
6dff499600 arm64: dts: rockchip: add base support for rk3588
rk3588 is a full version chip and have more periphral interface base on
rk3588s.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I3280fcacb667f5ed49ca7146f26b7c256147d281
2021-08-23 16:13:24 +08:00
Kever Yang
9e4a0694c8 arm64: dts: rockchip: Rename rk3588.dtsi to rk3588s.dtsi
rk3588s is a small package version of rk3588, which have less
peripherial interface, so we use it as base version and rk3588 will be
the full version.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I56418768af54e76db3d751f3151ff056109b7f18
2021-08-23 16:09:48 +08:00
Kever Yang
0d390428b5 arm64: dts: rockchip: Add base dts for rk3588 soc
This initialize version support single core cpu, timer, uart and gic.
Add dmac device nodes.
Add cru device node.
Add sdhci node, rk3588 is using dwcmshc controller as eMMC controller.
The controller is different from that of rk3568 and the driver
needs to be identified and handled specially.
Add sdmmc0 node. Use temp xin24m clock, will need to update to smci clock
which is not ready for now.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I7fadb39ddb1827bdd5a816149f6e129b94ae2395
2021-08-20 15:16:54 +08:00
Elaine Zhang
d6eaf349d6 clk: rockchip: Add clock controller for the RK3588
Add the clock tree definition for the new RK3588 SoC.

Change-Id: I055dafbe1587606c56a5553cbb3d4772bd84f97b
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2021-08-20 15:11:16 +08:00
Elaine Zhang
9a7bdd5455 clk: rockchip: add dt-binding header for rk3588
Add the dt-bindings header for the rk3588, that gets shared between
the clock controller and the clock references in the dts.
Add softreset ID for rk3588.

Change-Id: I9fa9d27a187a6951c5c1cf210b0eff988a41457e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2021-08-20 15:11:16 +08:00
Elaine Zhang
a8657b15fa clk: rockchip: clk-cpu: add mux setting for cpu change frequency
In order to improve the main frequency of CPU, the clock path of CPU is
simplified as follows:
                         |--\
                         |   \            |--\
 --apll--|\              |    \           |   \
         | |--apll_core--|     \          |    \
 --24M---|/              |mux1 |--[gate]--|mux2|---clk_core
                         |     /          |    /
 --gpll--|\              |    /    |------|   /
         | |--gpll_core--|   /     |      |--/
 --24M---|/              |--/      |
                                   |
 -------apll_directly--------------|

When the CPU requests high frequency, we want to use MUX2 select the
"apll_directly".
At low frequencies use MUX1 to select “apll_core" and then MUX2 to
select "apll_core_gate".

However, in this way, the CPU frequency conversion needs to be
in the following order:
1. MUX2 select to "apll_core_gate", MUX1 select "gpll_core"
2. Apll sets slow_mode, sets APLL parameters, locks APLL, and then APLL
sets normal_mode
3. MUX1 select "apll_core", MUX2 select "apll_directly"

So add pre_muxs and post_muxs to cover this special requirements.

Change-Id: I944c22f774f5f9c4edaf28099b6c2926076d4749
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2021-08-20 15:04:02 +08:00
Elaine Zhang
58c1fa2ef2 clk: rockchip: add pll type for RK3588
add pll_rk3588 and pll_rk3588_core type for RK3588 Soc.

Change-Id: Ie84adcb1ff8fe59efc212feee3ed872bb318fc8b
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2021-08-20 15:03:29 +08:00
Elaine Zhang
1d4d01d6ed dt-binding: clock: Document rockchip,rk3588-cru bindings
Document the device tree bindings of the rockchip Rk3588 SoC
clock driver in
Documentation/devicetree/bindings/clock/rockchip,rk3588-cru.yaml.

Change-Id: Ic5b5bbb017c477658d3ae0119c8ec22685daa837
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2021-08-20 10:20:13 +08:00
Elaine Zhang
2d49bdb0be clk: rockchip: add register offset of the cores select parent
The cores select parent register is special on RK3588.

Change-Id: I1cfd07064ae7092030a6b9d234049e6cf07a23e8
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2021-08-20 10:19:47 +08:00
Simon Xue
7af20071ed iio: adc: rockchip_saradc: add support rk3588 new saradc
Refactor conversion operation to support new saradc, separate
start, read, powerdown in respective hooks.

Change-Id: Iacb043d14f7867b45bf0c4c74c2bedd21d398944
Signed-off-by: Simon Xue <xxm@rock-chips.com>
2021-08-20 08:50:18 +08:00
Elaine Zhang
72e7a18f4a arm64: configs: rockchip_defconfig: enable CPU_RK3588
Change-Id: I4962dfbd805901c8b1111756e8522ec0f93ee458
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2021-08-19 18:54:01 +08:00
Kever Yang
0e2d4b0759 soc: rockchip: Adds CPU_RK3588 config
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I02ddb0b8404602c9bd0fa390f87f44dc379e808f
2021-08-19 18:53:56 +08:00
Herman Chen
9fb6c91e42 video: rockchip: mpp: rkvdec2: Add link mode flow
rkvdec2 link mode use a new serialized work flow.

This process is for link mode decoder in RK356x.
The new flow run async with hardware and use multiple trigger event to
run the work thread. All task operation, power operation and reset
operation are serialzed in one thread with certain order.
This is mainly for runtime debug and it will simplify the system design.

rkvdec2 link mode use two sets of counters to control the hardware io:
1. write / read task for preparing link mode task to ddr.
2. send / recv task for sending / receiving task from hardware.

All the operations are serialized in single work thread. So only a few
of lock and atomic is required.

The decoded counter and total counter are the synchronization method
between driver and hardware.

NOTE:
1. link mode reset should use sip_reset.
2. link mode should not change hardware frequency or power off when
there is still task running.
3. link mode should not access hardware when there is an error happen.
4. link mode should reserve a stuff task for H.264 decode task.

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I7736d54a64225089cd6d1b6522f660ce4481d437
2021-08-19 15:39:20 +08:00
Herman Chen
832f54d650 video: rockchip: mpp: rkvdec2: code cleanup
1. Remove unused state
The link mode process will be moved to new function.
2. Remove reduce frequency function
The future link mode process should not reduce hardware frequency.

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I173912e149e68aca97d5367ce92facf1af05eda7
2021-08-19 15:39:20 +08:00
Herman Chen
8af1944d60 video: rockchip: mpp: Add process/wait/worker
Add new function pointer for process task, wait task result and task
worker thread.

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: Ib0b23c90083b9acab6a8eec8db0871304dbb72ca
2021-08-19 15:39:20 +08:00
Yandong Lin
d61acc2e76 video: rockchip: mpp: fix failed to enable jpegd issue
Failed to enable jpeg dec hw when the soft-reset of
the previous frame has not been completed.
So we have to manually trigger to do soft-reset when checking
that the soft-reset of this frame is not completed

Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Ib4cbb3c8a42af9d7235bcf41194f5b9ea7c9e207
2021-08-19 15:39:20 +08:00
Yandong Lin
584adb9822 video: rockchip: mpp: Fix 3568 cabac/cavlc switch issue
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Ifd54d76470889e4d76d97cd33b2a4af26c7af6ab
2021-08-19 15:39:20 +08:00
Herman Chen
fd763c3274 video: rockchip: mpp: Fix mpp_free_task crash
Due to hardware timeout the session may be released before the remaining
task is alll finished. So mpp_free_task could run after mpp_dev_release.
Then the session used in mpp_free_task could be invalid and crash the
thread.

So we attach session to the mpp_taskqueue and let the work thread to
destroy and release session later.

NOTE: the session is created in mpp_dev_open and attached to
corresponding taskqueue on client init. So when we release the session in
mpp_dev_release if the session is not attached to certain taskqueue just
release it immediately.

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I9d4b2358154522e6bcde6e688592c0058781529a
2021-08-19 15:39:20 +08:00
Herman Chen
e956ff7216 video: rockchip: mpp: Use kthread to process task
The kthread has less context switch overhead comparing to workqueue.

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I509d8cd86c0966a2bfee8cb8459753368050b2b3
2021-08-19 15:39:20 +08:00
Ding Wei
ed9fd83aae video: rockchip: mpp: rkvdec2: add rcb-min-width info for rcb usage
tips:
    for rk356x, when image width less than 512, it may occur very
small probability for sram read and write.

Change-Id: I57bdfeb776dc0762870f3d7a3a6d81a1c146240d
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2021-08-19 15:39:20 +08:00
Ding Wei
98eaf1a78a video: rockchip: mpp: Optimize kref_get within mem_regions
tips:
1. If fd has imported, then just copy mem_regiony struct.
2. Task is the unit for running, and mem_region is the
   internal element of task.
3. In mem_regions, it can only kref_get once with the same fd,
   instead of all fds which the same fd.

Change-Id: I7236803a5a263d6e79256036caf580b5ac2c35e9
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2021-08-19 15:39:20 +08:00
Ding Wei
0d6170d606 video: rockchip: mpp: remove ktime_get within a task processing
reason: mem_regions are within a task, and the differ time between
mem_region can be ignore. Thus, it can be remove when attach task fds.

Change-Id: I5986d2dca6eff41d6c6a8fa3f037e183b102e63c
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2021-08-19 15:39:20 +08:00
Ding Wei
2dec1b3bd0 video: rockchip: mpp: rkvdec2: rcb_info move to session->priv
if rcb_info not change, then the infos will not ioctl from userspace.
thus, it needs to restore infos in session.

Change-Id: I4ff3b5bcc22b033b1d7549866af7c253bf46945c
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2021-08-19 15:39:20 +08:00
Alpha Lin
8040e871f3 rockchip: video: iep: enable blending and intra interp
Enable blending and intra interpolation by default.

Change-Id: I3f304714d630b4aab677ab6d09cfea514b03d7b1
Signed-off-by: Alpha Lin <alpha.lin@rock-chips.com>
2021-08-19 15:39:20 +08:00
Ding Wei
70dfc38bd3 video: rockchip: mpp: Add property for disable freq set
if property set, then it will skip get/set/reduce freq.

Change-Id: I56f641807327e9e63b8ebc0c91e79ffb19680b1c
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2021-08-19 15:39:20 +08:00
Tao Huang
db4f1ce5a0 video: rockchip: mpp: rkvdec2: Fix compile warning on ARM
drivers/video/rockchip/mpp/mpp_rkvdec2.c:1029:16: warning:
format '%llx' expects argument of type 'long long unsigned int',
but argument 3 has type 'resource_size_t {aka unsigned int}' [-Wformat=]

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I5bb3ac3a2d5d2d41c802e42ed6a26efb5219d0aa
2021-08-19 15:39:20 +08:00