Using wait_event_timeout() replace wait_event_interruptible_timeout().
Change-Id: I53481d25cb96a86a6262672bb65e9a2ed942164a
Signed-off-by: Shuangjie Lin <shuangjie.lin@rock-chips.com>
Fixes: 938e2f2261 ("clk: rockchip: drop use of rockchip_clk_protect_critical()")
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I65b4dd2f380d30d7638212234ff23dc17e2d4349
because currently mclk is handled by codec side, so the
associated pinctrl should be handled by codec too.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: If9c2d2fdedbc2673b2fe0e6738ed8fb54c98a0ba
because currently mclk is handled by codec side, so the
associated pinctrl should be handled by codec too.
Change-Id: I0611b7a291351a20f72b5124c501dc79d92787d6
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
rng node is compflict with crypto node, so default disable
rng node and crypto node.
Change-Id: I9a28108a5667f88c15d5cc9916d927115cdb8918
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
GSL3673 is a touchscreen device, let support it.
Change-Id: I4bf302c395491ca49a1874c8984caa0b49cfb326
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Uart3 has been iomux to gpio, for vcc_3g regulator, which is designed
on rk3288 evb main board.
Disable unused uarts to fix gpio request blame during system booting.
Change-Id: I2eb79ae63a6f226255c12fc3da9ba95ec4219d32
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
This patch add and enable AP6335 wifi node for rk3288-evb
Change-Id: I49e7f6a67130a105579627d30db55010967da57a
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
This adds force abnormal ohci relinquish port owner
and back to ehci on rk3288 SoC.
Change-Id: I33be55c08762be7e8a239f741a8c8dbb28522306
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
The default parent of i2s_src is 200MHz CPLL, it doesn't meet
the constraint of fractional divider that denominator must be
20 times larger than numerator.
Change-Id: I986525ca7a92cb5883facd1b6e89079398302856
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
This change adds USB-PHY output clock reference for EHCI and OHCI.
Change-Id: I39e91fed99756a86c83fe9332587c6630a5e5853
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Add tsadc's working clock rate for rk3288. if not set, tsadc
will work at the default rate of 1k hz.
Change-Id: I1b26351c3fb97f5ceb4657c2356c2f5649ad140c
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
It doesn't support 400MHz, but support 420MHz.
Change-Id: Ife31469307912f83919b02b532acde91cc0f19ce
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
According to rk3288 TRM, the size of usb ehci is 128K,
so let's fix it in dts.
Change-Id: I1adf02080033906a88b34cae877bb84ad0f63059
Signed-off-by: William Wu <william.wu@rock-chips.com>
This patch fixes the error base address for the i2s controller from
0xff88b0000 to 0xff8b0000.
Also order the i2s node by mapping address.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I613eaf64ee010c41208f1c8169e55efbf39fd34c
warning: drivers/rk_nand/rk_ftlv5_arm32.o uses 4-byte wchar_t yet
the output is to use 2-byte wchar_t;
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I9ea1cdb05be5e4edb297517a9ae8c5e5377538be
In rk3326-evb-lp3-avb, gpio2_b6 is used for CAM_PDN0 instead of cif_data1.
Change-Id: I926474f2b06cc39052997750eb1894a8b0fe04d7
Signed-off-by: Jianwei Fan <jianwei.fan@rock-chips.com>
The camera device should keep *power on* until stream off, that make
sure the mclk is enable.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I2db0070793d755d8d1fe2cda3f87aaa498e052d3
While investigating the clang `ge` uninitialized variable report, it was
discovered the default switch would have unintended consequences. Due to
the switch to __phy_modify, the driver would modify the ID values in the
default scenario.
Fix this by promoting the interface mode switch and aborting when the
mode is not a supported RGMII mode.
This prevents the `ge` and `fe` variables from ever being used
uninitialized.
Fixes: 48e8c6f161 ("net: phy: add driver for Motorcomm yt8511 phy")
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David Wu <david.wu@rock-chips.com>
(cherry-pick from commit 0cc8bddb5b)
Change-Id: I610c03a4f032a8a8dde8ef58d105b721c0541bf5
clang doesn't preinitialize variables. If phy_select_page failed and
returned an error, phy_restore_page would be called with `ret` being
uninitialized.
Even though phy_restore_page won't use `ret` in this scenario,
initialize `ret` to silence the warning.
Fixes: 48e8c6f161 ("net: phy: add driver for Motorcomm yt8511 phy")
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David Wu <david.wu@rock-chips.com>
(cherry-pick from commit 546d6bad18)
Change-Id: I0467ca4b5846e71ddca8a6818e5c021010a72d98
Add a driver for the Motorcomm yt8511 phy that will be used in the
production Pine64 rk3566-quartz64 development board.
It supports gigabit transfer speeds, rgmii, and 125mhz clk output.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: David Wu <david.wu@rock-chips.com>
(cherry-pick from commit 48e8c6f161)
Change-Id: If0af67cda0ad607e4a31f126804547e9d8b3df50
