Commit Graph

609115 Commits

Author SHA1 Message Date
Huang jianzhi
9d1e605ec4 arm: rockchip_defconfig: add fake rtc
Change-Id: I4b6bb5ad61de71a5d7efc7d58ef5b6f478a40d2c
Signed-off-by: Huang jianzhi <jesse.huang@rock-chips.com>
2018-05-31 10:30:54 +08:00
Huang jianzhi
a273cc6746 arm64: rockchip_defconfig: add fake rtc
Change-Id: I8dff1ae3e033f3123ea078fb9d5611680aa4eab6
Signed-off-by: Huang jianzhi <jesse.huang@rock-chips.com>
2018-05-31 10:30:54 +08:00
Huang jianzhi
7160f0aed7 rtc: rtc-fake: add fake rtc driver
Change-Id: Ia06db4f5d967338c3f74fed9d35d2cd05209d746
Signed-off-by: Huang jianzhi <jesse.huang@rock-chips.com>
2018-05-31 10:30:54 +08:00
Binyuan Lan
b62b2da7bd ASoC: rockchip: rk817-codec: fixup spk-volume and pdm bug
Change-Id: Idd7ac0b0a12c75d8c43a57d8c8f9ecfccd399894
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
2018-05-31 10:06:32 +08:00
Algea Cao
af008c375a drm/rockchip: dw-hdmi: Set 4K x 2k 60Hz/50Hz color to YUV420 if tmdsclk over the limit
When 4K x 2k 60Hz/50Hz tmds clock is above the max tmds clock, setting its
color to YUV420. A few TV edid declare that they can't support
4K x 2k 60Hz/50Hz YUV420, we still set color to YUV420 or 4K x 2k 60Hz/50Hz
tmds clock will over the limit.

Change-Id: Id57c9313ab52973927c578d0eb2a7b1b30cb9ec1
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2018-05-31 09:13:53 +08:00
Tao Huang
374318f000 ARM: rockchip: Locate kernel add 0x00058000 if CPU_RK3308
128+64KB at the beginning of RAM reserved for ATF.
128KB for pstore.

Change-Id: I1306daec44c65258ff6668f6760be4981d7ca932
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-05-30 19:44:51 +08:00
Tao Huang
98ff84daa2 ARM: decompressor: fix start of RAM alignment
256KB alignment is not work for (textofs & 0xf0000) > 0x40000.
Change to 1MB.

Change-Id: I9803b22d7d64a244842dcc811e47e214d247fc0c
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-05-30 19:42:44 +08:00
Sugar Zhang
d86472234c ASoC: rockchip: add 'rockchip,no-dmaengine' for i2s/tdm/pdm
This patch add support for property 'rockchip,no-dmaengine'.
it is a boolean property. if present, driver will do not
register pcm dmaengine, only just register dai. if the dai
is part of multi-dais, the property should be present. Please
refer to rockchip,multidais.txt about multi-dais usage.

Change-Id: I9aa2ddb15f5a27202f90bf32804f214435cc0b73
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2018-05-30 17:53:03 +08:00
Mengdong Lin
51e355f13b UPSTREAM: ASoC: Add kerneldoc comments for snd_soc_find_dai
snd_soc_find_dai() has been exported and so add the kerneldoc comments
for it.

Change-Id: Iaeb085bd8eebc26075558b4db4cfa4fe9d058e83
Signed-off-by: Mengdong Lin <mengdong.lin@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
(cherry picked from commit fbb88b5ca1)
2018-05-30 15:13:53 +08:00
Mengdong Lin
0e9a1da83f UPSTREAM: ASoC: Export snd_soc_find_dai()
This API can be used by topology to find an existing BE dai by name
and further configure it.

Topology will also check DAI ID to avoid wrong match.

Change-Id: I5651b280ef8352dd20bdb9e6ffa747d0b5a4e088
Signed-off-by: Mengdong Lin <mengdong.lin@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
(cherry picked from commit 305e9020f0)
2018-05-30 15:13:19 +08:00
Sugar Zhang
8644cf7f0d ASoC: codec: dummy-codec: change channels_max to 384
Change-Id: I4b7fd55fc01f2c65f1cd5c8c60238957b759566b
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2018-05-30 15:11:23 +08:00
Tao Huang
cddd5eff01 ARM: Makefile: make [z]boot.img without load addr
Set base and kernel_offset breaks u-boot.

Change-Id: I1e7fdfb722782702d5141f89936127ed340642e6
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-05-30 14:26:09 +08:00
Hans Yang
e2e7ae2203 arm64: defconfig: rk3308_linux_defconfig: enable CONFIG_CYW_BCMDHD
Change-Id: I1b84e84df31f502cdad23b30390f8f0bc24d9c44
Signed-off-by: Hans Yang <yhx@rock-chips.com>
2018-05-30 11:24:47 +08:00
Alex Zhao
6a7eddd528 arm: rockchip_defconfig: remove CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP
Change-Id: I22ff998806919f364d0338415bb585c21d966736
Signed-off-by: Alex Zhao <zzc@rock-chips.com>
2018-05-30 10:28:24 +08:00
Alex Zhao
41dcb2d174 arm64: rockchip_defconfig: remove CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP
Change-Id: I369574059ecb6984596d39c1b8d696eaa41330e5
Signed-off-by: Alex Zhao <zzc@rock-chips.com>
2018-05-30 10:28:24 +08:00
zain wang
4258959427 mfd: fusb302: add DP UFP_D support
Add DP UFP_D support so that we can get the right
DP pin cap for DISCOVERY_MODES cmd.

Change-Id: I564453d2bdf1485acdd65dddb814aae5012c9097
Signed-off-by: zain wang <wzz@rock-chips.com>
2018-05-29 20:31:12 +08:00
Shunqian Zheng
48ec8a809c bluetooth: rfkill-bt: uart-rts gpio can be an optional pin
This patch set uart_rts_gpios as an optional gpio pin.

Some boards (e.g. px3se-sdk) do not use the rts flow control,
and the correspoding uart-rts pin is occupied as some other
functions(e.g. irq pin).

Change-Id: Ia402dc2b74c305d83d3e1ccbedc1c913b270c828
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
2018-05-29 20:28:11 +08:00
Zhen Chen
10c0b6abc7 arm: dts: rockchip: modify 'gpu_power_model' for Midgard DDK r18 on rk3288
The values of the coefficients are the ones in px30.dtsi,
according to Rocky Hao.

Change-Id: I2bcd19f4d9bbddcb02a6ecae743b212778c00178
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2018-05-29 20:27:33 +08:00
Elaine Zhang
93e3d23693 clk: rockchip: px30: Change pll type to pll_rk3328
The clk_rtc32k_pmu is unused for pll on px30 and it will
increase the time to change armclk rate and have a lot waring print.

Change-Id: Iefee34390fbbc2ba4a60a5888806f4e494655fdf
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2018-05-29 19:54:37 +08:00
Elaine Zhang
88ec34820f clk: rockchip: fix up the frac clk get rate error
support fractional divider with only one level parent clock

Change-Id: I6593f908edf4454ef03255080bf9ac1d72c6f64e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2018-05-29 19:54:32 +08:00
Elaine Zhang
c64eb759a8 clk: rockchip: fix up the freq overshoot
When integer divider switch to frac divider,
High frequency burrs that may appeared,
It's deadly to the system

Change-Id: I483449f9a0b980671f90d4c534fad033998deaf7
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2018-05-29 19:52:49 +08:00
xiaoyao
96f06a1be2 net: wireless: rockchip_wlan: support Cypress wifi
Change-Id: Ib6e95c5106ec23db554fe190f83960e82bca1100
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
2018-05-29 19:52:25 +08:00
Zhangbin Tong
6a0e16e85d ARM: dts: rk3128h-box: Limit vdd_arm minimum voltage to 1.2v during early kernel boot
vdd_arm can supply multiple consumers(arm/dmc/gpu/rkvdec), we need to keep
a voltage meets all consumers before all consumers complete initialization.

Change-Id: Ie5f3c1e879931fe69f8b807385c8e97f5cdf5d93
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
2018-05-29 19:35:02 +08:00
Tang Yun ping
460b5e9a6c ARM: dts: px3se: enable dmc node
Change-Id: Ie52a8bc7017bf3cc2ca4c4aab9335ef64dbcb89a
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2018-05-29 19:33:32 +08:00
Tang Yun ping
643aa04b24 ARM: dts: rk312x: move dmc node to rk312x.dtsi
Because px3se also need dmc node, move dmc node from rk312x-android.dtsi
to rk312x.dtsi.

Change-Id: I4adb15048bbf092c1389d72d8d669a40a7ad588b
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2018-05-29 19:33:32 +08:00
Xing Zheng
b509d9189c arm64: dts: rockchip: add loopback node for RK3308 EVB
RK3308 EVB V10: using ADC7 and ADC8 (grp==3) for loopback
RK3308 EVB V11: using ADC1 and ADC2 (grp==0) for loopback

Change-Id: I88a24bddacd25ba54878e97dec8b08b4f38875a2
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-05-29 11:32:17 +08:00
Xing Zheng
e697d2f624 ASoC: rk3308_codec: clean up Optional properties and add rockchip,loopback-grp
Change-Id: Ifb0a2d4c61e3e08d411797d41f49fb4774f50f9b
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-05-29 11:32:17 +08:00
Xing Zheng
9b9cee02e5 ASoC: rk3308_codec: fix the failed loopback
If the capture running, we need to reset the ADCs quickly
when the LINEOUT startup.

Change-Id: I60eb1200961193cab39273da8c1a12a405c7f69b
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-05-29 11:32:17 +08:00
Xing Zheng
74cdadd0b0 ASoC: rk3308_codec: reduce delay for reinit-mic
The vendor suggest that we just need to use delay some
micro seconds for reinit-mic more quickly.

Change-Id: I05cd37828bcd594ca6ab634fb8b5505e01afe130
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-05-29 11:32:17 +08:00
Xing Zheng
14fbb1da27 ASoC: rk3308_codec: enable cut-off 20Hz high pass filter
Change-Id: Ib97a8ee85ae7f4613a51e89da65503d18fa1de0b
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-05-29 11:32:17 +08:00
Alex Zhao
763b2b0fab net: wireless: rockchip_wlan: update rtl8723bs
update rtl8723bs wifi driver to version v5.2.17.1_26955.20180307_COEX20180201-6f52

Change-Id: I7f6227b4c61c54d9c7fd4550726c9b64f7493ef6
Signed-off-by: Alex Zhao <zzc@rock-chips.com>
2018-05-28 18:29:37 +08:00
Frank Rowand
2a578fc2da UPSTREAM: scripts/dtc: dtx_diff - update include dts paths to match build
Update the cpp include flags for compiling device tree dts files
to match the changes made to the kernel build process in
commit d5d332d3f7 ("devicetree: Move include prefixes from arch
to separate directory").

Change-Id: Ia0ea81369757b9de902b3fe4ab0a1af17ccccf56
Cc: <stable@vger.kernel.org> # 4.12
Signed-off-by: Frank Rowand <frank.rowand@sony.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit b4b201d88b)
2018-05-28 17:18:36 +08:00
Olof Johansson
9820464afd UPSTREAM: devicetree: Move include prefixes from arch to separate directory
We use a directory under arch/$ARCH/boot/dts as an include path
that has links outside of the subtree to find dt-bindings from under
include/dt-bindings. That's been working well, but new DT architectures
haven't been adding them by default.

Recently there's been a desire to share some of the DT material between
arm and arm64, which originally caused developers to create symlinks or
relative includes between the subtrees. This isn't ideal -- it breaks
if the DT files aren't stored in the exact same hierarchy as the kernel
tree, and generally it's just icky.

As a somewhat cleaner solution we decided to add a $ARCH/ prefix link
once, and allow DTS files to reference dtsi (and dts) files in other
architectures that way.

Original approach was to create these links under each architecture,
but it lead to the problem of recursive symlinks.

As a remedy, move the include link directories out of the architecture
trees into a common location. At the same time, they can now share one
directory and one dt-bindings/ link as well.

Change-Id: Ib1ad9c86fe4eb2669ae2515c863979fa8e700e4f
Fixes: 4027494ae6 ('ARM: dts: add arm/arm64 include symlinks')
Reported-by: Russell King <linux@armlinux.org.uk>
Reported-by: Omar Sandoval <osandov@osandov.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mikael Starvik <starvik@axis.com>
Cc: Jesper Nilsson <jesper.nilsson@axis.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: linux-arch <linux-arch@vger.kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit d5d332d3f7)
2018-05-28 17:12:38 +08:00
Tao Huang
b4299d0bf2 arm: Makefile: pack android boot.img for arm
resource.img include logo optional.
boot.img: Image + resource.img
zboot.img: zImage + resource.img

Change-Id: I4da1ecd12200e3270f116c3fadcfa7ecbe30d7f9
Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-05-28 16:33:41 +08:00
Yifeng Zhao
ebe4a2e212 drivers: rk_nand: fix update loader fail issue
bug: The NAND driver will write data to the wrong address with
2K page size SLC NAND FLASH.

[   14.047987] IDBlockWriteData 100 100
[   14.074717] IDBlockWriteData 100 100 ret= 0
[   14.075091] IdBlockReadData 100 100
[   14.084396] IdBlockReadData 100 100 ret= 0
[   14.084777] write and check error:1 idb=1,offset=86,r=238,w=40238

Change-Id: Id92051d9a6a345454054fe79b88ec05c48174d81
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
2018-05-28 16:21:58 +08:00
Shunqian Zheng
8959500786 ARM: dts: px3se-evb: configure wifi
Config wifi power sequence for px3se evb board.
The bluetooh doesn't work, adding a TODO tag for
latter revise.

Change-Id: I635dc7e6bd31f7ba559257ddd501f44355ab4381
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
2018-05-28 15:16:44 +08:00
Shunqian Zheng
1962edece4 ARM: dts: rk312x: add pcfg_output_high
This add a pcfg_output_high label so pinctl can set
a gpio output high by default in dts.

Change-Id: Ie4aa2dd59df3110b8e24d0a07cc9961ee086272a
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
2018-05-28 15:15:33 +08:00
Elaine Zhang
027ebe2dde clk: rockchip: rk3328: fix up the i2s clk gating register description error
Change-Id: Ic65033f4dbc5507f28b5e3fc748382e89edb3505
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2018-05-28 11:56:32 +08:00
Elaine Zhang
8637d2656e clk: frac-divider: fix up some frac clk freq setting error
ie:
clk_i2s set rate 11289600(get rate = 11289600)
clk_i2s set rate 8192000(get rate = 8192000)
clk_i2s set rate 11289600(get rate = 11214954)

Change-Id: I042d2acdd22b56b5d8571921f63702aabffcacdd
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2018-05-28 11:56:06 +08:00
Shunqian Zheng
e8dae2d0a9 ARM: configs: Build wifi drivers as modules for linux platform
Since the wireless drivers conflict when built-in together,
this makes the wireless build as modules for linux platform.

NOTE that this will affect all boards using
rockchip_linux_defconfig. But yes, it is a general defconfig,
we want to make it as common as possible.

Change-Id: If4fd669793b624a3721dd17822e5d90ca20e8b19
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
2018-05-28 11:12:55 +08:00
Tao Huang
cd42ff828d ARM: rockchip_linux_defconfig: update by savedefconfig
Change-Id: I4d945da6d79b2ac0ebc9e6b00d7eeb62ecb899c8
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-05-28 11:02:41 +08:00
Dingxian Wen
8d3c5a467a arm64: dts: rockchip: rk3399-android: config pinctrl for cif_clkout
Change-Id: I36c99e72558cd532ea732b3eaff9aab864518c11
Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com>
2018-05-28 10:58:07 +08:00
Tao Huang
87e5b2a712 arm64: dts: rockchip: add label to ramoops for rk3308
Change-Id: I5a8003ab1e600fc207c20f248cf626c9c3c39df3
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-05-25 19:55:37 +08:00
Tao Huang
343d0996d4 ARM: Make SWIOTLB selectable in Kconfig
Not all CPUs need SWIOTLB.

Change-Id: I561f35307c1fdd007a072cebee6306fda8272aea
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-05-25 19:51:13 +08:00
Tao Huang
234d421421 ARM: dma-mapping: silence warning if atomic_pool_size=0
Abort atomic_pool_init if atomic_pool_size=0, silence the following
warning:

[    0.113029] ------------[ cut here ]------------
[    0.113461] WARNING: CPU: 0 PID: 1 at mm/page_alloc.c:3062 __alloc_pages_nodemask+0xc1/0x474()
[    0.114248] Modules linked in:
[    0.114550] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.4.126 #114
[    0.115112] Hardware name: Generic DT based system
[    0.115570] [<c014289d>] (unwind_backtrace) from [<c0140133>] (show_stack+0xb/0xc)
[    0.116269] [<c0140133>] (show_stack) from [<c022bc73>] (dump_stack+0x5b/0x70)
[    0.116935] [<c022bc73>] (dump_stack) from [<c014dfd5>] (warn_slowpath_common+0x55/0x7c)
[    0.117677] [<c014dfd5>] (warn_slowpath_common) from [<c014e055>] (warn_slowpath_null+0xf/0x14)
[    0.118472] [<c014e055>] (warn_slowpath_null) from [<c01a2a39>] (__alloc_pages_nodemask+0xc1/0x474)
[    0.119305] [<c01a2a39>] (__alloc_pages_nodemask) from [<c014544f>] (__dma_alloc_buffer.constprop.6+0x1d/0x7a
)
[    0.120220] [<c014544f>] (__dma_alloc_buffer.constprop.6) from [<c054d165>] (atomic_pool_init+0x31/0xd8)
[    0.121089] [<c054d165>] (atomic_pool_init) from [<c0139725>] (do_one_initcall+0xa1/0x158)
[    0.121847] [<c0139725>] (do_one_initcall) from [<c054aa87>] (kernel_init_freeable+0x10b/0x150)
[    0.122646] [<c054aa87>] (kernel_init_freeable) from [<c040dc4f>] (kernel_init+0x7/0x9c)
[    0.123391] [<c040dc4f>] (kernel_init) from [<c013d541>] (ret_from_fork+0x11/0x30)
[    0.124105] ---[ end trace 1e6e8e7da2c45838 ]---
[    0.124529] DMA: failed to allocate 0 KiB pool for atomic coherent allocation

Change-Id: I3ebeb165d710d44c0493e471461daf82c6902222
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-05-25 19:51:01 +08:00
Tao Huang
ba14dd8c0b arm64: rk3308_linux_defconfig: remove IOMMU_SUPPORT
RK3308 don't have IOMMU. Save about 34KB.

Change-Id: I6fb00e0940c0c3710c8b832419cdc175fc3b0c7e
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-05-25 19:17:36 +08:00
Tao Huang
a77016ecf0 drm/rockchip: Remove depends on ROCKCHIP_IOMMU
Some CPUs without IOMMU but have VOP.

Change-Id: Ic11d1438851eb4773bc94e74879a2329964d012a
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-05-25 19:17:36 +08:00
Nickey Yang
d5d8157e25 arm: dts: rockchip: add rk3288-evb-rk1608 linux support
Change-Id: Ib19fb1acb5604157b35528ec87b727e43ef9dda6
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
2018-05-25 16:40:18 +08:00
Dingqiang Lin
02a0d8d9cf drivers: rkflash: add Kconfig introduction and Kconfig detect
in order to distinguish with other nand drivers

Change-Id: Ifd64a3a839752758b1d2923a58bf569f5169bcdd
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
2018-05-25 16:39:33 +08:00
Yifeng Zhao
9f091f9fc6 drivers: rk_nand: zftl static wear leveling strategy optimize
1. Garbage collection does not deal with the updated blocks.
2. Static wear considers the SLC mode erase count and XLC
mode erase count

Change-Id: I3a404a686e48f8ae44f5e7e507f6d1ef633671d4
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
2018-05-25 16:32:10 +08:00