Add a helper that can be used to obtain the number of bits per pixel
corresponding to a given MIPI DSI pixel format. This is useful in
bandwidth calculations, for example.
Change-Id: I03b9f93044ed46a2b999ce82e5623396a6f4d2bc
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
[treding@nvidia.com: add kerneldoc comment and commit message]
Signed-off-by: Thierry Reding <treding@nvidia.com>
(cherry picked from commit ec26d9e938)
There are some IPs, such as video encoder/decoder, contains 2 slave iommus,
one for reading and the other for writing. They share the same irq and
clock with master.
This patch reconstructs to support this case by making them share the same
Page Directory, Page Tables and even the register operations.
That means every instruction to the reading MMU registers would be
duplicated to the writing MMU and vice versa.
Change-Id: I3fd473898274cffcfb46c907b34bd3a4adc29250
Signed-off-by: ZhengShunQian <zhengsq@rock-chips.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Simon <xxm@rock-chips.com>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
(cherry picked from commit cd6438c5f8)
This patch replaces ARM-specific IOMMU-based DMA-mapping implementation
with generic IOMMU DMA-mapping code shared with ARM64 architecture. The
side-effect of this change is a switch from bitmap-based IO address space
management to tree-based code. There should be no functional changes
for drivers, which rely on initialization from generic arch_setup_dna_ops()
interface. Code, which used old arm_iommu_* functions must be updated to
new interface.
To avoid build failed on ARCH arm,we mannually fix the following two files that
to use arch_set_dma_ops API
arch/arm/mach-highbank/highbank.c
arch/arm/mach-mvebu/coherency.c
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Conflicts:
arch/arm/mm/dma-mapping.c
Change-Id: Iffad16a7a511d50cc8e422bc61497f117279c66d
Signed-off-by: Simon <xxm@rock-chips.com>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
(am from https://patchwork.freedesktop.org/patch/74409/)
This patch moves all the IOMMU-based DMA-mapping code from arch/arm64/mm
to drivers/iommu/dma-iommu-ops.c. This way it can be easily shared with
ARM architecture, which will also use them.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Conflicts:
arch/arm64/mm/dma-mapping.c
Change-Id: I7d56fa5e6e6ef43ae6c9c76035fcf81ee5cb7069
Signed-off-by: Simon <xxm@rock-chips.com>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
(am from https://patchwork.freedesktop.org/patch/74408/)
- new method to caculate i2c timings for rk3399:
There was an timing issue about "repeated start" time at the I2C
controller of version0, controller appears to drop SDA at .875x (7/8)
programmed clk high. On version 1 of the controller, the rule(.875x)
isn't enough to meet tSU;STA
requirements on 100k's Standard-mode. To resolve this issue,
sda_update_config, start_setup_config and stop_setup_config for I2C
timing information are added, new rules are designed to calculate
the timing information at new v1.
- pclk and function clk are separated at rk3399.
- support i2c highspeed mode: 1.7MHz for rk3399
Change-Id: I413455cf94fe7486c40694059e2f0931433992bb
Signed-off-by: David Wu <david.wu@rock-chips.com>
Switch to the new generic functions: i2c_parse_fw_timings().
Change-Id: I14c3bea8e696d0ba5467effba1a157cd86e376d6
Signed-off-by: David Wu <david.wu@rock-chips.com>
Add the clock tree definition for the new RK3399 SoC.
Change-Id: I1d8755eb7c89bdc56b79644a96a7d3fd8e7fbc4b
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.
Change-Id: I0181ec03b0c944a18391737ea6bb65c5b642a6ea
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit cab6f070ab)
add device tree bindings for rk3288 specific Synopsys DW MIPI DSI driver
Change-Id: Ie6774d527475889a6eab587e66eda607d1ea2c8b
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
(cherry picked from commit a20d86e7f9)
The BOE TV080WUM-NL0 is an 8.0", 1200x1920 (WUXGA) TFT-LCD panel
connected using four DSI lanes. It can be supported by the simple-panel
driver.
Change-Id: I4fe03fc830332e60997e98b24550801827692501
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
(cherry picked from commit c8521969de)
The BOE TV080WUM-NL0 is an 8.0", 1200x1920 (WUXGA) TFT-LCD panel
connected using four DSI lanes.
Change-Id: I963cf860315f86ca64249c8f2064acbba62276b5
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
(cherry picked from commit 86b81f3e17)
BOE Technology Group Co., Ltd. is a supplier of semiconductor display
technologies, products and services.
Change-Id: Id9a81512f6174770fc1d1282579da902fcdc89b0
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
[treding@nvidia.com: add commit message, fixup subject]
Signed-off-by: Thierry Reding <treding@nvidia.com>
(cherry picked from commit 27d23b30a5)
sclk_mipidsi_24m is the gating of mipi dsi phy.
Change-Id: I15b3e7a17b06397eb825eb2faca37d77732c9a97
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit a2f4c560f1)
Adds a new id for the sclk supplying the mipidsi on rk3288 socs.
Change-Id: Ifc3b97e4feed01098b483162d6320240d4b44cb3
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit c6d49fbcfc)
Add an id for crypto clk to the binding header, so that it can be called
in other part.
Change-Id: I541f4373cb2753aa74e2183cae82215e31faae44
Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 94d5d6a0fb)
Add PSCI node for RK3399 SoC, and cpu node enable-method property is
set to "psci".
Change-Id: I24f348b379435da88fe33f01e4b726e2e0210a9d
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
There are two watchdogs in ALIVE named WDT0 and WDT1, and
one watchdog in PMU named WDT2.
WDT0 can drive CRU to generate global software reset.
Change-Id: Ide47e7e69572d2f2a537b590dc75010cf0f56c51
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
The Rockchip driver cannot use drm_atomic_helper_wait_for_vblanks()
because it has hardware counters for neither vblanks nor scanlines.
In order to simplify re-implementing the functionality for this driver,
export the framebuffer_changed() helper so it can be reused.
Change-Id: I80e2dc3b412d2299e6d97a9421e928dc32a9b63e
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit c240906d36)
This patch manually amend some code to keep local
branch more consistent with upstream.
Change-Id: If705983f84ade4e7cebb45db8a65d34b876c7bef
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
we only add the property of regulator and clock to cpu0 and cpu4 node,
but if cpu4~cpu7 is down and then we up cpu5~cpu7, they will can not
get their regulator and clock. So we should add the properties to all
cpu node.
Change-Id: Id601fa3d3d05875f7c68f2a5472dc0eefefb6096
Signed-off-by: Feng Xiao <xf@rock-chips.com>
If DRM_FBDEV_EMULATION is not selected in the config then we can save a
bit of space by not including the framebuffer code.
Change-Id: I57b8888ebed0a0980e04a908116ad843b2fad556
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: John Keeping <john@metanate.com>
(cherry picked from commit f0442df215)
args->pitch and args->size may not be set by userspace, sometimes
userspace only malloc args and not memset args to zero, then
args->pitch and args->size is random, it is very danger to use
pitch/size on gem.
pitch's type is u32, and min_pitch's type is int, example,
pitch is 0xffffffff, then pitch < min_pitch return true, then gem will
alloc very very big bufffer, it would eat all the memory and cause kernel
crash.
Stop using pitch/size from args, calc them from other args.
Change-Id: I867d61bf6bc48a2989ae4d15a819a85a7e38d26f
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
(cherry picked from commit e3c4abdb3b)
As commented in drm_atomic_helper_wait_for_vblanks(), userspace relies
on cursor ioctls being unsynced. Converting the rockchip driver to
atomic has significantly impacted cursor performance by making every
cursor update wait for vblank.
By skipping the vblank sync when the framebuffer has not changed (as is
done in drm_atomic_helper_wait_for_vblanks()) we can avoid this for the
common case of moving the cursor and only need to delay the cursor ioctl
when the cursor icon changes.
We cannot add the check on legacy_cursor_update since that results in
the cursor bo being unreferenced while the hardware may still be reading
it. Fully supporting unsynced cursor updates is left for the future
when the atomic helper framework supports async updates.
Change-Id: I4c0e4b51ec7441fb7b7342eac5d4b98f9ca5ee62
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: John Keeping <john@metanate.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit f2227f4697)
