Commit Graph

648475 Commits

Author SHA1 Message Date
Tao Zeng
aba0c6e319 config: replace stack protector config [1/1]
PD#SWPL-4617

Problem:
CONFIG_CC_STACKPROTECTOR_STRONG will increase stack size for some large
functions and may cause stack overflow problems or increase real stack
usage after we have enabled VMAP STACK config. But direct remove it
from defconfig will cause CTS fail.

Solution:
using CONFIG_CC_STACKPROTECTOR_STRONG_AMLOGIC for real stack protect
config

Verify:
p212

Change-Id: I1ccba2ef6ab5ea6f2987af2986e0cf222da1a7c7
Signed-off-by: Tao Zeng <tao.zeng@amlogic.com>
2019-03-13 20:22:30 +08:00
Nan Li
88ab1a6088 emmc: optimize the conditions of fixdiv calc [1/1]
PD#SWPL-4857

Problem:
fixdiv calc Affect the use of other chips

Solution:
Adjust the usage conditions for the fixdiv calc func, witch
pdata->calc_f from dts.

Verify:
verify by g12b

Change-Id: I9598e2a24f76c76f4312c2694029fe4bb0f534d4
Signed-off-by: Nan Li <nan.li@amlogic.com>
2019-03-13 20:22:30 +08:00
Shunzhou Jiang
ba1047bbf0 clk: g12a/g12b: update pcie clk parameter for jitter [1/1]
PD#SWPL-4745

Problem:
update pcie parameter for jitter

Solution:
clear pcie clk parameter

Verify:
test pass on g12a skt/w400

Change-Id: I354d643c412c37fb6c99fc49ac5bd70ab12be008
Signed-off-by: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
2019-03-13 20:22:29 +08:00
Brian Zhu
5b49adddeb vpp: sr: correct the sr core0 enable switch operation [1/1]
PD#SWPL-5113

Problem:
SR core0 enable switch register is latched as default. It
will cause the screen flicker when operating this bit in vsync.
Because the frame size will be out of sync with back-end module.

Solution:
1. For g12a, no latch ctrl. So did not disable sr core2 enable bit.
2. For g12b/tl1, disable the latch function.

Verify:
Verified on U212/w400/x301

Change-Id: I54027b71ef8a6066004b3bd32ed1633b4bfa351c
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
2019-03-13 20:22:28 +08:00
Shunzhou Jiang
a89df5ec9e clk: g12a/g12b: fix syspll overflow when freq larger than 2.1g [1/1]
PD#SWPL-5076

Problem:
syspll overflow

Solution:
div 1000 when round rate

Verify:
test pass on g12a skt/w400

Change-Id: I021a1e8fd1280b27e21e5b4c8983b91fb89e84ba
Signed-off-by: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
2019-03-13 20:22:28 +08:00
Hanjie Lin
24be26b819 dts: g12b: modify sched-energy dts for w400 revision-b [1/1]
PD#SWPL-5020

Problem:
modify sched-energy dts for w400 revision-b

Solution:
modify dts

Verify:
local.

Change-Id: I6686abc10bf07ec0e601eb9a72b7657ca3e1d991
Signed-off-by: Hanjie Lin <hanjie.lin@amlogic.com>
2019-03-13 20:22:27 +08:00
pan.yang
09bac26b30 dts: add new frequency for A53 core at all g12b RevB dts [1/1]
PD#SWPL-5020

Problem:
need 1.9G for A53 core in g12b RevB.

Solution:
add 1.9G frequency for A53 core in RevB dts.

Verify:
local test.

Change-Id: Ic4085c05b3b9d18f759720e3d268d5e4629faba7
Signed-off-by: pan.yang <pan.yang@amlogic.com>
2019-03-13 20:22:26 +08:00
Jianxiong Pan
602774deda dts: fix amlogic-dt-id error in g12b dts. [1/1]
PD#SWPL-5020

Problem:
amlogic-dt-id error in g12b dts.

Solution:
specify amlogic-dt-id by dts name.

Verify:
local test.

Change-Id: I11a737ec61221c2dc9fcd4e3761c380ac5b5044b
Signed-off-by: Jianxiong Pan <jianxiong.pan@amlogic.com>
2019-03-13 20:22:26 +08:00
Jianxiong Pan
716e51c127 dts: g12b: copy g12b dts [1/1]
PD#SWPL-5020

Problem:
copy g12b dts.

Solution:
copy.

Verify:
local.

Change-Id: Ibd6423bd0cc99e98bf1d6359068f9f0719ad177f
Signed-off-by: Jianxiong Pan <jianxiong.pan@amlogic.com>
Signed-off-by: Hong Guo <hong.guo@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>

Conflicts:
	arch/arm64/boot/dts/amlogic/g12b_a311x_w411_buildroot.dts
2019-03-13 20:22:25 +08:00
MingLiang Dong
09d82d96ff hdr: used line_n_int to trigger osd rdma [2/2]
PD#SWPL-4582

Problem:
g12b revb osd blend shift issue still exist
when hdr enable/disable

Solution:
used line_n_int to trigger osd hdr rdma,
this workaround can fix shift issue

Verify:
verify by g12b revb

Change-Id: I062c31dbb5729463bae539e2ea25281d715665c9
Signed-off-by: MingLiang Dong <mingliang.dong@amlogic.com>
2019-03-13 20:22:24 +08:00
Pengcheng Chen
eaf2e4a051 rdma: used line_n_int to trigger osd, dv and hdr rdma [1/2]
PD#SWPL-4582

Problem:
g12b revb osd blend shift issue still exist
when dv and hdr enable/disable

Solution:
used line_n_int to trigger osd, dv and hdr rdma,
this workaround can fix shift issue

Verify:
verify by g12b revb

Change-Id: Ie9747b2f7aaa3a7997245f82d15831c4c3da41cf
Signed-off-by: Pengcheng Chen <pengcheng.chen@amlogic.com>
2019-03-13 20:22:24 +08:00
Yi Zhou
97071b2f14 dv: remove g12b ver B from the status of SDR mode [1/1]
PD#SWPL-4582

Problem:
g12 verA has a hardware bug.Therefore,dv cores
must keep working even if under sdr mode

Solution:
g12B verB has fixed this bug, so remove this chip id

Verify:
verify by g12b revb

Change-Id: Ice1aa1364319fa12d5a896fdfd106450f1a04d3d
Signed-off-by: Yi Zhou <yi.zhou@amlogic.com>
2019-03-13 20:22:23 +08:00
Pengcheng Chen
9b394f0c2c osd: add g12b revb to check osd shift workaround [1/1]
PD#SWPL-4582

Problem:
g12b revb fix osd blend shift issue

Solution:
add g12b revb to remove shift workaround

Verify:
verify by g12b revb

Change-Id: I6cefba0b5b5cce35d928edafdc359adff0165866
Signed-off-by: Pengcheng Chen <pengcheng.chen@amlogic.com>
2019-03-13 20:22:22 +08:00
he.he
193ef19308 usb: check SoC rev [1/2]
PD#SWPL-4582

Problem:
Need to check Soc rev to distinguish G12B revB.

Solution:
Check Soc rev set version and phy-interface for g12b revB.

Test: make w400 bootimage

Verify:
pass on W400

Change-Id: I338d7f0eed7bb61660625343404f756f0edf0d54
Signed-off-by: he.he <he.he@amlogic.com>
2019-03-13 20:22:22 +08:00
Qiufang Dai
40032d8265 cpuversion: add SoC rev api [1/2]
PD#SWPL-4582

Problem:
Need api to distinguish G12B revB

Solution:
Add rev A/B/C api

Verify:
W400

Change-Id: I5cf82fcfc513f621513914cf83d18fe5c5ec081d
Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
2019-03-13 20:22:21 +08:00
yuehu mi
cbbecf36f0 usb: remove usbphy reset 500ms wait [1/1]
PD#SWPL-4949

Problem:
kernel slow startup

Solution:
remove usbphy reset 500ms wait

Verify:
marconi platform insert U disk, power on boot verify OK

Change-Id: Ieb01e59ad428f98c3df303c7b3bee28397970c74
Signed-off-by: yuehu mi <yuehu.mi@amlogic.com>
2019-03-13 20:22:20 +08:00
Kaifu Hu
6fa3996859 dv: dolby vision support on t962x [1/1]
PD#SWPL-3318

Problem:
Android P not support dolby vision on t962x

Solution:
Porting code support dolby vision

Verify:
t962x/r311

Change-Id: I85afd05d2cb21a7105ea345f07e7e581bba5e927
Signed-off-by: Kaifu Hu <kaifu.hu@amlogic.com>
2019-03-13 20:22:20 +08:00
Jian Cao
15e8a48220 osd: osd: screen blank after boot logo [1/1]
PD#172587

Problem:
screen blank after boot logo

Solution:
correct default display information

Verify:
verified on tl1 ref board

Change-Id: I94237b5241eacee6965bfe4ea0426bb8e9f494f1
Signed-off-by: Jian Cao <jian.cao@amlogic.com>

osd: tl1 hold line fix needn't shift workaround [1/1]

PD#172587

Problem:
tl1 hold line fix needn't shift workaround.

Solution:
remove shift workaround int tl1

Verify:
verified by x301

Change-Id: I96d99758ba6f93622c34a8e69c4a3f769fdfad49
Signed-off-by: pengcheng chen <pengcheng.chen@amlogic.com>

usb: bringup usb for tl1 [1/1]

PD#172587

Problem:
bringup usb for tl1

Solution:
bringup usb for tl1.
disable usb device sof interrupt for tl1.

Verify:
verify on tl1 skt.

Change-Id: Ifbcd3b406145ac39709ff2df795544086277f00e
Signed-off-by: Yue Wang <yue.wang@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>

Conflicts:
	arch/arm/boot/dts/amlogic/mesontl1.dtsi
2019-03-13 20:22:19 +08:00
Hong Guo
3266869102 CPUFREQ: Setting different cpufreq tables according to efuse information. [1/1]
PD#SWPL-4035

Problem:
Setting different cpufreq tables according to efuse information.

Solution:
Setting different cpufreq tables according to efuse information.

Verify:
g12a_u200, verify pass

Change-Id: I1bf571f332244f5727ef3cd8743f215f71248146
Signed-off-by: Hong Guo <hong.guo@amlogic.com>
2019-03-13 20:22:18 +08:00
Shunzhou Jiang
eaca75040b mailbox: mailbox: add chip performance info read from efuse [2/2]
PD#SWPL-4035

Problem:
cpu driver need read efuse data

Solution:
add interface to read data

Verify:
g12a_skt

Change-Id: Ia5d74c3fa057d06426b4277652e508714400a30f
Signed-off-by: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
2019-03-13 20:22:18 +08:00
Hong Guo
bca2a386ba cpufreq: add more syspll freq info [1/1]
PD#SWPL-4035

Problem:
add more syspll freq info.

Solution:
add more syspll freq info.

Verify:
g12a_u200, verify pass

Change-Id: I3e2a587f5ebaa20126e6ad5c37bd9d2730a75125
Signed-off-by: Hong Guo <hong.guo@amlogic.com>
2019-03-13 20:22:17 +08:00
Jian Cao
75e3823789 gdc: reset alloc flag when free dma buffer [2/2]
PD#SWPL-4354

Problem:
alloc flag is not correct when free dma buffer

Solution:
reset alloc flag when free dma buffer

Verify:
test pass on g12a-u200

Change-Id: Idfc0be5b394d18799232f6239b3f6c6df9181ce0
Signed-off-by: Jian Cao <jian.cao@amlogic.com>
2019-03-13 20:22:16 +08:00
Jian Cao
a46b373684 ge2d: reset alloc flag when free dma buffer [1/2]
PD#SWPL-4354

Problem:
alloc flag is not correct when free dma buffer

Solution:
reset alloc flag when free dma buffer

Verify:
test pass on g12a-u200

Change-Id: I4aea27f38ebda72cfe77183423600c918b836d7c
Signed-off-by: Jian Cao <jian.cao@amlogic.com>
2019-03-13 20:22:16 +08:00
Brian Zhu
656066dc40 vpp: force vd2 using preblend when playing mvc [1/1]
PD#SWPL-3381

Problem:
vd2 used postblend as default after g12a chip

Solution:
force vd2 using preblend when playing mvc

Verify:
Locally on u212

Change-Id: Ia7fab8ad70ed1e58b7ade241828afab288b94bec
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
2019-03-13 20:22:15 +08:00
Hanjie Lin
1d5c056a8a perf_event: aml pmu interrupts routing on g12b [1/1]
PD#SWPL-3088

Problem:
g12b big-little cluster is different from other SoC with pmu
interrupts and registers.
software modifications must adapt to the difference.

Solution:
modify

Verify:
u200 w400

Change-Id: If9217c1025dff5c17d51790f8c216e31b7d6532b
Signed-off-by: Hanjie Lin <hanjie.lin@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
2019-03-13 20:22:14 +08:00
Hanjie Lin
fd4c53c84e defconfig: arm: code score is low by Antutu benchmark [1/1]
PD#SWPL-3704

Problem:
32bit code score is low by Antutu benchmark.

PD#SWPL-3704

Solution:
enable CONFIG_SCHED_WALT CONFIG_CGROUP_SCHEDTUNE CONFIG_SCHED_TUNE
referenced by arm64

Verify:
w400

Change-Id: I6f461020b0fb0e42be94f1c66f5c38defb2c6ea1
Signed-off-by: Hanjie Lin <hanjie.lin@amlogic.com>
2019-03-13 20:22:14 +08:00
Yi Zhou
34afdb958f dv: close afbc2 when playing sources with unnecessary el [1/1]
PD#SWPL-915

Problem:
DOLBY only sets the enhancement for the first frame ->
Vd sets cur_dispubf2 according to enhance ->
codec_mm keeps the last frame according to cur_dispbuf2,
so it fails -> AFBC2 access to the released content causes the trigger.

Solution:
close afbc2

Verify:
r321

Change-Id: I03c431a6ea11b8aabf97b1f0b21f717024be2f62
Signed-off-by: Yi Zhou <yi.zhou@amlogic.com>
2019-03-13 20:22:13 +08:00
Pengcheng Chen
9f334f9462 osd: fix osd_reverse casued afbc decode error [1/1]
PD#SWPL-4335

Problem:
osd_reverse casued afbc decode error

Solution:
add afbc prefect reverse when osd_reverse

Verify:
verify by tl1

Change-Id: I11730121e62935683480f42db7c43365bc91bf31
Signed-off-by: Pengcheng Chen <pengcheng.chen@amlogic.com>
2019-03-13 20:22:12 +08:00
Jiamin Ma
6a603ab085 Kconfig: fix errorly select meson8b for ARMv8 AARCH32 [1/1]
PD#SWPL-4320

Problem:
The meson8b and arm64_a32 are both selected in Kconfig,
which is quite misleading

Solution:
Disable meson8b when arm64_a32 is selected

Verify:
Locally passed for Ampere

Change-Id: I93f55239ea90bf8cf6b96e108b6fd4a239de32b4
Signed-off-by: Jiamin Ma <jiamin.ma@amlogic.com>
2019-03-13 20:22:12 +08:00
Pengcheng Chen
0995d479ec gdc: add gdc dma_buf input/output support [2/2]
PD#SWPL-4036

Problem:
gdc don't support export dma_buf

Solution:
add gdc dma_buf input/output support

Verify:
test pass on w400

Change-Id: I67a60ede01e5c01630a00fbae2821430a870c2b8
Signed-off-by: Pengcheng Chen <pengcheng.chen@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>

Conflicts:
	MAINTAINERS
2019-03-13 20:22:11 +08:00
Pengcheng Chen
b4f3eddec7 ge2d: add ge2d dma_buf support [1/2]
PD#SWPL-4036

Problem:
don't support dma_buf

Solution:
add ge2d dma_buf support

Verify:
test pass on w400

Change-Id: I1277d04fb30753e579d5edc5f46f2406dc27217a
Signed-off-by: Pengcheng Chen <pengcheng.chen@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
2019-03-13 20:22:10 +08:00
Ruixuan Li
5cc4b46815 emmc: modify dtb malloc method [1/1]
PD#SWPL-3951

Problem:
buffer malloc for dtb may failed

Solution:
malloc may sleep to wait for enough memory

Verify:
pass on p212

Change-Id: Ib4c266c17140d2a6abf2aea6c02b2ff591f0fe08
Signed-off-by: Ruixuan Li <ruixuan.li@amlogic.com>
2019-03-13 20:22:10 +08:00
Bichao Zheng
a745fd852b gpio_led: g12a: give up using led-trigger cpu0 [1/1]
PD#SWPL-4876

Problem:
32bit will operate led-trigger cpu0 in cpu idle enter/exit causing
system led flashing.

Solution:
give up using led-trigger cpu0.

Verify:
g12a_u211 g12a_u212

Change-Id: I106a4fe0e35923919f5bbc34113fa73a4ca28577
Signed-off-by: Bichao Zheng <bichao.zheng@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>

Conflicts:
	arch/arm64/boot/dts/amlogic/g12b_a311x_w411_buildroot.dts
2019-03-13 20:22:09 +08:00
Jian Hu
e5a9201a41 clk: g12a: add bt656 clock [1/1]
PD#SWPL-3359

Problem:
the bt656 clocks were missing

Solution:
1.add bt656 clocks
2.fix several errors for media clocks

Verify:
test passed on u200

Change-Id: Iff69e790c78335930d6b2ea54f7544aca464e1fb
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
2019-03-13 20:22:08 +08:00
Xuhua Zhang
e6ab0c055f bt656: fix bt656 bugs [1/1]
PD#OTT-1022

Problem:
bt656 can not work well.

Solution:
1. add clock control
2. fix bt656 id bug

Verify:
G12A U200

Change-Id: I2aaecee33fd590497d5a11cf3618fc07264f02a5
Signed-off-by: Xuhua Zhang <xuhua.zhang@amlogic.com>
2019-03-13 20:22:08 +08:00
Yong Qin
020f3ed214 cec: ceca register access fail [1/1]
PD#SWPL-4133

Problem:
cec a register access fail and cause watchdog reboot

Solution:
reduce wait counter, and check clk register

Verify:
P215

Change-Id: Ic9d97e1eca9428ffd0c4a6bfe008cd9d8303075b
Signed-off-by: Yong Qin <yong.qin@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>

Conflicts:
	drivers/amlogic/cec/hdmi_ao_cec.h
2019-03-13 20:22:07 +08:00
Yong Qin
a7099b5634 di: aptimise di flow, add some protection [1/1]
PD#SWPL-3976

Problem:
To prevent “stall when access DDR through memory interface”

Solution:
1.aptimise NRWR register access flow
2.add arb on/off and status check
3.add reset protect
4.add nr_en disable before arb status check
5.add nr_write_done sel
6.modify VPU_WRARB_MODE_L2C1 from vlsi feijun's suggest

Verify:
tl1, txlx

Change-Id: Ifb0f4f0502d957ffb2b07805575c27f4166d5717
Signed-off-by: Yong Qin <yong.qin@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>

Conflicts:
	drivers/amlogic/media/deinterlace/deinterlace.c
2019-03-13 20:22:06 +08:00
jintao xu
83b82330fe omx: add print into level control [1/1]
PD#SWPL-85

Problem:
print into level control

Solution:
print into level control

Verify:
U212

Change-Id: Ib0fdc02f26e75c20e48171bca5ebef072947d78c
Signed-off-by: jintao xu <jintao.xu@amlogic.com>
2019-03-13 20:22:06 +08:00
jintao xu
362e1c3102 omx: add two layer support [3/6]
PD#SWPL-85

Problem:
Need support two video layers feature

Solution:
1: Add videosync.
2: amlvideo support multi-instance

Verify:
U212

Change-Id: I3570fad361ba5bd388dd46c51a66da056fa7a1fd
Signed-off-by: jintao xu <jintao.xu@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>

Conflicts:
	MAINTAINERS
	drivers/amlogic/media/deinterlace/deinterlace_hw.c
2019-03-13 20:22:05 +08:00
Brian Zhu
0051dfaacd vpp: add osd and video zorder control [2/6]
PD#SWPL-85

Problem:
Upper layer need control osd and video layer zorder

Solution:
1.Add video layer zorder interface by sysfs and ioctl
2.Switch the osd and video layer order in vsync

Verify:
Verify on U212

Change-Id: Ic50e81784b865cc57e4ab9a63d74806f7a8721cf
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
2019-03-13 20:22:04 +08:00
Brian Zhu
f722263191 vpp: add two layers support for each chips [1/6]
PD#SWPL-85

Problem:
Need support two video layers feature

Solution:
1.Add vd2 mif config
2.Add vd2 pps calculation and config
3.Add vd2 axis/crop/screen mode interface by sysfs and ioctl
4.Add layer query/alloc/free interface

Verify:
Verify on U212

Change-Id: I71fc9ab2ae0230c3e84c4b790e77d2c790951642
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
2019-03-13 20:22:04 +08:00
wenfeng.guo
45056d66cc sr: add support for tl1 [1/1]
PD#172587

Problem:
Add sr driver support for tl1

Solution:
add sr driver support for tl1
fix horizontal line when play video on 4K screen

Verify:
TL1 X301

Change-Id: I422f27eb5cf12f69dc57de295425536671e2df38
Signed-off-by: wenfeng.guo <wenfeng.guo@amlogic.com>
2019-03-13 20:22:03 +08:00
Brian Zhu
d104702069 video: vpp: add vd afbc YUV 422/444 support for tl1 [1/1]
PD#172587

Problem:
Bringup TL1 vidoe driver.
TL1 need support YUV422/444 AFBC.
TL1 need check afbc source from decode or vdin.
TL1 need afbc compress loss mode.

Solution:
Merge from branch bringup/amlogic-4.9/tl1-20181111.

Verify:
verify on tl1

Change-Id: I0af62e7638db4e1c349df874ccffdeddcaa715af
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
2019-03-13 20:22:02 +08:00
Brian Zhu
073697cfea vpp: sr: disable core0 and core1 scaler latch [1/1]
PD#SWPL-3144

Problem:
The latch function cause the super scaler size asynchronous

Solution:
Disable sr core0 and core1 scaler latch

Verify:
T962x2 x301 board test pass

Change-Id: Iecbcc3e0c751093b6515f7b46973eca2157cd349
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
2019-03-13 20:22:02 +08:00
Chao Liu
2202bcd709 dts: g12a/b: config hw rng with dts [1/1]
PD#OTT-2062

Problem:
Boot up time with power cable is longer than boot up with usb cable

Solution:
config hw rng with dts

Verify:
android p + u212

Change-Id: I61613e945dbc9be06f2cbb29aae5043c84fca1de
Signed-off-by: Chao Liu <chao.liu@amlogic.com>
2019-03-13 20:22:01 +08:00
Pengcheng Chen
1dd592dfbf osd: fix some fence issue [2/2]
PD#SWPL-3348

Problem:
fix some fence issue

Solution:
1. add blank operation to FBIOPUT_OSD_SYNC_RENDER_ADD
2. move canvas_config to osd_setting_blend

Verify:
verify by franklin

Change-Id: I5d1ebb697ff542e5c36dab0dae9b322ec4e1fa16
Signed-off-by: Pengcheng Chen <pengcheng.chen@amlogic.com>
2019-03-13 20:22:00 +08:00
Zongdong Jiao
aad987584b hdmitx: sync hdmi_audio uevent to hdmi hpd
Change-Id: I39512030f058ab9c72ee4c779f3b692898440271
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
2019-03-13 20:22:00 +08:00
Zhuo Wang
6b195f8476 ethernet: handle tx timeout
PD# 169839

After do suspend/resume circularly, sometimes ethernet can't recover from
suspend. Add a phy reset when every resume.

Change-Id: Id03223a9c62f4dcab1cdfbc4805cc3b4c0212cf5
Signed-off-by: Shen Liu <shen.liu@amlogic.com>
2019-03-13 20:19:54 +08:00
Shuai Li
aeb98641df audio: fix samesource clk after play DDP [1/1]
PD#SWPL-4331

Problem:
Same source clk doesn't recover to 48K
after playback 192k DDP stream.

Solution:
Add ways to recover the clk.

Verify:
Local verified

Change-Id: If410d9ca04446c35bafebe2913b01e19b5fee224
Signed-off-by: Shuai Li <shuai.li@amlogic.com>
2019-03-04 20:07:16 +08:00
Shuai Li
47425f47c1 audio: audio glitch at tdm startup [1/1]
PD#SWPL-5219

Problem:
audio glitch at tdm startup

Solution:
Pad 0 data to clear the remaining data
in the module.

Verify:
Local tested.

Change-Id: Iab526c6893a32030799567b57e05e7bb11b8fea0
Signed-off-by: Shuai Li <shuai.li@amlogic.com>
2019-03-04 20:01:53 +08:00