Fenrir Lin
afd6fc2034
ARM: dts: rockchip: fix ircut's gpio for rv1126-bat-evb-v10
...
fix the reverse problem.
Signed-off-by: Fenrir Lin <fenrir.lin@rock-chips.com >
Change-Id: I924f5c272a37a7959cc4c44552c5035610b06a58
2021-08-25 14:34:59 +08:00
Zhenke Fan
34b4a03fee
media: i2c: imx415 add 1080p binning mode
...
Signed-off-by: Zhenke Fan <fanzy.fan@rock-chips.com >
Change-Id: I5b4a1f2c728d6f45406c2efd5c3cc9c9306ccb3a
2021-08-25 11:27:27 +08:00
Sugar Zhang
6fc680cb0d
ASoC: rockchip: i2s-tdm: Make soc_data symbol const
...
Change-Id: Id78f5f2d79f6345c97456e99ae107716e1a5f560
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com >
2021-08-25 10:19:42 +08:00
Yiqing Zeng
4fcf674a20
media: i2c: gc4663 change mclk from 27Mhz to 24Mhz
...
Signed-off-by: Yiqing Zeng <zack.zeng@rock-chips.com >
Change-Id: I9721b400111954589a8dc4c24fcda25cb7eb77f1
2021-08-24 16:56:17 +08:00
Jianqun Xu
b1782ee4d7
pinctrl: rockchip: sync with upstream only codingstyle
...
Do coding style for mux route struct.
The mux route tables take many lines for each SoC, and it will be more
instances for newly SoC, that makes the file size increase larger.
This patch only do coding style for mux route struct, by adding a new
definition and replace the structs by script which supplied by
huangtao@rock-chips.com
sed -i -e "
/static struct rockchip_mux_route_data /bcheck
b
:append-next-line
N
:check
/^[^;]*$/bappend-next-line
s/[[:blank:]]*.bank_num = \([[:digit:]]*,\)\n/\tRK_MUXROUTE_SAME(\1/g
s/[[:blank:]]*.pin =[[:blank:]]*0,\n/ RK_PA0,/g
s/[[:blank:]]*.pin =[[:blank:]]*1,\n/ RK_PA1,/g
s/[[:blank:]]*.pin =[[:blank:]]*2,\n/ RK_PA2,/g
s/[[:blank:]]*.pin =[[:blank:]]*3,\n/ RK_PA3,/g
s/[[:blank:]]*.pin =[[:blank:]]*4,\n/ RK_PA4,/g
s/[[:blank:]]*.pin =[[:blank:]]*5,\n/ RK_PA5,/g
s/[[:blank:]]*.pin =[[:blank:]]*6,\n/ RK_PA6,/g
s/[[:blank:]]*.pin =[[:blank:]]*7,\n/ RK_PA7,/g
s/[[:blank:]]*.pin =[[:blank:]]*8,\n/ RK_PB0,/g
s/[[:blank:]]*.pin =[[:blank:]]*9,\n/ RK_PB1,/g
s/[[:blank:]]*.pin =[[:blank:]]*10,\n/ RK_PB2,/g
s/[[:blank:]]*.pin =[[:blank:]]*11,\n/ RK_PB3,/g
s/[[:blank:]]*.pin =[[:blank:]]*12,\n/ RK_PB4,/g
s/[[:blank:]]*.pin =[[:blank:]]*13,\n/ RK_PB5,/g
s/[[:blank:]]*.pin =[[:blank:]]*14,\n/ RK_PB6,/g
s/[[:blank:]]*.pin =[[:blank:]]*15,\n/ RK_PB7,/g
s/[[:blank:]]*.pin =[[:blank:]]*16,\n/ RK_PC0,/g
s/[[:blank:]]*.pin =[[:blank:]]*17,\n/ RK_PC1,/g
s/[[:blank:]]*.pin =[[:blank:]]*18,\n/ RK_PC2,/g
s/[[:blank:]]*.pin =[[:blank:]]*19,\n/ RK_PC3,/g
s/[[:blank:]]*.pin =[[:blank:]]*20,\n/ RK_PC4,/g
s/[[:blank:]]*.pin =[[:blank:]]*21,\n/ RK_PC5,/g
s/[[:blank:]]*.pin =[[:blank:]]*22,\n/ RK_PC6,/g
s/[[:blank:]]*.pin =[[:blank:]]*23,\n/ RK_PC7,/g
s/[[:blank:]]*.pin =[[:blank:]]*24,\n/ RK_PD0,/g
s/[[:blank:]]*.pin =[[:blank:]]*25,\n/ RK_PD1,/g
s/[[:blank:]]*.pin =[[:blank:]]*4,\n/ RK_PA4,/g
s/[[:blank:]]*.pin =[[:blank:]]*5,\n/ RK_PA5,/g
s/[[:blank:]]*.pin =[[:blank:]]*6,\n/ RK_PA6,/g
s/[[:blank:]]*.pin =[[:blank:]]*7,\n/ RK_PA7,/g
s/[[:blank:]]*.pin =[[:blank:]]*8,\n/ RK_PB0,/g
s/[[:blank:]]*.pin =[[:blank:]]*9,\n/ RK_PB1,/g
s/[[:blank:]]*.pin =[[:blank:]]*10,\n/ RK_PB2,/g
s/[[:blank:]]*.pin =[[:blank:]]*11,\n/ RK_PB3,/g
s/[[:blank:]]*.pin =[[:blank:]]*12,\n/ RK_PB4,/g
s/[[:blank:]]*.pin =[[:blank:]]*13,\n/ RK_PB5,/g
s/[[:blank:]]*.pin =[[:blank:]]*14,\n/ RK_PB6,/g
s/[[:blank:]]*.pin =[[:blank:]]*15,\n/ RK_PB7,/g
s/[[:blank:]]*.pin =[[:blank:]]*16,\n/ RK_PC0,/g
s/[[:blank:]]*.pin =[[:blank:]]*17,\n/ RK_PC1,/g
s/[[:blank:]]*.pin =[[:blank:]]*18,\n/ RK_PC2,/g
s/[[:blank:]]*.pin =[[:blank:]]*19,\n/ RK_PC3,/g
s/[[:blank:]]*.pin =[[:blank:]]*20,\n/ RK_PC4,/g
s/[[:blank:]]*.pin =[[:blank:]]*21,\n/ RK_PC5,/g
s/[[:blank:]]*.pin =[[:blank:]]*22,\n/ RK_PC6,/g
s/[[:blank:]]*.pin =[[:blank:]]*23,\n/ RK_PC7,/g
s/[[:blank:]]*.pin =[[:blank:]]*24,\n/ RK_PD0,/g
s/[[:blank:]]*.pin =[[:blank:]]*25,\n/ RK_PD1,/g
s/[[:blank:]]*.pin =[[:blank:]]*26,\n/ RK_PD2,/g
s/[[:blank:]]*.pin =[[:blank:]]*27,\n/ RK_PD3,/g
s/[[:blank:]]*.pin =[[:blank:]]*28,\n/ RK_PD4,/g
s/[[:blank:]]*.pin =[[:blank:]]*29,\n/ RK_PD5,/g
s/[[:blank:]]*.pin =[[:blank:]]*30,\n/ RK_PD6,/g
s/[[:blank:]]*.pin =[[:blank:]]*31,\n/ RK_PD7,/g
s/[[:blank:]]*.func = \([[:digit:]]*,\)\n/ \1/g
s/[[:blank:]]*.route_location =[[:blank:]]*\([[:print:]]*,\)\n//g
s/[[:blank:]]*.route_offset = \(0x[[:xdigit:]]*,\)\n/ \1/g
s/[[:blank:]]*.route_val =[[:blank:]]*\([[:print:]]*\),\n/ \1),/g
s/\t{\n//g
s/\t}, {\n//g
s/\t},//g
s/[[:blank:]]*\(\/\*[[:print:]]*\*\/\)\n[[:blank:]]*RK_MUXROUTE_SAME(\([[:print:]]*\)),\n/\tRK_MUXROUTE_SAME(\2), \1\n/g
s/[[:blank:]]*\(\/\*[[:print:]]*\*\/\)\n[[:blank:]]*RK_MUXROUTE_SAME(\([[:print:]]*\)),/\tRK_MUXROUTE_SAME(\2), \1\n/g
" drivers/pinctrl/pinctrl-rockchip.c
Reviewed-by: Heiko Stuebner <heiko@sntech.de >
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com >
Link: https://lore.kernel.org/r/20210420091240.1246429-1-jay.xu@rock-chips.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org >
(cherry picked from commit fe202ea8e5jay.xu@rock-chips.com >
2021-08-24 15:39:37 +08:00
Wang Panzhenzhuan
8d3dc35ee7
media: i2c: gc2093: update sensor driver
...
1. fix linear mode ae flicker issue.
2. add hdr mode exposure limit issue.
3. fix hdr mode highlighting pink issue.
4. add some debug info.
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com >
Change-Id: I270501bfc382f6d811d4267469cc9406cf6e99c7
2021-08-24 15:39:15 +08:00
Finley Xiao
a60e77777e
PM / devfreq: Remove DEVFREQ_GOV_SIMPLE_ONDEMAND dependency for dmc
...
Change-Id: Ie08689996ee4f3554c2d0e6bef61d23029bc5d07
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com >
2021-08-24 15:07:05 +08:00
Finley Xiao
232af002ef
PM / devfreq: rockchip_dmc: Add rockchip_simple_ondemand_data
...
Add a new struct rockchip_simple_ondemand_data so that rockchip_dmc.c
does not need to depend on CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND.
Change-Id: Iafe7ec8bbc9a36aaf3dffbe669a8ee927f45d3a1
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com >
2021-08-24 14:54:33 +08:00
Jianqun Xu
e649ca006e
rknpu: add fake platform device to rknpu device
...
The device 'fake_dev' under rknpu_dev is registered by rknpu_drv, which
is a virtual platform device.
The rknpu partial sync should use a platform device without iommu, so to
use rknpu_dev->fake_dev.
Change-Id: I33f1b05d308063f235d31044f8e562755c1217f4
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com >
Signed-off-by: Felix Zeng <felix.zeng@rock-chips.com >
2021-08-24 14:21:35 +08:00
Zhen Chen
c7641517d1
MALI: utgard: select DEVFREQ_GOV_SIMPLE_ONDEMAND when MALI_DEVFREQ enabled
...
MALI_DEVFREQ is enabled by default.
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com >
Change-Id: I8fdbcc2c45bba35c514ca6ddc58b0e9c6a38cf2c
2021-08-24 11:32:01 +08:00
Zhen Chen
ccf17141f9
MALI: midgard: select DEVFREQ_GOV_SIMPLE_ONDEMAND when MALI_DEVFREQ enabled
...
MALI_DEVFREQ is enabled by default.
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com >
Change-Id: I1b86565fc72ab6678c0252ddba0d7098e4997bd3
2021-08-24 11:31:58 +08:00
Zhen Chen
bd982a6809
MALI: bifrost: select DEVFREQ_GOV_SIMPLE_ONDEMAND when MALI_BIFROST_DEVFREQ enabled
...
MALI_BIFROST_DEVFREQ is enabled by default.
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com >
Change-Id: I25b8af723f33d6d262bbaa30c69c16377eaaa3a4
2021-08-24 11:31:56 +08:00
Shawn Lin
585dcf2413
mmc: dw_mmc: Set vqmmc to 3v3 before disabling it
...
Disabling vqmmc without setting IO domain could
cause SoC damage found in some Rockchip platforms.
To cope with the fix from IO domain, add this patch
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com >
Change-Id: I05c53e78c073737cd0f7af9a206b9f588ffa4636
2021-08-24 09:26:44 +08:00
Finley Xiao
7b83efeaa4
PM / devfreq: rockchip_dmcdbg: build depends on CPU config
...
This optimizes the size of rockchip-otp.o, details as follows.
./scripts/bloat-o-meter rockchip_dmc_dbg-old.o rockchip_dmc_dbg.o
add/remove: 0/3 grow/shrink: 1/1 up/down: 248/-640 (-392)
Function old new delta
rv1126_dmcdbg_init 588 836 +248
px30_dmcdbg_init 92 - -92
rk_dmcdbg_sip_smc_match_ver 164 - -164
proc_dmcdbg_init 188 - -188
rockchip_dmcdbg_of_match 588 392 -196
Total: Before=9476, After=9084, chg -4.14%
Change-Id: Ib8b3ef4ebffe9c73e4a2b4541a696ed4b3524180
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com >
2021-08-23 17:33:57 +08:00
Finley Xiao
85ab7a4805
PM / devfreq: rockchip-dfi: build depends on CPU config
...
This optimizes the size of rockchip-otp.o, details as follows.
./scripts/bloat-o-meter rockchip-dfi-old.o rockchip-dfi.o
add/remove: 0/20 grow/shrink: 0/1 up/down: 0/-3564 (-3564)
Function old new delta
rk3368_dfi_set_event 8 - -8
rk3288_dfi_set_event 8 - -8
rk3128_dfi_set_event 8 - -8
rk3368_dfi_ops 20 - -20
rk3288_dfi_ops 20 - -20
rk3128_dfi_ops 20 - -20
rk3368_dfi_disable 36 - -36
rk3288_dfi_disable 36 - -36
rk3128_dfi_disable 36 - -36
rk3368_dfi_enable 40 - -40
rk3288_dfi_enable 40 - -40
rk3128_dfi_enable 40 - -40
rk3368_dfi_init 76 - -76
rk3128_dfi_init 76 - -76
rk3328_dfi_init 212 - -212
rk3128_dfi_get_event 212 - -212
rk3288_dfi_init 240 - -240
rockchip_dfi_init 256 - -256
rk3368_dfi_get_event 260 - -260
rk3288_dfi_get_event 352 - -352
rockchip_dfi_id_match 1960 392 -1568
Total: Before=5144, After=1580, chg -69.28%
Change-Id: Ibb2b001fb9afdcb6fec5db9d075c71b3abb6fbf3
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com >
2021-08-23 17:30:31 +08:00
Finley Xiao
e3f1c67586
nvmem: rockchip-otp: build depends on CPU config
...
This optimizes the size of rockchip-otp.o, details as follows.
./scripts/bloat-o-meter rockchip-otp-old.o rockchip-otp.o
add/remove: 0/9 grow/shrink: 0/1 up/down: 0/-2224 (-2224)
Function old new delta
px30_otp_clocks 12 - -12
rk3568_otp_clocks 16 - -16
rk3568_data 24 - -24
px30_data 24 - -24
rockchip_otp_reset 128 - -128
px30_otp_ecc_enable 164 - -164
px30_otp_wait_status 176 - -176
px30_otp_read 416 - -416
rockchip_otp_match 980 392 -588
rk3568_otp_read 676 - -676
Total: Before=4721, After=2497, chg -47.11%
Change-Id: I960a51e826a17112d822daa2b77470e482e729d7
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com >
2021-08-23 17:27:51 +08:00
Jon Lin
7072fb7bc5
drivers: rkflash: Add RK_SFTL configuration
...
Avoid adding redundant FTL code to SPI Nand MTD case.
make ARCH=arm rv1126_defconfig test, size -t drivers/rkflash/built-in.a
the former size:
CONFIG_RK_SFC_NAND=y
CONFIG_RK_SFC_NAND_MTD=y
CONFIG_RK_SFC_NOR=y
CONFIG_RK_SFC_NOR_MTD=y
text data bss dec hex filename
83237 2757 23716 109710 1ac8e (TOTALS)
after adjust:
31677 2705 3624 38006 9476 (TOTALS)
For Nor only:
CONFIG_RK_SFC_NOR=y
CONFIG_RK_SFC_NOR_MTD=y
19350 1237 2568 23155 5a73 (TOTALS)
Change-Id: I46186393de26512566cc62ceb1490ef35a70be1d
Signed-off-by: Jon Lin <jon.lin@rock-chips.com >
2021-08-23 17:24:51 +08:00
Jianqun Xu
69a034d297
power/avs: rockchip-io-domain: rv1126 use separated notify
...
RV1126 set 3.3V before regulator disable.
Do a fix to rockchip io-domain, follow this orders:
* system running state
-> io-domain vsel to 3.3V (actually is done by event-disable)
-> regulator_enable
-> vsel change according to regulator voltage
* system running state
-> regulator_disable
-> io-domain vsel to 3.3V
The bug only instance on RV1126, and tested on RV1126 EVB DDR3 V10.
Change-Id: Ic9d6b05d07b050c392e415786cf6390cc1c5aa9e
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com >
2021-08-23 14:45:41 +08:00
Jianqun Xu
15957347d6
regulator: core: notify regulator enable with the voltage value on rv1126
...
Get the voltage of regulator and then pass it as the parameter of
notify, the driver could take it.
The origin parameter for notify is NULL, so this patch do nothing effect
to other driver who not care about the voltage value.
Change-Id: I22a626132d99501f6f9b25371543ab3c99cb0e02
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com >
2021-08-23 14:44:33 +08:00
Jianqun Xu
481558c7e6
power/avs: rockchip-io-domain: build depends on CPU config
...
Before:
text data bss dec hex filename
9217 240 0 9457 24f1 drivers/power/avs/rockchip-io-domain.o
After:
text data bss dec hex filename
2739 144 0 2883 b43 drivers/power/avs/rockchip-io-domain.o
Change-Id: Ibdaeb4f9e73b4c653fe854c101d181f28d52b481
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com >
2021-08-23 14:22:27 +08:00
Andy Yan
649b7048be
drm/rockchip: abort commit when drm_atomic_helper_swap_state failed
...
cleanup_planes and return when swap_state failed.
Change-Id: Icbdceb83a16747d42826bd443a6c43fcf3675592
Signed-off-by: Andy Yan <andy.yan@rock-chips.com >
2021-08-23 10:14:52 +08:00
Shawn Lin
6b6c461051
arm64: dts: rockchip: rk356x-evb: fix pcie supply to regulator-fixed
...
Commit 6de4caa7dfe81fbbddde6de4caa7dfe81fbbdddeshawn.lin@rock-chips.com >
Change-Id: Ibebca2464f3b432114111a774ace14ed1e249ddb
2021-08-19 19:14:27 +08:00
Cai YiWei
360cca1de4
media: rockchip: isp: fix sp no output when hdr dynamic switch
...
Change-Id: Idbb35a9c40e62fbc876345aaa516a842416c1bb3
Signed-off-by: Cai YiWei <cyw@rock-chips.com >
2021-08-19 19:13:19 +08:00
Cai YiWei
d0eadda766
media: rockchip: isp: off unused interrupt of csi
...
Change-Id: Iecbd33f2f48dc73fc34af8ee90738db031ee2ffe
Signed-off-by: Cai YiWei <cyw@rock-chips.com >
2021-08-19 19:13:19 +08:00
Cai YiWei
a577b34708
media: rockchip: ispp: off unused interrupt
...
Change-Id: I72a7d6b494a5bfc9a7b265d6b8a31beb233addac
Signed-off-by: Cai YiWei <cyw@rock-chips.com >
2021-08-19 19:13:19 +08:00
Jianqun Xu
9436928e3f
Revert "ANDROID: GKI: add ARCH_NR_GPIO for ABI match"
...
This reverts commit f7853bfd22jay.xu@rock-chips.com >
2021-08-19 15:42:56 +08:00
Yandong Lin
a112273253
video: rockchip: mpp: fix hw hang issue
...
When the CPU is busy, there may be a situation:
1. After the software timeout task of the current task is mounted
2. Than the thread is cut away for too long, and the hardware is
not configured at this time,
3. The software timeout is triggered to go to reset and poweroff.
4. The thread switches back to configure the hardware
5. The hardware is stuck.
Solution:
In the software timeout processing function, judge whether the hardware
at this time has been configured to start.
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com >
Change-Id: I00c0794bb2f27690ab8a2341b3bee2d3f942adf8
2021-08-19 15:02:09 +08:00
Yu Qiaowei
6ecd6c18bc
video/rockchip: rga2: Change the way to alloc memory in rga slt mode.
...
1. Fix compile error when debugfs is disable.
2. Using get_page to alloc memory can save 1250KB(64-bit)/625KB(32-bit)
of memory in the data segment.
./scripts/bloat-o-meter -c drivers/video/rockchip/rga2/rga2_drv.o.old
drivers/video/rockchip/rga2/rga2_drv.o
add/remove: 1/0 grow/shrink: 1/1 up/down: 396/-104 (292)
Function old new delta
rga2_slt 864 1124 +260
rga2_service_session_clear.constprop - 136 +136
rga2_release 292 188 -104
Total: Before=18736, After=19028, chg +1.56%
add/remove: 1/3 grow/shrink: 0/0 up/down: 8/-1280008 (-1280000)
Data old new delta
__addressable_rga2_init2808 - 8 +8
__addressable_rga2_init2895 8 - -8
src_buf 640000 - -640000
dst_buf 640000 - -640000
Total: Before=1282092, After=2092, chg -99.84%
add/remove: 0/0 grow/shrink: 1/0 up/down: 9/0 (9)
RO Data old new delta
__func__ 57 66 +9
Total: Before=1537, After=1546, chg +0.59%
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com >
Change-Id: I21c36a268c86b75da7b9e8da5eaf4f1f698c9737
2021-08-18 19:50:50 +08:00
Elaine Zhang
dd0cb993be
clk: rockchip: optimize static memory consume
...
./scripts/bloat-o-meter clk-pll_old.o clk-pll.o
add/remove: 3/36 grow/shrink: 3/3 up/down: 1832/-7395 (-5563)
Function old new delta
rockchip_pll_clk_set_by_auto.constprop - 908 +908
rockchip_rk3066_pll_clk_set_by_auto.constprop - 508 +508
rockchip_rk3036_pll_init 236 416 +180
rockchip_rk3036_pll_set_rate 80 228 +148
rockchip_rk3036_pll_get_params - 72 +72
rockchip_rk3036_pll_recalc_rate 336 352 +16
clk_boost_list 4 - -4
__initcall_boost_debug_init7 4 - -4
clk_boost_lock 20 - -20
boost_summary_open 20 - -20
boost_config_open 20 - -20
rockchip_rk3399_pll_is_enabled 24 - -24
rockchip_rk3399_pll_disable 24 - -24
rockchip_rk3066_pll_is_enabled 24 - -24
rockchip_rk3066_pll_disable 24 - -24
rockchip_rk3399_pll_enable 32 - -32
rockchip_rk3066_pll_enable 32 - -32
rockchip_rk3036_pll_set_params 376 344 -32
rockchip_boost_disable_recovery_sw 64 - -64
boost_config_show 76 - -76
rockchip_rk3399_pll_clk_ops 104 - -104
rockchip_rk3399_pll_clk_norate_ops 104 - -104
rockchip_rk3066_pll_clk_ops 104 - -104
rockchip_rk3066_pll_clk_norate_ops 104 - -104
rockchip_rk3399_pll_set_rate 108 - -108
rockchip_rk3399_pll_wait_lock 116 - -116
rockchip_rk3066_pll_set_rate 120 - -120
rockchip_boost_add_core_div 120 - -120
rockchip_clk_register_pll 1124 1000 -124
rockchip_boost_enable_recovery_sw_low 144 - -144
rockchip_rk3066_pll_init 156 - -156
boost_summary_fops 160 - -160
boost_config_fops 160 - -160
rockchip_rk3066_pll_recalc_rate 172 - -172
rockchip_pll_wait_lock 236 - -236
rockchip_rk3399_pll_init 240 - -240
rockchip_pll_con_to_rate 252 - -252
__func__ 404 141 -263
rockchip_rk3399_pll_recalc_rate 288 - -288
boost_debug_init 316 - -316
rockchip_rk3399_pll_set_params 392 - -392
boost_summary_show 404 - -404
rockchip_rk3066_pll_set_params 436 - -436
rockchip_boost_init 864 - -864
rockchip_get_pll_settings 1508 - -1508
Total: Before=10678, After=5115, chg -52.10%
./scripts/bloat-o-meter clk-cpu_old.o clk-cpu.o
add/remove: 0/0 grow/shrink: 0/2 up/down: 0/-72 (-72)
Function old new delta
rockchip_cpuclk_notifier_cb 1716 1700 -16
rockchip_clk_register_cpuclk 728 672 -56
Total: Before=2694, After=2622, chg -2.67%
./scripts/bloat-o-meter clk-ddr_old.o clk-ddr.o
add/remove: 0/9 grow/shrink: 0/1 up/down: 0/-780 (-780)
Function old new delta
ddr_clk_cached 4 - -4
rockchip_clk_register_ddrclk 352 312 -40
rockchip_ddrclk_scpi_recalc_rate 44 - -44
rockchip_ddrclk_scpi_round_rate 48 - -48
rockchip_ddrclk_scpi_set_rate 96 - -96
rockchip_ddrclk_sip_ops 104 - -104
rockchip_ddrclk_scpi_ops 104 - -104
rockchip_ddrclk_sip_round_rate 108 - -108
rockchip_ddrclk_sip_recalc_rate 112 - -112
rockchip_ddrclk_sip_set_rate 120 - -120
Total: Before=1761, After=981, chg -44.29%
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com >
Change-Id: I469229b9566af1cab6cc3a6bb9f4f8e308e0eded
2021-08-18 18:09:20 +08:00
Xiao Ya peng
b914f22e17
arm64: configs: rk3568_nvr.config: enabled CONFIG_HZ_100.
...
disabled CONFIG_HIGH_RES_TIMERS
Signed-off-by: Xiao Ya peng <yp.xiao@rock-chips.com >
Change-Id: I8fcfa9880d1988536888081b2fccc2e3c58431ed
2021-08-18 18:05:33 +08:00
Elaine Zhang
8d535fdb81
thermal: rockchip: optimize static memory consume
...
$ ./scripts/bloat-o-meter rockchip_thermal_olg.o rockchip_thermal.o
add/remove: 0/32 grow/shrink: 1/1 up/down: 500/-6844 (-6344)
Function old new delta
rk_tsadcv2_get_temp 20 520 +500
temp_last 4 - -4
prob_last 4 - -4
bounding_cnt 4 - -4
rk_tsadcv2_irq_ack 16 - -16
rk_tsadcv3_control 24 - -24
rk_tsadcv2_tshut_mode 44 - -44
rk_tsadcv2_initialize 48 - -48
rk_tsadcv5_initialize 68 - -68
rk_tsadcv4_initialize 68 - -68
rv1108_tsadc_data 84 - -84
rk3568_tsadc_data 84 - -84
rk3399_tsadc_data 84 - -84
rk3368_tsadc_data 84 - -84
rk3366_tsadc_data 84 - -84
rk3328_tsadc_data 84 - -84
rk3308_tsadc_data 84 - -84
rk3288_tsadc_data 84 - -84
rk3228_tsadc_data 84 - -84
rk1808_tsadc_data 84 - -84
px30_tsadc_data 84 - -84
rk_tsadcv7_initialize 180 - -180
rk_tsadcv3_initialize 208 - -208
rk_tsadcv3_get_temp 244 - -244
rk3328_code_table 280 - -280
rv1108_table 288 - -288
rk3568_code_table 288 - -288
rk3399_code_table 288 - -288
rk3368_code_table 288 - -288
rk3288_code_table 288 - -288
rk3228_code_table 288 - -288
rk1808_code_table 288 - -288
rk_tsadcv2_code_to_temp 556 - -556
of_rockchip_thermal_match 2548 392 -2156
Total: Before=12093, After=5749, chg -52.46%
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com >
Change-Id: I506a6135907942abcb60684f9f0888a238950421
2021-08-18 16:58:37 +08:00
Liang Chen
289a92b87e
cpufreq: rockchip: do not select CONFIG_CPUFREQ_DT_PLATDEV for cpufreq-dt
...
cpufreq-dt-platdev.c is useless on rockchip platform, remove it and save
memory.
$ ./scripts/bloat-o-meter vmlinux_before vmlinux
add/remove: 0/4 grow/shrink: 0/0 up/down: 0/-18284 (-18284)
Function old new delta
__initcall_cpufreq_dt_platdev_init6 4 - -4
cpufreq_dt_platdev_init 248 - -248
blacklist 8232 - -8232
whitelist 9800 - -9800
Total: Before=10211366, After=10193082, chg -0.18%
Change-Id: Ibcc15aa3a8b13afa208c77979b75c617aeaef5fb
Signed-off-by: Liang Chen <cl@rock-chips.com >
2021-08-18 16:44:33 +08:00
Liang Chen
745d67d98a
cpufreq: rockchip: optimize static memory consume
...
$ ./scripts/bloat-o-meter drivers/cpufreq/rockchip-cpufreq.o.before drivers/cpufreq/rockchip-cpufreq.o
add/remove: 0/3 grow/shrink: 0/1 up/down: 0/-2196 (-2196)
Function old new delta
px30_get_soc_info 208 - -208
rk3399_get_soc_info 360 - -360
rk3288_get_soc_info 648 - -648
rockchip_cpufreq_of_match 1568 588 -980
Total: Before=5053, After=2857, chg -43.46%
Change-Id: I7db697bf92ee552b6e3b28211ee64e509e99b0d3
Signed-off-by: Liang Chen <cl@rock-chips.com >
2021-08-18 16:38:56 +08:00
Herman Chen
1cbabbe2f1
arm64: dts: rockchip: rk3568: rkvdec enable link mode
...
Signed-off-by: Herman Chen <herman.chen@rock-chips.com >
Change-Id: Iecec544986ef0a5bccddef58a2d1e1cedfff69fd
2021-08-18 15:07:43 +08:00
Herman Chen
de603806f0
video: rockchip: mpp: rkvdec2: Add link mode flow
...
rkvdec2 link mode use a new serialized work flow.
This process is for link mode decoder in RK356x.
The new flow run async with hardware and use multiple trigger event to
run the work thread. All task operation, power operation and reset
operation are serialzed in one thread with certain order.
This is mainly for runtime debug and it will simplify the system design.
rkvdec2 link mode use two sets of counters to control the hardware io:
1. write / read task for preparing link mode task to ddr.
2. send / recv task for sending / receiving task from hardware.
All the operations are serialized in single work thread. So only a few
of lock and atomic is required.
The decoded counter and total counter are the synchronization method
between driver and hardware.
NOTE:
1. link mode reset should use sip_reset.
2. link mode should not change hardware frequency or power off when
there is still task running.
3. link mode should not access hardware when there is an error happen.
4. link mode should reserve a stuff task for H.264 decode task.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com >
Change-Id: I7736d54a64225089cd6d1b6522f660ce4481d437
2021-08-18 11:20:58 +08:00
Elaine Zhang
eb2460ac41
soc: rockchip: pm-domain: optimize static memory consume
...
$ ./scripts/bloat-o-meter pm_domains_old.o pm_domains.o
dd/remove: 0/22 grow/shrink: 0/1 up/down: 0/-9328 (-9328)
Function old new delta
rk3568_pmu 44 - -44
rk3399_pmu 44 - -44
rk3368_pmu 44 - -44
rk3366_pmu 44 - -44
rk3328_pmu 44 - -44
rk3288_pmu 44 - -44
rk3228_pmu 44 - -44
rk3128_pmu 44 - -44
rk3036_pmu 44 - -44
rk1808_pmu 44 - -44
px30_pmu 44 - -44
rk3128_pm_domains 220 - -220
rk3036_pm_domains 308 - -308
rk1808_pm_domains 396 - -396
rk3328_pm_domains 440 - -440
rk3228_pm_domains 484 - -484
rk3366_pm_domains 528 - -528
rk3288_pm_domains 616 - -616
px30_pm_domains 660 - -660
rk3568_pm_domains 704 - -704
rk3368_pm_domains 748 - -748
rk3399_pm_domains 1584 - -1584
rockchip_pm_domain_dt_match 2548 392 -2156
Total: Before=17357, After=8029, chg -53.74%
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com >
Change-Id: I1b8b307736edc9c02720c11460041e54fc6b98dd
2021-08-18 09:51:12 +08:00
Algea Cao
7dd8c3a4ce
drm/rockchip: dw_hdmi: Support skip check yuv420 mode valid
...
Do this check in userspace.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com >
Change-Id: I1a3b8510a58cdc0f1459c71ad6983a9ebf7240ce
2021-08-17 16:57:24 +08:00
Algea Cao
33955b1ed6
arm64: dts: rockchip: rk3568-nvr: Add hdmi property skip-check-420-mode
...
NVR product isn't need to check yuv420 mode valid in hdmi driver.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com >
Change-Id: I56264bd3e4a9a3e9d5ddbec48e36fb816dd1de65
2021-08-17 16:57:24 +08:00
Andy Yan
35e377f262
drm/rockchip: Use a standalone mutex_lock protect planes configuration
...
Fix a deadlock on commit_lock when flush commit_work on async
commit mode:
mutex_lock(&private->commit_lock);
flush_work(&private->commit_work);
rockchip_atomic_commit_complete
mutex_lock(&prv->commit_lock);
drm_atomic_helper_commit_planes(dev, state, true);
[root@RK356X:/]# echo w > /proc/sysrq-trigger
[73134.630331] sysrq: Show Blocked State
[73134.630406] task PC stack pid father
[73134.630544] weston D 0 585 1 0x00000000
[73134.630584] Call trace:
[73134.630648] __switch_to+0xc0/0x124
[73134.630698] __schedule+0x6f0/0x778
[73134.630739] schedule+0x70/0x84
[73134.630779] [root@RK356X:/]# schedule_timeout+0x4c/0x3d0
[73134.630817] wait_for_common+0xe0/0x17c
[73134.630844] wait_for_completion+0x28/0x34
[73134.630878] __flush_work+0x118/0x1ac
[73134.630918] flush_work+0x24/0x30
[73134.630961] rockchip_drm_atomic_commit+0x154/0x220
[73134.631005] drm_atomic_nonblocking_commit+0x54/0x60
[73134.631047] drm_atomic_helper_page_flip+0x6c/0xa8
[73134.631089] drm_mode_page_flip_ioctl+0x368/0x420
[73134.631119] drm_ioctl_kernel+0x8c/0xfc
[73134.631166] drm_ioctl+0x328/0x3bc
[73134.631207] vfs_ioctl+0x58/0x68
[73134.631245] do_vfs_ioctl+0xb4/0x9d4
[73134.631280] ksys_ioctl+0x50/0x80
[73134.631317] __arm64_sys_ioctl+0x28/0x38
[73134.631360] el0_svc_common.constprop.0+0xe8/0x168
[73134.631389] el0_svc_handler+0x70/0x8c
[73134.631435] el0_svc+0x8/0xc
[73134.631497] kworker/3:1 D 0 823 2 0x00000028
[73134.631557] Workqueue: events rockchip_drm_atomic_work
[73134.631597] Call trace:
[73134.631643] __switch_to+0xc0/0x124
[73134.631670] __schedule+0x6f0/0x778
[73134.631711] schedule+0x70/0x84
[73134.631749] schedule_preempt_disabled+0x14/0x1c
[73134.631786] __mutex_lock.isra.1+0x2c4/0x430
[73134.631824] __mutex_lock_slowpath+0x24/0x30
[73134.631862] mutex_lock+0x40/0x4c
[73134.631902] rockchip_atomic_commit_complete+0xa0/0x124
[73134.631930] rockchip_drm_atomic_work+0x20/0x30
[73134.631958] process_one_work+0x200/0x330
[73134.631997] process_scheduled_works+0x44/0x48
[73134.632037] worker_thread+0x26c/0x2fc
[73134.632075] kthread+0x120/0x130
[73134.632113] ret_from_fork+0x10/0x18
Change-Id: Ia571c077f2d88854f9f568bb1693365e154d1e6c
Signed-off-by: Andy Yan <andy.yan@rock-chips.com >
2021-08-16 20:11:19 +08:00
Jon Lin
1da3365c11
soc: rockchip: mtd_vendor_storage: Register vendor_storage later
...
Since storage drivers register in module_init, So the vendor_storage
should be initiated after it.
Change-Id: Icefce56c54713dd56ef992ec527e65fce4f0c977
Signed-off-by: Jon Lin <jon.lin@rock-chips.com >
2021-08-16 17:52:49 +08:00
Shunqing Chen
e0123a61bd
media: i2c: rk628csi: fix division by zero
...
[<c010f0c4>] (unwind_backtrace) from [<c010b3dc>] (show_stack+0x10/0x14)
[<c010b3dc>] (show_stack) from [<c03fcff8>] (dump_stack+0x7c/0x98)
[<c03fcff8>] (dump_stack) from [<c03fb0c4>] (Ldiv0_64+0x8/0x18)
[<c03fb0c4>] (Ldiv0_64) from [<c06bb3e8>] (enable_stream+0x290/0x940)
[<c06bb3e8>] (enable_stream) from [<c06bc784>]
(rk628_csi_s_stream+0x10/0x18)
[<c06bc784>] (rk628_csi_s_stream) from [<c06f7538>]
(rkisp1_pipeline_set_stream+0x7c/0x224)
[<c06f7538>] (rkisp1_pipeline_set_stream) from [<c06ff754>]
(rkisp1_start_streaming+0x364/0x69c)
[<c06ff754>] (rkisp1_start_streaming) from [<c06dc918>]
(vb2_start_streaming+0x64/0x128)
[<c06dc918>] (vb2_start_streaming) from [<c06dd4a8>]
(vb2_core_streamon+0xd0/0x12c)
[<c06dd4a8>] (vb2_core_streamon) from [<c06ccc4c>]
(__video_do_ioctl+0x224/0x2bc)
[<c06ccc4c>] (__video_do_ioctl) from [<c06cc668>]
(video_usercopy+0x294/0x648)
[<c06cc668>] (video_usercopy) from [<c06c65c8>] (v4l2_ioctl+0x5c/0x98)
[<c06c65c8>] (v4l2_ioctl) from [<c024f21c>] (do_vfs_ioctl+0x94/0x6a0)
[<c024f21c>] (do_vfs_ioctl) from [<c024f874>] (SyS_ioctl+0x4c/0x70)
[<c024f874>] (SyS_ioctl) from [<c0107240>] (ret_fast_syscall+0x0/0x54)
Division by zero in kernel.
Signed-off-by: Shunqing Chen <csq@rock-chips.com >
Change-Id: Icb94f2ef1dc5575a162faae38e32352c5133ca27
2021-08-16 16:39:14 +08:00
Shunhua Lan
b9c8169b6a
media: i2c: rk628csi: fix audio issues
...
1. reset hdmirx in cru when hotplug or res change to avoid audio L/R channel swap
2. disable hdmirx and audio unit when PHY setup
3. enable audio unit and audio fifo interrupts after N CTS updating
4. double initial audio fifo when fifo overflow after underflow
5. initial audio fifo when fifo overflow after underflow
6. fix i2c access timeout when hdmirx resetting
7. add 60ms delay after phy locked
Change-Id: I0bc2afe33a52a65c8a028695785fa273339b317b
Signed-off-by: Shunhua Lan <lsh@rock-chips.com >
2021-08-16 16:14:01 +08:00
Shunqing Chen
298933a151
media: i2c: rk628csi: fix den error when hdcp enable
...
When HDCP is enabled, there is a probability of data error for
a period of time, so we use the above method to workround it:
1. If read the same value six times, we think the data is stable.
2. If thd data is no stable after 1s, force hdcp avmute.
3. If avi packet is no ready, reset hdmi ctrl.
Signed-off-by: Shunqing Chen <csq@rock-chips.com >
Change-Id: Ia4d2fe5fc74188e593ea149404ad2504a0d8a482
2021-08-16 16:14:01 +08:00
Dingxian Wen
4b32bc65cf
media: i2c: rk628csi: detect resolution changes as quickly as possible
...
Change-Id: I432c4178961641e541c75b62a21598d87ae142d8
Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com >
2021-08-16 16:14:01 +08:00
Shunqing Chen
5d98311786
media: i2c: rk628csi: add hdcp support
...
Signed-off-by: Shunqing Chen <csq@rock-chips.com >
Change-Id: Id33a54d16fec2ddee6ae467b24dff69b637f529b
2021-08-16 16:14:01 +08:00
Chris Zhong
a95f1858e8
ARM: configs: enable rk817 battery and charge for rv1126-dictionary-pen
...
How to use this configuration:
make ARCH=arm rv1126_defconfig rv1126-dictionary-pen.config
Signed-off-by: Chris Zhong <zyw@rock-chips.com >
Change-Id: I85bc9744b61cd17f0b8f20aabf3184a4a931fd99
2021-08-16 15:39:05 +08:00
Chris Zhong
9417c333ab
ARM: dts: rv1126: support dictionary pen
...
Change-Id: I4762988cb3c6ab350391fd3a0d8b9f4670b33eac
Signed-off-by: Chris Zhong <zyw@rock-chips.com >
2021-08-16 15:39:05 +08:00
Algea Cao
5f6d039e73
drm/bridge: synopsys: dw-hdmi: Support force logo display
...
Signed-off-by: Algea Cao <algea.cao@rock-chips.com >
Change-Id: Ib885ab7064a874a898b1ae005f2a4d8e4e9a1b01
2021-08-16 14:51:50 +08:00
Sandy Huang
62e744244f
drm/rockchip: drv: add rockchip default mode when enable force output
...
Signed-off-by: Sandy Huang <hjc@rock-chips.com >
Change-Id: Iebc75e54f4bef12baac694fc54a45af33540c783
2021-08-16 14:50:31 +08:00
Tao Huang
2d3d1c7157
pinctrl: rockchip: build depends on CPU config
...
When build with rv1126_defconfig:
before:
text data bss dec hex filename
18918 34120 8 53046 cf36 drivers/pinctrl/pinctrl-rockchip.o
after:
text data bss dec hex filename
11726 3028 8 14762 39aa drivers/pinctrl/pinctrl-rockchip.o
Change-Id: I09e85d6a05f9bdee1033584bd1573d41d69633bc
Signed-off-by: Tao Huang <huangtao@rock-chips.com >
2021-08-13 16:08:56 +08:00
