Fixed a possible null pointer exception when an endpoint gets
disabled while a request is being enqueued in parallel.
Unmap the request buffer if we fail to enqueue the request.
Change-Id: If94cc278c2e6ab58adcf170511e676348365f3f9
Signed-off-by: Benoit Goby <benoit@android.com>
-- Leave I2S running during underflow, for a couple of reasons.
First, the I2S buffers a few samples, and if we get a new write
before those samples are flushed, we will keep continuous audio
Second, we burn CPU time stopping and restarting the HW
frequently.
-- Fix TEGRA_AUDIO_IN/OUT_GET/SET_NUM_BUFS, was causing DMA to
read/write to null HW address.
Signed-off-by: Iliyan Malchev <malchev@google.com>
"Interrupt during enqueue" happens periodically when the
DMA is almost starving. This happens under certain not-
uncommon scenarios.
Signed-off-by: Iliyan Malchev <malchev@google.com>
The previous version of dvfs handled requirements between two
different voltage rails by using two sets of dvfs tables, one
for each rail. That method fails for vdd_aon, which must be
within 170 mV of vdd_core.
Instead, have each dvfs clock only set the voltage rail that
it directly depends on, and add a relationship system to the
voltage rails. When the voltage changes on one rail, it calls
update on all the rails that depend on it. The dependent rails
compare the new voltage of the original rail to their own
voltage, and update their own voltage as necessary.
Change-Id: I17b30a61c7c0c01e44702ab486238789abd47330
Signed-off-by: Colin Cross <ccross@android.com>
Write a dummy value to EMC_MRW_0 to allow
clock frequency changes after lp0.
Change-Id: I2218967eaf9698eef6dcfe2e3edd89fbce2ebf1a
Signed-off-by: James Wylder <james.wylder@motorola.com>
Definitions for 11.2896MHz and 12.288MHz were incorrect. These
frequencies can be still requested through pll_a_out0.
Signed-off-by: Iliyan Malchev <malchev@google.com>
The 608 MHz table entry would incorrectly produce a 760 MHz
clock for input clocks of 12 MHz, 13 MHz, or 26 MHz.
Change-Id: I6755fdde88f0851770490818dc2e5e1e2d512f20
Signed-off-by: Colin Cross <ccross@android.com>
Fuses must be initialized before clocks, so clocks can
determine the maximum cpu frequency. Clocks must be
initialized before DMA, so DMA can enable the clock.
Once DMA is initialized, all fuses accesses must go
through DMA to avoid a hardware bug.
Change-Id: Id1f58e4f43152ec19000e02f2d1ea45abf141f9c
Signed-off-by: Colin Cross <ccross@android.com>
There is a dependency loop between fuses, clocks, and APBDMA.
If dma is enabled, fuse reads must go through APBDMA to avoid
corruption due to a hw bug. APBDMA requires a clock to be
enabled. Clocks must read a fuse to determine allowable cpu
frequencies.
Separate out the fuse DMA initialization, and allow the fuse
read and write functions to be called without using DMA before
the DMA initialization has been completed. Access to the fuses
before APBDMA is initialized won't hit the hardware bug because
nothing else can be using DMA.
Change-Id: Ib5cb0f346488f2869e8314c5f3b24fd86873f4c3
Signed-off-by: Colin Cross <ccross@android.com>
Protect suspend/resume functions behind #ifdef CONFIG_PM. This
prevents a compile error with CONFIG_PM turned off.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
Protect irq suspend/resume functions behind #ifdef CONFIG_PM.
This prevents a link error if CONFIG_PM is turned off.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
Protect the bus suspend/resume functions behind #ifdef CONFIG_PM.
This prevents a compile error if CONFIG_PM is turned off.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
tegra2 hangs if fuse registers are accessed during an apb dma
operation. war is to use apb dma to read/write fuse registers
instead.
Change-Id: I4d99a1ad56115c0d73e9cd0679cf38f70f922f3d
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
-- Add support for contnuous single-buffered DMA
-- Remove PIO support
-- Added suspend and resume functionality
Signed-off-by: Scott Peterson <speterson@nvidia.com>
Signed-off-by: Iliyan Malchev <malchev@google.com>
Enable 16 bit packed fifo format mode to work avoid
channel swapping when dma underrun occurs.
Added suspend/resume functionality so spdif registers
are restored.
Change-Id: Id80e7903b81fd3b3b84af08dba40196121eb6cb7
Signed-off-by: Iliyan Malchev <malchev@google.com>
Tegra host controller will time the resume operation to clear the bit
when the port control state switches to HS or FS Idle. This behavior
is different from EHCI where the host controller driver is required
to set this bit to a zero after the resume duration is timed in the
driver.
Poll PORT_SUSPEND bit till the suspend is completed. Write PORT_RESUME to 0
to clear PORT_SUSPEND bit.
Disable disconnect detection during resume.
Change-Id: I30a45dc7e7a87773a93c128877d0f0827e5d44b7
Signed-off-by: Jay Cheng <jacheng@nvidia.com>
The length of the mod_locks array is NV_HOST1X_NB_MLOCKS, not
NV_HOST1X_SYNCPT_NB_PTS.
Change-Id: Ibce054bb8a168f2b83646745f2b62cd282b8ff9d
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Acked-by: Erik Gilling <konkers@android.com>
This fixes incorrect colors drawn by clients such as fbconsole. As
described by skeletonfb's fb_setcolreg: "The values supplied have a 16
bit magnitude which needs to be scaled in this function for the
hardware."
Tested with both r8g8b8 and r5g6b5 pixel depths and fbconsole.
Change-Id: Ie3c3579502ddab8843a8a4dc7049c6efaa5d0ac1
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Acked-by: Erik Gilling <konkers@android.com>
- Added "single buffer continuous DMA" mode in addition to the
"double buffer continuous DMA" mode that is already implemented
- Changed the queuing of next buffer to be more flexible for
continuous DMA. It can now get in-flight right after a transfer
starts, or whenever the client enqueues a buffer.
Signed-off-by: Iliyan Malchev <malchev@google.com>
Program PTC bits as NORMAL_OP is enough when resume.
Change-Id: I229eb3ef2ebaff72d023179502ec7a8904e87682
Signed-off-by: Jay Cheng <jacheng@nvidia.com>
