We find sometimes hwc will post a plane with NULL
fb, this is no need to setup alpha.
Change-Id: I1ca475e7171c08a4182a3a98bf357d3bf00d8fdc
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
The significant nodes will be deleted with CONFIG_DTC_OMIT_EMPTY.
therefore make it not empty.
Change-Id: Id5febc54e9efe2d769a30b6ded96288a37239e90
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
There are always some people treat the WARN
backtrace dump as a kernel panic, so we just
print warning message here.
Change-Id: I2a34a7d822768bc6f103d85deb311948b6ce3552
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
on: isp->phy->sensor(start to output)
off: sensor(stop already)->phy->isp
Change-Id: I592f8e8e36f4c912e3f38b3f4266e98bfd9e56e4
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
This patch is useful for board with totalram size larger than 4GB.
Since swiotlb has memory size limitation, this will calculate the
maximum size locally, as a workaround to fix the orders[0].
With this patch:
[ 3.921612] orders[0] = 6
[ 3.921647] orders[1] = 4
[ 3.921715] orders[2] = 0
Change-Id: I9286f6ea53f679816c9afd378a6cfe620ef1b53e
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
1. Because of hw problems before, there will be problems with
high-frequency reset. So the frequency must be reduced before reset.
But this operation is unnecessary for now.
2. Iep share clk with rga on rk356x, so frequency reduction may affect rga.
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I469d2d6ba2671560acd9eaf6b86d57411c7e3de5
Part of spinand sram maybe change after read status register
Fixes: cf69491c97 ("drivers: rkflash: Add spinand program cache recheck")
Change-Id: Ia8f902fe51562d71a5b8e78a80e63eb26257df38
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Rootcause:
When hw detect there are more than eight rolling subtitles, it will
trigger a osd max irq but it still running, and that interruption make
the software takes for frame done and disable the clock gate, finally hw
hang when it access the bus.
Solution:
Ignore OSD MAX irq, clean and wait for frame done.
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I660cefa013fe1419f7566b984556ea3450fe28e5
Odd dsp_w pixel of Esmart/Smart will trigger scale down error.
Change-Id: Ie0fc620043270a387eed69aba8adf200a0d67f24
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
After power lost, spinand may work in a unkonw state and result in
bit flip, including:
1.Write to cache invalid and dirty cache data write to page's array
which result in node CRC error for some pages.
2.One page write fail but the next page write success result in
empty space corruption.
Change-Id: I212c237202b32de0217efc8dd5a4e84174953a3f
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Add spinand power lost situation protection to avoid
abnormal data written to flash array(recheck 1) or
just reduce error behavior(recheck 2)
Change-Id: Ic445fd09fd407c225b47310d666b39f095fcfb17
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Set SYS_STATUS_DUALVIEW when there are more than one
active video ports.
Change-Id: I7d04f74427f710eef8cd7087b09ebd528587e002
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
The DDR freq should be fixed in dual display mode.
Change-Id: I2383d415f93a52366f762e9480b54451a75f1ad5
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Register gpd_dev_ops.active_wakeup function to support keep power
during suspend state. And add flag to each power domain to
decide whether keep power during suspend or not.
Change-Id: I0ba0985ed2ee976885005c87fcba4c7b910cbb05
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Register gpd_dev_ops.active_wakeup function to support keep power
during suspend state. And add flag to each power domain to
decide whether keep power during suspend or not.
Change-Id: Ib9f609b851f2eaf1ccca8eb687e232727e989d5c
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
The APLL_CFG3/DDAC_SR_LMT0/DTOP_DIGEN_CLKE should be
correct with different sample rates and clock.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Change-Id: I766879750e640ef8ab31c2ab6776fe96ac65e063
