RK1808 SoCs support 2*A35, so add cpu1 node to support.
And add xin24m.
Change-Id: Iebac460c8eb55362e7093f2906f4041a69e581dc
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
This is needed to enable the AVB specific dm-verity error handler.
Change-Id: Ic367b266d0e39232a6303eb59c82b9b69fc1b9cc
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
This is needed to enable the AVB specific dm-verity error handler.
Change-Id: I331ba1e6f459ec51ff8584cf1471ad05dd90f6db
Signed-off-by: Bian Jin chen <kenjc.bian@rock-chips.com>
Since msleep is based on jiffies the panel could take longer
than expected. So use msleep for values greater than 20 msec
otherwise usleep_range.
Change-Id: Ib03c6e381b44a31dd57aeaaa3a88a459578de313
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Zram allows Linux to make more efficient use of RAM, since
the system can then hold more pages of memory in the compressed
swap than if the same amount of RAM had been used as application
memory or disk cache. This is particularly effective on machines
that do not have much ram space.
Enable:
echo 16M > /sys/block/zram0/disksize
mkswap /dev/zram0
swapon /dev/zram0
More detial: Documentation/blockdev/zram.txt
Change-Id: I23954dbc7df79d4faac02cf7f393dbfc37858ee6
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
PVTM use "cpu-supply" as the name of regulator to get PVTM value to
select opp level, but old dts use "cpu0-supply" as the name of cpu,
so we need be compatible with the old regulator name of cpu.
Change-Id: Id6dbb0b4a85e6154b9be38ffb373e7eab7199781
Signed-off-by: Liang Chen <cl@rock-chips.com>
The latest Vmin test result on evb board is as the following.
/* KHz uV */
1296000 1250000
1200000 1200000
1008000 1075000
816000 975000
600000 850000
408000 850000
Each frequency should add 50000uV margin.
Change-Id: Icbe99d2a4d88466381fd418fb74a8b8e9cac7323
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Add devicetree bindings for Rockchip cru which found on
Rockchip SoCs.
Change-Id: I56e151b20f44c13b9f2c55e63860abef4cf586ad
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
The GRF values may be kept the previous status after hot reboot,
if the property 'rockchip,adc-grps-route' is not set, we need to
recover default the order of sdi/sdo for i2s2_8ch/i2s3_8ch/i2s1_2ch.
Change-Id: Ic35b96388aaeca0ed4e0efd4e6ae3de178f88b06
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
We may need to support a variety of different Bluetooth modules
which are from different vendors. In order to develop efficiently,
we need to uniformly set the PCM of the AP to master mode, and
the Bluetooth side as the slave.
Change-Id: I92e76a9e394eea7b3f700bada5ad97ae92a67c69
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
nvme for rockchip platform could be used as both of main disk
or external storage. So it's not proper to fix the partition
type by checking CONFIG_ARCH_ROCKCHIP. Otherwise, if the nvme
is probed earily then the real main disk device, then the main
disk could be failed to mount.
Change-Id: If30940527e99d88d792fe3f19475fabf4b1a99d3
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Add the clock tree definition for the new rk1808 SoC.
Change-Id: I86e502b27e0695c77e9937dfd7cffa14b5711954
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
The usb otg doesn't need phy node, because it uses
legacy controller driver "dwc_otg_310". But the phy
node is needed for uboot which uses kernel dtb. And
it's also useful for otg controller driver if we
switch to dwc2 driver later.
Change-Id: I2f06f00861805f0ed3bf3f052aaa5a7e3bc416f8
Signed-off-by: William Wu <william.wu@rock-chips.com>
This patch adds rk3368 otg-port phy configurations.
But actually, we don't use the otg phy configurations
for the time being, because we use dwc_otg_310 driver
for rk3368 otg controller, and this driver doesn't use
generic phy. This patch is useful if we switch to dwc2
driver for rk3368 otg in the feature.
Change-Id: Ibed3fde4ef64ad25e933ac4560f956b7c9f5c476
Signed-off-by: William Wu <william.wu@rock-chips.com>
1.SPI nand including HYF, MXIC, XTX
2.SPI nor including XMC, ESMT, MXIC
Change-Id: I35197254e70f65ad85475a8f952ea24111e3499a
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
The parameters of Synopsys PHY is programmed with the default values
for the corresponding hsfreqrange (test code 8'h44, HS RX Control of Lane 0)
Change-Id: I92c6bb0a9cad55e7b1695ca600f9c68804361dac
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
This reverts commit 9ffd98e815.
Which breaks 32bit Android <9
Make ANDROID_BINDER_IPC_32BIT depends on ANDROID_VERSION.
Change-Id: Ie599606ce998b27342471f31d1480d0a87135375
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
This patch fixup codec slave mode work abnormal, it is
because the mode bits have not been set. and whatever,
all adcs' fmt should be the same.
Change-Id: Ie5ea7cdddc25c41790797fd2b4ef760a1f2ed727
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
when system goto suspend, isp will be powered off,
isp iommu will be disabled, need to attach on resume,
detach on suspend.
Change-Id: I2b5e775b44d2b72df4ddcf2db12b54518c3e1f2e
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
lpddr4 scale frequency when display on, cause the display shake and
vop POST_BUF_EMPTY
Change-Id: I2bfef85ae34c3c85609dcb3506272ff0e27cb0c7
Signed-off-by: CanYang He <hcy@rock-chips.com>
Add the dt-bindings header for the rk1808, that gets shared between
the clock controller and the clock references in the dts.
Add softreset ID for rk1808.
Change-Id: I0eef08655037daeab92560f36e06fde4032ddd0c
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
