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Author SHA1 Message Date
Simon Xue
d7bb68b76b arm64: dts: rockchip: rk3568: add tclk for watchdog 
Change-Id: I14018563cb2e1bd844f41859020fa7fdc6b555ec
Signed-off-by: Simon Xue <xxm@rock-chips.com>
 2020-11-15 15:40:23 +08:00
Serge Semin
be33f619b2 UPSTREAM: watchdog: dw_wdt: Support devices with asynch clocks 
DW Watchdog IP core can be synthesised with asynchronous timer/APB
clocks support (WDT_ASYNC_CLK_MODE_ENABLE == 1). In this case
separate clock signals are supposed to be used to feed watchdog timer
and APB interface of the device. Currently the driver supports
the synchronous mode only. Since there is no way to determine which
mode was actually activated for device from its registers, we have to
rely on the platform device configuration data. If optional "pclk"
clock source is supplied, we consider the device working in asynchronous
mode, otherwise the driver falls back to the synchronous configuration.

Change-Id: I9c3bdc7e7b7b1fc0be0f7335cf3c1950169891d7
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: devicetree@vger.kernel.org
Link: https://lore.kernel.org/r/20200530073557.22661-6-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Signed-off-by: Simon Xue <xxm@rock-chips.com>
(cherry picked from commit a16f58bf15)
 2020-11-15 15:40:03 +08:00
Algea Cao
73b36b7f3e arm64: dts: rockchip: rk3568: Add hdmi cec pinctrl 
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I06bd6958dd19c376bb22c73a882e692b983d8340
 2020-11-14 19:22:04 +08:00
Sugar Zhang
75db99f1eb dmaengine: pl330: _prep_dma_memcpy: Fix wrong burst size 
Actually, burst size is equal to '1 << desc->rqcfg.brst_size'.
we should use burst size, not desc->rqcfg.brst_size.

dma memcpy performance on Rockchip RV1126
@ 1512MHz A7, 1056MHz LPDDR3, 200MHz DMA:

dmatest:

/# echo dma0chan0 > /sys/module/dmatest/parameters/channel
/# echo 4194304 > /sys/module/dmatest/parameters/test_buf_size
/# echo 8 > /sys/module/dmatest/parameters/iterations
/# echo y > /sys/module/dmatest/parameters/norandom
/# echo y > /sys/module/dmatest/parameters/verbose
/# echo 1 > /sys/module/dmatest/parameters/run

dmatest: dma0chan0-copy0: result #1: 'test passed' with src_off=0x0 dst_off=0x0 len=0x400000
dmatest: dma0chan0-copy0: result #2: 'test passed' with src_off=0x0 dst_off=0x0 len=0x400000
dmatest: dma0chan0-copy0: result #3: 'test passed' with src_off=0x0 dst_off=0x0 len=0x400000
dmatest: dma0chan0-copy0: result #4: 'test passed' with src_off=0x0 dst_off=0x0 len=0x400000
dmatest: dma0chan0-copy0: result #5: 'test passed' with src_off=0x0 dst_off=0x0 len=0x400000
dmatest: dma0chan0-copy0: result #6: 'test passed' with src_off=0x0 dst_off=0x0 len=0x400000
dmatest: dma0chan0-copy0: result #7: 'test passed' with src_off=0x0 dst_off=0x0 len=0x400000
dmatest: dma0chan0-copy0: result #8: 'test passed' with src_off=0x0 dst_off=0x0 len=0x400000

Before:

  dmatest: dma0chan0-copy0: summary 8 tests, 0 failures 48 iops 200338 KB/s (0)

After this patch:

  dmatest: dma0chan0-copy0: summary 8 tests, 0 failures 179 iops 734873 KB/s (0)

After this patch and increase dma clk to 400MHz:

  dmatest: dma0chan0-copy0: summary 8 tests, 0 failures 259 iops 1062929 KB/s (0)

Change-Id: I45fd028263452d6aa86190e2b10d5cdc3e90c2b5
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
 2020-11-14 18:12:31 +08:00
Andy Yan
c83df779fd drm/rockchip: vop2: Add uv_mst and ymirror register for Esmart/Smart win 
Smart and Esmart support yuv and ymirror, But all the multi area in
one windows share the same ymirror bits. This give a strict limitation
on compositor: the compositor must enable DRM_MODE_REFLECT_Y for all
the multi area plane or disable all of them, otherwise will cause
a iommu pagefault as multie area don't know how to fetch data
from framebuffer.

Change-Id: I52d6f0766f023b6b71ad3a8aace78f38d285c10c
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
 2020-11-14 17:52:20 +08:00
Andy Yan
113273a924 drm/rockchip: vop2: No add fb offset for afbc 
When we want display from a offset of the afbc
framebuffer, afbc_hdr_hdr still need to set
from the start address of the framebufferr.
And the x/y offset set to PIC_OFFSET register.
This is different with non-afbc window.

Change-Id: I501c2071c9569dc3801f9bc588e7517d912a7972
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
 2020-11-14 16:51:36 +08:00
Liang Chen
672cf55e6d arm64: dts: rockchip: init board for rk3568-iotest-ddr3-v10 
Change-Id: I0aab631ee785ab0bde5838e5bf8c9bce1881149f
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2020-11-14 16:31:39 +08:00
Wu Liangqing
f15b4fc547 arm64: dts: rockchip: rk3566-rk817-tablet bringup 
Change-Id: Icd5ba7ff260e3256eaa5bb22aaf5aa93a1e4f62d
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
 2020-11-14 16:05:39 +08:00
Nickey Yang
0b8aec3f03 drm: rockchip: rk628: Fix reading 4block EDID for hdmi 
After the current driver had read the EDID of 4block once,
hdmi->i2c->segment cannot reset to zero, which will cause the
data when restart reading to be block2 data not the expected
block0 data.
   At the same time, when msg->addr equal to DDC_SEGMENT_ADDR,
the next setting the same EDID related register, which will lead
to repeated reading of the data of block2, but unable to read the
address of block3.

Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Change-Id: I490c4b16d977dc044ce3b3ce2d6cfaebd8922f0c
 2020-11-14 16:04:01 +08:00
Nickey Yang
f251460759 drm: rockchip: rk618: Fix reading 4block EDID for hdmi 
After the current driver had read the EDID of 4block once,
hdmi->i2c->segment cannot reset to zero, which will cause the
data when restart reading to be block2 data not the expected
block0 data.
   At the same time, when msg->addr equal to DDC_SEGMENT_ADDR,
the next setting the same EDID related register, which will lead
to repeated reading of the data of block2, but unable to read the
address of block3.

Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Change-Id: I7c4ec557c6206ff2b941e9060e63b00e941c1e2b
 2020-11-14 16:04:01 +08:00
Shawn Lin
b46d51c1f2 arm64: dts: rockchip: rk3568: Downgrade pcie I/O and MEM bus address to 32-bit 
Change-Id: I9413405199e6ee34766a5d4dcef395e1de5f0ef8
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2020-11-14 16:01:47 +08:00
Shawn Lin
6173790b55 mmc: sdhci-of-dwcmshc: Get tap number from DT if possible for HS200/HS400 
It turns out that we should allow BSP to assign tap number for different
boards or platforms.

Change-Id: I793da380fad1c4d8b96b6ec32f66dfc9e5e631f1
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2020-11-14 16:01:41 +08:00
Zefa Chen
a3907e42d2 media: add motor driver of MP6507 for camera IRIS/FOCUS/ZOOM 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I03e354473ca5fcbd972adb1f46019f01488872cb
 2020-11-14 15:58:02 +08:00
Finley Xiao
239fd26d32 arm64: dts: rockchip: rk3568: Change CLK_TSADC_TSEN to 17MHz 
Make the bandgap clock close to its typical frequency 16MHz.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I60b98438a89ab91fb9e2ac009ad8e2b2cba4a5a3
 2020-11-14 15:42:11 +08:00
Elaine Zhang
1b479a852b clk: rockchip: rk3568: mark hclk_php and pclk_php as critical clock 
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: Ie73d2b9a19d0d5f17311fb6be96e1ace96ffe999
 2020-11-14 14:43:55 +08:00
Shawn Lin
5a8f78cec8 arm64: dts: rockchip: rk3568: Fix pci domain and type 
Need to specify different domain for same bus ID to be attached
via pci type for multi-root PCIe bridge.

Change-Id: I91a1f1c788c777b4bbc4c6bfcccc5228497c2327
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2020-11-13 19:55:03 +08:00
Shawn Lin
4ddf7f23ca arm64: dts: rockchip: Add PCIe20 and PCIe30 bifurcation node 
Change-Id: Ie59f6b0b46bef80c4c14fa2d9564e324dd3b8e6b
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2020-11-13 19:55:03 +08:00
Finley Xiao
378cbda38a arm64: dts: rockchip: rk3568: Add thermal zone device node 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ieff7e1736b052a844d780fa18149099acc9ceb4a
 2020-11-13 19:07:58 +08:00
Frank Liu
0adf71df7f media: i2c: add sc2232 driver 
Signed-off-by: Frank Liu <frank.liu@rock-chips.com>
Change-Id: I688398cdc757dad906e3b8a9224b3add0d7e7cf7
 2020-11-13 19:05:10 +08:00
Shawn Lin
a97ac5dffc arm64: dts: rockchip: rk3568-evb: Fix max-frequency property 
Change-Id: I2a5555511be2eb4e3ccf3d343d395e0eedb3d569
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2020-11-13 18:07:41 +08:00
Finley Xiao
10a63469a2 arm64: dts: rockchip: rk3568-evb: enable tsadc 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I8bb3989c7b2597c9a39d2efff1b07361d610451d
 2020-11-13 17:35:24 +08:00
Finley Xiao
cb8aba2c05 arm64: dts: rockchip: rk3568: Add tsadc device node 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I94ce924ecd6f9ae6f8598ba614635486bd7e09d0
 2020-11-13 17:34:31 +08:00
Finley Xiao
c21148e9f5 arm64: dts: rockchip: rk3568-pinctrl: Add tsadc gpio configuration 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I52277e8baeef4843551e3503fc6781656d95de2b
 2020-11-13 17:32:50 +08:00
Finley Xiao
a93d807474 thermal: rockchip: Support RK3568 SoCs in the thermal driver 
The RK3568 SoCs have two Temperature Sensors, channel 0 is for CPU,
channel 1 is for GPU.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I0dde1dabfbc1bf44ca203cfdea896ca0c05dfadf
 2020-11-13 17:13:01 +08:00
Sugar Zhang
b5bd3b76b6 arm64: dts: rockchip: rk3568-evb: Add vad sound 
Change-Id: Iedf3a81bf325be2ce3a22462a2f3de4304a3b02d
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
 2020-11-13 17:08:48 +08:00
Sugar Zhang
c91d641ad6 arm64: dts: rockchip: rk3568: Add vad device node 
Change-Id: Ic72c6c791946bde23074a25c7ab6d968b862b052
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
 2020-11-13 17:08:23 +08:00
Sugar Zhang
df340d70a0 ASoC: rockchip: vad: Add support for rk3568 
Change-Id: If484601504c69309ae40a5b43bfae8e31e90239c
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
 2020-11-13 17:07:49 +08:00
Sugar Zhang
07b7fc9e85 ASoC: rockchip: Add support for Voice Activity Detection 
This patch replace codec to component.

Change-Id: I6ae63b4d36f2f9b24f0fdf352fdc385ec425b330
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
 2020-11-13 17:07:49 +08:00
Shunqing Chen
81bf177c4b arm64: dts: rockchip: rk3568: add lcdc_ctl for rgb 
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
Change-Id: Iebc7a8ed5a10a662b96bf9ebea86154a532c5b6f
 2020-11-13 15:16:02 +08:00
Andy Yan
98ce0ae63a drm/rockchip: vop2: Fix r2y/csc_mode reigster definition 
Fix r2y_en and csc_mode_en bit definition of ESMART/SMART.

Change-Id: Ib41858d84161dfe20c4d2452506ce2ef1c22b6f4
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
 2020-11-13 14:20:19 +08:00
Andy Yan
6786fe5aed arm64: dts: rockchip: rk3568-android: Enable vop multi area 
Change-Id: I2d6ea725a9201c8ed691bafa0413a34c85145ca2
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
 2020-11-13 14:20:19 +08:00
Cai YiWei
0ae73e8272 media: rockchip: isp/ispp to version v1.2.1 
Change-Id: Ia371119cd091dbbad1d7c7bd9ab8806f9d755614
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2020-11-13 11:42:50 +08:00
Cai YiWei
3b4edf5373 media: rockchip: isp: dmatx add yuyv format 
Change-Id: I35326fe0715ad2277713ae7c3af394acd7aeadd1
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2020-11-13 11:42:50 +08:00
Wang Jie
15185beedf arm64: dts: rockchip: rk3568-evb: modify the layout value for mxc6655xa 
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
Change-Id: I3c387bc1ca202ba3dc140772d518583b13fae01b
 2020-11-13 11:39:19 +08:00
Ding Wei
7fe621b4bb video: rockchip: mpp: rkvenc: reg_l2 register debug info 
Change-Id: Ic73571eecd8a1737769fb0c98138c31cacacaf51
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
 2020-11-13 11:33:43 +08:00
Ding Wei
932a0e8311 video: rockchip: mpp: add register for rkvenc translate table 
Change-Id: Ic56d42c7d610dbd746419acd1e39af47b7f3fe09
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
 2020-11-13 11:33:32 +08:00
Ding Wei
4212aa4087 video: rockchip: mpp: rkvenc issue for devfreq is null 
CONFIG_PM_DEVFREQ enable, while devfreq is not set in dtsi.
then freq is not actually set.

Change-Id: Ie615d38393155c0c0debdc4522f1d47869ea15a2
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
 2020-11-13 11:33:09 +08:00
Tao Huang
f7b6b29c54 misc: pir-aschip: Fix pir_aschip_remove() section mismatch 
WARNING: vmlinux.o(.text+0x3907c4): Section mismatch in reference from the function pir_aschip_remove() to the function .exit.text:pir_aschip_proc_release()
The function pir_aschip_remove() references a function in an exit section.
Often the function pir_aschip_proc_release() has valid usage outside the exit section
and the fix is to remove the __exit annotation of pir_aschip_proc_release.

Fixes: 633fa7b962 ("misc: add Aschip PIR Sensor drivers")
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I459a58755e08b7f418f95985ebed4969c5646d5b
 2020-11-13 11:20:14 +08:00
Jianqun Xu
c24b0817cc arm64: dts: rockchip: rk3568 add gpio alias id 
Change-Id: I9cd8f98a933abaa2c80fe85e0f7e6d940e297c50
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
 2020-11-13 11:03:20 +08:00
Xu Hongfei
cf9f0f7046 Revert "media: rockchip: isp: set lgmean related regs for tmo in hdr isr" 
This reverts commit ce801a9bb6.

Change-Id: Idfe306735460be39bda996e4a7996bb0e3a03bff
Signed-off-by: Xu Hongfei <xuhf@rock-chips.com>
 2020-11-13 10:43:34 +08:00
Hans Yang
b506c435ff arm64: configs: add rockchip_linux_bifrost.config 
for linux platform bifrost can not compatible with mali config

Update by:
make ARCH=arm64 rockchip_linux_defconfig
cp .config rockchip_linux.config
make ARCH=arm64 menuconfig
scripts/diffconfig -m rockchip_linux.config .config >
arch/arm64/configs/rockchip_linux_bifrost.config

Usage:
make ARCH=arm64 rockchip_linux_defconfig rockchip_linux_bifrost.config

Signed-off-by: Hans Yang <yhx@rock-chips.com>
Change-Id: Ic5def57928c631c96754bb4dd76404d8cbd1e2e6
 2020-11-13 09:55:05 +08:00
Shunqing Chen
621e295887 arm64: rockchip_defconfig: Enable RK628 
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
Change-Id: Ia5a47f1cc47f3096708f5df57b11ca8d918a365c
 2020-11-13 09:52:41 +08:00
Yifeng Zhao
5c308603ba arm64: configs: rockchip: Enable ACHI 
before
    text	   data	    bss	     dec	    hex	filename
15989635	7547498	2289288	25826421	18a1475	vmlinux

after
    text	   data	    bss	     dec	    hex	filename
16139178	7628603	2293512	26061293	18da9ed	vmlinux

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I32bfb693d387589fba6b523c2dd8791a32043ff1
 2020-11-13 09:46:29 +08:00
Yifeng Zhao
c258c68ce6 phy: rockchip: naneng-combphy: Add sata configs for CON0~3 regs 
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Id91eb780cbe43cf58862c20a1d8c51b7dc4b39f7
 2020-11-13 09:45:34 +08:00
Tao Huang
d726782f85 arm64: rockchip_defconfig: update by savedefconfig 
Fixes: 45805626ea ("arm64: rockchip_defconfig: enable mpp relative codec")
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I563b906e2e5af6f235e0593bd6113f1892993688
 2020-11-13 09:34:20 +08:00
Yifeng Zhao
7e8f733aa5 arm64: dts: rockchip: rk3568-evb1-ddr4-v10: enable combphy2 
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Ib4b31f4df0cbf269fb4abfe73cb280797f569fcc
 2020-11-13 09:20:03 +08:00
Yifeng Zhao
7be685fb2c arm64: dts: rockchip: rk3568: modify sata0-sata2 registers address 
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I4d704200ef596118a308e03542dae089a3d43dfa
 2020-11-13 09:16:45 +08:00
Wang Panzhenzhuan
46028feca7 media: i2c: nvp6324 drivers synchronize with kernel 4.4 
kernel 4.4 commit ends 9784ddae38

Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: If7d53e4c6667c09a8db90dca571599f12a2088ce
 2020-11-12 21:39:34 +08:00
Andy Yan
4ac05f48e3 drm/rockchip: vop2: Make sure get the current plane state when calculate bandwidth 
Fix dereference of invalid  virtual address when get a cleanuped
plane state:

[   17.908207] Unable to handle kernel NULL pointer dereference at
virtual address 000000000000000c
[   17.911560] Mem abort info:
[   17.911809]   ESR = 0x96000006
[   17.912081]   Exception class = DABT (current EL), IL = 32 bits
[   17.912624]   SET = 0, FnV = 0
[   17.912910]   EA = 0, S1PTW = 0
[   17.913189] Data abort info:
[   17.913466]   ISV = 0, ISS = 0x00000006
[   17.913809]   CM = 0, WnR = 0
[   17.914083] user pgtable: 4k pages, 39-bit VAs, pgdp =
00000000435c7e47
[   17.914681] [000000000000000c] pgd=000000007a6d7003,
pud=000000007a6d7003, pmd=0000000000000000
[   17.915473] Internal error: Oops: 96000006 [#1] SMP
[   17.915907] Modules linked in: bcmdhd
[   17.916240] Process weston (pid: 548, stack limit =
0x00000000f6c6eefe)
[   17.916825] CPU: 0 PID: 548 Comm: weston Not tainted 4.19.154 #312
[   17.917368] Hardware name: Rockchip RK3566 EVB1 DDR4 V10 Linux Board
(DT)
[   17.917970] pstate: 40400009 (nZcv daif +PAN -UAO)
[   17.918417] pc : vop2_crtc_bandwidth+0x21c/0x2dc
[   17.918825] lr : vop2_crtc_bandwidthwhen

[   17.632811] refcount_t: increment on 0; use-after-free.
[   17.632883] WARNING: CPU: 0 PID: 546 at lib/refcount.c:153
refcount_inc_checked+0x38/0x44

[   17.632896] Modules linked in: bcmdhd
[   17.632922] CPU: 0 PID: 546 Comm: weston Not tainted 4.19.154 #311
[   17.632934] Hardware name: Rockchip RK3566 EVB1 DDR4 V10 Linux Board
(DT)
[   17.632943] pstate: 40400009 (nZcv daif +PAN -UAO)
[   17.632951] pc : refcount_inc_checked+0x38/0x44
[   17.632958] lr : refcount_inc_checked+0x38/0x44
[   17.635052] Call trace:
[   17.635069]  refcount_inc_checked+0x38/0x44
[   17.635088]  drm_mode_object_get+0x40/0x4c
[   17.635104]  __drm_atomic_helper_plane_duplicate_state+0x3c/0x50
[   17.635119]  vop2_atomic_plane_duplicate_state+0x4c/0x74
[   17.635129]  drm_atomic_get_plane_state+0xd0/0x154
[   17.635137]  rockchip_atomic_helper_update_plane+0x64/0x128
[   17.635146]  __setplane_atomic+0x148/0x160
[   17.635160]  drm_mode_setplane+0x1f0/0x24c
[   17.635171]  drm_ioctl_kernel+0x8c/0xfc
[   17.635184]  drm_ioctl+0x324/0x3b8
[   17.635204]  vfs_ioctl+0x58/0x68
[   17.635215]  do_vfs_ioctl+0xb4/0x9d4
[   17.635228]  ksys_ioctl+0x50/0x80
[   17.635237]  __arm64_sys_ioctl+0x28/0x38
[   17.635255]  el0_svc_common.constprop.0+0xe8/0x168
[   17.635267]  el0_svc_handler+0x70/0x8c
[   17.635282]  el0_svc+0x8/0xc

Change-Id: I95f6445ff5008c3505ad0cc68b2d005a196cd881
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
 2020-11-12 21:33:08 +08:00
Shawn Lin
2f9fd14733 PCI: rockchip: dw: Increase delay for power to make link stable 
Change-Id: Ib3369aeac9f99004a0b3f5831966cb04c0c7f750
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2020-11-12 19:12:09 +08:00